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clk: imx8mn: Add GIC clock
This is enabled by default but if it's not explicitly defined and marked as critical then its parent might get turned off. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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2 changed files with 7 additions and 1 deletions
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@ -271,6 +271,10 @@ static const char * const imx8mn_usb_phy_sels[] = {"osc_24m", "sys_pll1_100m", "
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"sys_pll2_100m", "sys_pll2_200m", "clk_ext2",
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"clk_ext3", "audio_pll2_out", };
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static const char * const imx8mn_gic_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m",
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"sys_pll2_100m", "sys_pll1_800m", "clk_ext2",
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"clk_ext4", "audio_pll2_out" };
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static const char * const imx8mn_ecspi1_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m",
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"sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out",
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"sys_pll2_250m", "audio_pll2_out", };
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@ -524,6 +528,7 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
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clks[IMX8MN_CLK_UART4] = imx8m_clk_composite("uart4", imx8mn_uart4_sels, base + 0xb080);
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clks[IMX8MN_CLK_USB_CORE_REF] = imx8m_clk_composite("usb_core_ref", imx8mn_usb_core_sels, base + 0xb100);
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clks[IMX8MN_CLK_USB_PHY_REF] = imx8m_clk_composite("usb_phy_ref", imx8mn_usb_phy_sels, base + 0xb180);
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clks[IMX8MN_CLK_GIC] = imx8m_clk_composite_critical("gic", imx8mn_gic_sels, base + 0xb200);
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clks[IMX8MN_CLK_ECSPI1] = imx8m_clk_composite("ecspi1", imx8mn_ecspi1_sels, base + 0xb280);
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clks[IMX8MN_CLK_ECSPI2] = imx8m_clk_composite("ecspi2", imx8mn_ecspi2_sels, base + 0xb300);
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clks[IMX8MN_CLK_PWM1] = imx8m_clk_composite("pwm1", imx8mn_pwm1_sels, base + 0xb380);
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@ -209,7 +209,8 @@
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#define IMX8MN_CLK_ARM 191
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#define IMX8MN_CLK_NAND_USDHC_BUS_RAWNAND_CLK 192
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#define IMX8MN_CLK_GPU_CORE_ROOT 193
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#define IMX8MN_CLK_GIC 194
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#define IMX8MN_CLK_END 194
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#define IMX8MN_CLK_END 195
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#endif
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