From 976e509c2ddf9691e8186a823f14df158dd92153 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Fri, 3 Jun 2016 22:29:26 +0200 Subject: [PATCH 01/13] ARM: pxa: remove devicetree boards from pxa_defconfig If both legacy and device-tree machines are mixed in the same defconfig, the legacy boards don't boot up anymore with gpio request deferral errors. This is seen when attempting to run akita, borzoi, spitz, terrier, or tosa in qemu with pxa_defconfig. The real reason behind is that gpio handling for pxa in its current state cannot be built for _both_ a devicetree machine (ie. pxa-dt.c) and a non devicetree machine (ie. corgi, tosa, ...). This is turn is because for devicetree a pinctrl is enforced for the machine, and a pinctrl driver is required. If it's not available, pxa_gpio_request() fails on pinctrl_request_gpio() and returns -EPROBE_DEFER. It was introduced by commit f806dac5938b ("ARM: pxa: activate pinctrl for device-tree machines"). Now the true chicken and egg problem is than machine files, ie. arch/arm/mach-pxa/xxx.c are using gpio before the drivers are probed, in the init_machine() function, and that's why pinctrl/gpio for legacy machine files is a bit difficult. As for now, to keep the compilation coverage and testing of legacy machines, this patch removes the 2 devicetree machines from pxa_defconfig. Reported-by: Guenter Roeck Signed-off-by: Robert Jarzmik Tested-by: Guenter Roeck --- arch/arm/configs/pxa_defconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/configs/pxa_defconfig b/arch/arm/configs/pxa_defconfig index dc5517eaf09f..a016ecc0084b 100644 --- a/arch/arm/configs/pxa_defconfig +++ b/arch/arm/configs/pxa_defconfig @@ -26,8 +26,6 @@ CONFIG_PARTITION_ADVANCED=y CONFIG_LDM_PARTITION=y CONFIG_CMDLINE_PARTITION=y CONFIG_ARCH_PXA=y -CONFIG_MACH_PXA27X_DT=y -CONFIG_MACH_PXA3XX_DT=y CONFIG_ARCH_LUBBOCK=y CONFIG_MACH_MAINSTONE=y CONFIG_MACH_ZYLONITE300=y From 1761b1076a6465158079fdb61edcd75143887937 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Sun, 3 Apr 2016 11:23:59 +0200 Subject: [PATCH 02/13] ARM: pxa: remove platform dma code As the last pxa related driver was converted to dmaengine, it's time to kill the legacy dma code, which is not used anymore. This finishes the pxa dmaengine transition. Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/devices.h | 1 + arch/arm/mach-pxa/include/mach/dma.h | 1 - arch/arm/mach-pxa/pxa25x.c | 3 - arch/arm/mach-pxa/pxa27x.c | 3 - arch/arm/mach-pxa/pxa3xx.c | 3 - arch/arm/plat-pxa/Makefile | 2 - arch/arm/plat-pxa/dma.c | 386 --------------------------- arch/arm/plat-pxa/include/plat/dma.h | 100 ------- 8 files changed, 1 insertion(+), 498 deletions(-) delete mode 100644 arch/arm/plat-pxa/dma.c delete mode 100644 arch/arm/plat-pxa/include/plat/dma.h diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index 4a13c32fb705..04580c407276 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h @@ -54,3 +54,4 @@ extern struct platform_device pxa3xx_device_gpio; extern struct platform_device pxa93x_device_gpio; void __init pxa_register_device(struct platform_device *dev, void *data); +void __init pxa2xx_set_dmac_info(int nb_channels, int nb_requestors); diff --git a/arch/arm/mach-pxa/include/mach/dma.h b/arch/arm/mach-pxa/include/mach/dma.h index 5bd55894a48d..20026bdc6b24 100644 --- a/arch/arm/mach-pxa/include/mach/dma.h +++ b/arch/arm/mach-pxa/include/mach/dma.h @@ -17,5 +17,4 @@ /* DMA Controller Registers Definitions */ #define DMAC_REGS_VIRT io_p2v(0x40000000) -#include #endif /* _ASM_ARCH_DMA_H */ diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 823504f48f80..ec986524863b 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -198,9 +198,6 @@ static int __init pxa25x_init(void) reset_status = RCSR; - if ((ret = pxa_init_dma(IRQ_DMA, 16))) - return ret; - pxa25x_init_pm(); register_syscore_ops(&pxa_irq_syscore_ops); diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 2eaa341dd3f8..488d0ab789d2 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -300,9 +300,6 @@ static int __init pxa27x_init(void) reset_status = RCSR; - if ((ret = pxa_init_dma(IRQ_DMA, 32))) - return ret; - pxa27x_init_pm(); register_syscore_ops(&pxa_irq_syscore_ops); diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 3c9184d1d6b9..6a014c8d8a47 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -438,9 +438,6 @@ static int __init pxa3xx_init(void) */ NDCR = (NDCR & ~NDCR_ND_ARB_EN) | NDCR_ND_ARB_CNTL; - if ((ret = pxa_init_dma(IRQ_DMA, 32))) - return ret; - pxa3xx_init_pm(); register_syscore_ops(&pxa_irq_syscore_ops); diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile index 557b134db772..2f06a2e8b1dd 100644 --- a/arch/arm/plat-pxa/Makefile +++ b/arch/arm/plat-pxa/Makefile @@ -3,8 +3,6 @@ # ccflags-$(CONFIG_ARCH_MMP) := -I$(srctree)/$(src)/include -obj-$(CONFIG_ARCH_PXA) := dma.o - obj-$(CONFIG_PXA3xx) += mfp.o obj-$(CONFIG_ARCH_MMP) += mfp.o diff --git a/arch/arm/plat-pxa/dma.c b/arch/arm/plat-pxa/dma.c deleted file mode 100644 index de2b061889ec..000000000000 --- a/arch/arm/plat-pxa/dma.c +++ /dev/null @@ -1,386 +0,0 @@ -/* - * linux/arch/arm/plat-pxa/dma.c - * - * PXA DMA registration and IRQ dispatching - * - * Author: Nicolas Pitre - * Created: Nov 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#define DMA_DEBUG_NAME "pxa_dma" -#define DMA_MAX_REQUESTERS 64 - -struct dma_channel { - char *name; - pxa_dma_prio prio; - void (*irq_handler)(int, void *); - void *data; - spinlock_t lock; -}; - -static struct dma_channel *dma_channels; -static int num_dma_channels; - -/* - * Debug fs - */ -#ifdef CONFIG_DEBUG_FS -#include -#include -#include - -static struct dentry *dbgfs_root, *dbgfs_state, **dbgfs_chan; - -static int dbg_show_requester_chan(struct seq_file *s, void *p) -{ - int chan = (int)s->private; - int i; - u32 drcmr; - - seq_printf(s, "DMA channel %d requesters list :\n", chan); - for (i = 0; i < DMA_MAX_REQUESTERS; i++) { - drcmr = DRCMR(i); - if ((drcmr & DRCMR_CHLNUM) == chan) - seq_printf(s, "\tRequester %d (MAPVLD=%d)\n", - i, !!(drcmr & DRCMR_MAPVLD)); - } - - return 0; -} - -static inline int dbg_burst_from_dcmd(u32 dcmd) -{ - int burst = (dcmd >> 16) & 0x3; - - return burst ? 4 << burst : 0; -} - -static int is_phys_valid(unsigned long addr) -{ - return pfn_valid(__phys_to_pfn(addr)); -} - -#define DCSR_STR(flag) (dcsr & DCSR_##flag ? #flag" " : "") -#define DCMD_STR(flag) (dcmd & DCMD_##flag ? #flag" " : "") - -static int dbg_show_descriptors(struct seq_file *s, void *p) -{ - int chan = (int)s->private; - int i, max_show = 20, burst, width; - u32 dcmd; - unsigned long phys_desc; - struct pxa_dma_desc *desc; - unsigned long flags; - - spin_lock_irqsave(&dma_channels[chan].lock, flags); - phys_desc = DDADR(chan); - - seq_printf(s, "DMA channel %d descriptors :\n", chan); - seq_printf(s, "[%03d] First descriptor unknown\n", 0); - for (i = 1; i < max_show && is_phys_valid(phys_desc); i++) { - desc = phys_to_virt(phys_desc); - dcmd = desc->dcmd; - burst = dbg_burst_from_dcmd(dcmd); - width = (1 << ((dcmd >> 14) & 0x3)) >> 1; - - seq_printf(s, "[%03d] Desc at %08lx(virt %p)\n", - i, phys_desc, desc); - seq_printf(s, "\tDDADR = %08x\n", desc->ddadr); - seq_printf(s, "\tDSADR = %08x\n", desc->dsadr); - seq_printf(s, "\tDTADR = %08x\n", desc->dtadr); - seq_printf(s, "\tDCMD = %08x (%s%s%s%s%s%s%sburst=%d width=%d len=%d)\n", - dcmd, - DCMD_STR(INCSRCADDR), DCMD_STR(INCTRGADDR), - DCMD_STR(FLOWSRC), DCMD_STR(FLOWTRG), - DCMD_STR(STARTIRQEN), DCMD_STR(ENDIRQEN), - DCMD_STR(ENDIAN), burst, width, - dcmd & DCMD_LENGTH); - phys_desc = desc->ddadr; - } - if (i == max_show) - seq_printf(s, "[%03d] Desc at %08lx ... max display reached\n", - i, phys_desc); - else - seq_printf(s, "[%03d] Desc at %08lx is %s\n", - i, phys_desc, phys_desc == DDADR_STOP ? - "DDADR_STOP" : "invalid"); - - spin_unlock_irqrestore(&dma_channels[chan].lock, flags); - - return 0; -} - -static int dbg_show_chan_state(struct seq_file *s, void *p) -{ - int chan = (int)s->private; - u32 dcsr, dcmd; - int burst, width; - static char *str_prio[] = { "high", "normal", "low" }; - - dcsr = DCSR(chan); - dcmd = DCMD(chan); - burst = dbg_burst_from_dcmd(dcmd); - width = (1 << ((dcmd >> 14) & 0x3)) >> 1; - - seq_printf(s, "DMA channel %d\n", chan); - seq_printf(s, "\tPriority : %s\n", str_prio[dma_channels[chan].prio]); - seq_printf(s, "\tUnaligned transfer bit: %s\n", - DALGN & (1 << chan) ? "yes" : "no"); - seq_printf(s, "\tDCSR = %08x (%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n", - dcsr, DCSR_STR(RUN), DCSR_STR(NODESC), - DCSR_STR(STOPIRQEN), DCSR_STR(EORIRQEN), - DCSR_STR(EORJMPEN), DCSR_STR(EORSTOPEN), - DCSR_STR(SETCMPST), DCSR_STR(CLRCMPST), - DCSR_STR(CMPST), DCSR_STR(EORINTR), DCSR_STR(REQPEND), - DCSR_STR(STOPSTATE), DCSR_STR(ENDINTR), - DCSR_STR(STARTINTR), DCSR_STR(BUSERR)); - - seq_printf(s, "\tDCMD = %08x (%s%s%s%s%s%s%sburst=%d width=%d len=%d)\n", - dcmd, - DCMD_STR(INCSRCADDR), DCMD_STR(INCTRGADDR), - DCMD_STR(FLOWSRC), DCMD_STR(FLOWTRG), - DCMD_STR(STARTIRQEN), DCMD_STR(ENDIRQEN), - DCMD_STR(ENDIAN), burst, width, dcmd & DCMD_LENGTH); - seq_printf(s, "\tDSADR = %08x\n", DSADR(chan)); - seq_printf(s, "\tDTADR = %08x\n", DTADR(chan)); - seq_printf(s, "\tDDADR = %08x\n", DDADR(chan)); - - return 0; -} - -static int dbg_show_state(struct seq_file *s, void *p) -{ - /* basic device status */ - seq_puts(s, "DMA engine status\n"); - seq_printf(s, "\tChannel number: %d\n", num_dma_channels); - - return 0; -} - -#define DBGFS_FUNC_DECL(name) \ -static int dbg_open_##name(struct inode *inode, struct file *file) \ -{ \ - return single_open(file, dbg_show_##name, inode->i_private); \ -} \ -static const struct file_operations dbg_fops_##name = { \ - .owner = THIS_MODULE, \ - .open = dbg_open_##name, \ - .llseek = seq_lseek, \ - .read = seq_read, \ - .release = single_release, \ -} - -DBGFS_FUNC_DECL(state); -DBGFS_FUNC_DECL(chan_state); -DBGFS_FUNC_DECL(descriptors); -DBGFS_FUNC_DECL(requester_chan); - -static struct dentry *pxa_dma_dbg_alloc_chan(int ch, struct dentry *chandir) -{ - char chan_name[11]; - struct dentry *chan, *chan_state = NULL, *chan_descr = NULL; - struct dentry *chan_reqs = NULL; - void *dt; - - scnprintf(chan_name, sizeof(chan_name), "%d", ch); - chan = debugfs_create_dir(chan_name, chandir); - dt = (void *)ch; - - if (chan) - chan_state = debugfs_create_file("state", 0400, chan, dt, - &dbg_fops_chan_state); - if (chan_state) - chan_descr = debugfs_create_file("descriptors", 0400, chan, dt, - &dbg_fops_descriptors); - if (chan_descr) - chan_reqs = debugfs_create_file("requesters", 0400, chan, dt, - &dbg_fops_requester_chan); - if (!chan_reqs) - goto err_state; - - return chan; - -err_state: - debugfs_remove_recursive(chan); - return NULL; -} - -static void pxa_dma_init_debugfs(void) -{ - int i; - struct dentry *chandir; - - dbgfs_root = debugfs_create_dir(DMA_DEBUG_NAME, NULL); - if (IS_ERR(dbgfs_root) || !dbgfs_root) - goto err_root; - - dbgfs_state = debugfs_create_file("state", 0400, dbgfs_root, NULL, - &dbg_fops_state); - if (!dbgfs_state) - goto err_state; - - dbgfs_chan = kmalloc(sizeof(*dbgfs_state) * num_dma_channels, - GFP_KERNEL); - if (!dbgfs_chan) - goto err_alloc; - - chandir = debugfs_create_dir("channels", dbgfs_root); - if (!chandir) - goto err_chandir; - - for (i = 0; i < num_dma_channels; i++) { - dbgfs_chan[i] = pxa_dma_dbg_alloc_chan(i, chandir); - if (!dbgfs_chan[i]) - goto err_chans; - } - - return; -err_chans: -err_chandir: - kfree(dbgfs_chan); -err_alloc: -err_state: - debugfs_remove_recursive(dbgfs_root); -err_root: - pr_err("pxa_dma: debugfs is not available\n"); -} - -static void __exit pxa_dma_cleanup_debugfs(void) -{ - debugfs_remove_recursive(dbgfs_root); -} -#else -static inline void pxa_dma_init_debugfs(void) {} -static inline void pxa_dma_cleanup_debugfs(void) {} -#endif - -int pxa_request_dma (char *name, pxa_dma_prio prio, - void (*irq_handler)(int, void *), - void *data) -{ - unsigned long flags; - int i, found = 0; - - /* basic sanity checks */ - if (!name || !irq_handler) - return -EINVAL; - - local_irq_save(flags); - - do { - /* try grabbing a DMA channel with the requested priority */ - for (i = 0; i < num_dma_channels; i++) { - if ((dma_channels[i].prio == prio) && - !dma_channels[i].name && - !pxad_toggle_reserved_channel(i)) { - found = 1; - break; - } - } - /* if requested prio group is full, try a hier priority */ - } while (!found && prio--); - - if (found) { - DCSR(i) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR; - dma_channels[i].name = name; - dma_channels[i].irq_handler = irq_handler; - dma_channels[i].data = data; - } else { - printk (KERN_WARNING "No more available DMA channels for %s\n", name); - i = -ENODEV; - } - - local_irq_restore(flags); - return i; -} -EXPORT_SYMBOL(pxa_request_dma); - -void pxa_free_dma (int dma_ch) -{ - unsigned long flags; - - if (!dma_channels[dma_ch].name) { - printk (KERN_CRIT - "%s: trying to free channel %d which is already freed\n", - __func__, dma_ch); - return; - } - - local_irq_save(flags); - DCSR(dma_ch) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR; - dma_channels[dma_ch].name = NULL; - pxad_toggle_reserved_channel(dma_ch); - local_irq_restore(flags); -} -EXPORT_SYMBOL(pxa_free_dma); - -static irqreturn_t dma_irq_handler(int irq, void *dev_id) -{ - int i, dint = DINT, done = 0; - struct dma_channel *channel; - - while (dint) { - i = __ffs(dint); - dint &= (dint - 1); - channel = &dma_channels[i]; - if (channel->name && channel->irq_handler) { - channel->irq_handler(i, channel->data); - done++; - } - } - if (done) - return IRQ_HANDLED; - else - return IRQ_NONE; -} - -int __init pxa_init_dma(int irq, int num_ch) -{ - int i, ret; - - dma_channels = kzalloc(sizeof(struct dma_channel) * num_ch, GFP_KERNEL); - if (dma_channels == NULL) - return -ENOMEM; - - /* dma channel priorities on pxa2xx processors: - * ch 0 - 3, 16 - 19 <--> (0) DMA_PRIO_HIGH - * ch 4 - 7, 20 - 23 <--> (1) DMA_PRIO_MEDIUM - * ch 8 - 15, 24 - 31 <--> (2) DMA_PRIO_LOW - */ - for (i = 0; i < num_ch; i++) { - DCSR(i) = 0; - dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW); - spin_lock_init(&dma_channels[i].lock); - } - - ret = request_irq(irq, dma_irq_handler, IRQF_SHARED, "DMA", - dma_channels); - if (ret) { - printk (KERN_CRIT "Wow! Can't register IRQ for DMA\n"); - kfree(dma_channels); - return ret; - } - num_dma_channels = num_ch; - - pxa_dma_init_debugfs(); - - return 0; -} diff --git a/arch/arm/plat-pxa/include/plat/dma.h b/arch/arm/plat-pxa/include/plat/dma.h deleted file mode 100644 index ceba3e4184fc..000000000000 --- a/arch/arm/plat-pxa/include/plat/dma.h +++ /dev/null @@ -1,100 +0,0 @@ -#ifndef __PLAT_DMA_H -#define __PLAT_DMA_H - -#define DMAC_REG(x) (*((volatile u32 *)(DMAC_REGS_VIRT + (x)))) - -#define DCSR(n) DMAC_REG((n) << 2) -#define DALGN DMAC_REG(0x00a0) /* DMA Alignment Register */ -#define DINT DMAC_REG(0x00f0) /* DMA Interrupt Register */ -#define DDADR(n) DMAC_REG(0x0200 + ((n) << 4)) -#define DSADR(n) DMAC_REG(0x0204 + ((n) << 4)) -#define DTADR(n) DMAC_REG(0x0208 + ((n) << 4)) -#define DCMD(n) DMAC_REG(0x020c + ((n) << 4)) -#define DRCMR(n) DMAC_REG((((n) < 64) ? 0x0100 : 0x1100) + \ - (((n) & 0x3f) << 2)) - -#define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ -#define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */ -#define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ -#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ -#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ -#define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */ -#define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ -#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ - -#define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ -#define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ -#define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ -#define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */ -#define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */ -#define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ -#define DCSR_EORINTR (1 << 9) /* The end of Receive */ - -#define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */ -#define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */ - -#define DDADR_DESCADDR 0xfffffff0 /* Address of next descriptor (mask) */ -#define DDADR_STOP (1 << 0) /* Stop (read / write) */ - -#define DCMD_INCSRCADDR (1 << 31) /* Source Address Increment Setting. */ -#define DCMD_INCTRGADDR (1 << 30) /* Target Address Increment Setting. */ -#define DCMD_FLOWSRC (1 << 29) /* Flow Control by the source. */ -#define DCMD_FLOWTRG (1 << 28) /* Flow Control by the target. */ -#define DCMD_STARTIRQEN (1 << 22) /* Start Interrupt Enable */ -#define DCMD_ENDIRQEN (1 << 21) /* End Interrupt Enable */ -#define DCMD_ENDIAN (1 << 18) /* Device Endian-ness. */ -#define DCMD_BURST8 (1 << 16) /* 8 byte burst */ -#define DCMD_BURST16 (2 << 16) /* 16 byte burst */ -#define DCMD_BURST32 (3 << 16) /* 32 byte burst */ -#define DCMD_WIDTH1 (1 << 14) /* 1 byte width */ -#define DCMD_WIDTH2 (2 << 14) /* 2 byte width (HalfWord) */ -#define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */ -#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ - -/* - * Descriptor structure for PXA's DMA engine - * Note: this structure must always be aligned to a 16-byte boundary. - */ - -typedef struct pxa_dma_desc { - volatile u32 ddadr; /* Points to the next descriptor + flags */ - volatile u32 dsadr; /* DSADR value for the current transfer */ - volatile u32 dtadr; /* DTADR value for the current transfer */ - volatile u32 dcmd; /* DCMD value for the current transfer */ -} pxa_dma_desc; - -typedef enum { - DMA_PRIO_HIGH = 0, - DMA_PRIO_MEDIUM = 1, - DMA_PRIO_LOW = 2 -} pxa_dma_prio; - -/* - * DMA registration - */ - -int __init pxa_init_dma(int irq, int num_ch); - -int pxa_request_dma (char *name, - pxa_dma_prio prio, - void (*irq_handler)(int, void *), - void *data); - -void pxa_free_dma (int dma_ch); - -/* - * Cooperation with pxa_dma + dmaengine while there remains at least one pxa - * driver not converted to dmaengine. - */ -#if defined(CONFIG_PXA_DMA) -extern int pxad_toggle_reserved_channel(int legacy_channel); -#else -static inline int pxad_toggle_reserved_channel(int legacy_channel) -{ - return 0; -} -#endif - -extern void __init pxa2xx_set_dmac_info(int nb_channels, int nb_requestors); - -#endif /* __PLAT_DMA_H */ From ca5be4c678a402b7a35b2ce9a1a480b79d53f36e Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Sun, 10 Apr 2016 21:29:58 +0200 Subject: [PATCH 03/13] ARM: pxa: prepare pxa25x interrupts for device-tree platforms Add the device-tree interrupts initialization function required to have a generic pxa25x device-tree machine. Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/generic.h | 1 + arch/arm/mach-pxa/pxa25x.c | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 0b1dbb54871a..3f914d97cac2 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h @@ -27,6 +27,7 @@ extern void pxa_timer_init(void); #define pxa25x_handle_irq icip_handle_irq extern int __init pxa25x_clocks_init(void); +extern void __init pxa25x_dt_init_irq(void); extern void __init pxa25x_init_irq(void); extern void __init pxa25x_map_io(void); extern void __init pxa26x_init_irq(void); diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index ec986524863b..3aa7acab2ccd 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -151,6 +151,12 @@ void __init pxa26x_init_irq(void) } #endif +void __init pxa25x_dt_init_irq(void) +{ + if (IS_ENABLED(CONFIG_OF)) + pxa_dt_irq_init(pxa25x_set_wake); +} + static struct map_desc pxa25x_io_desc[] __initdata = { { /* Mem Ctl */ .virtual = (unsigned long)SMEMC_VIRT, From d9edae44d76a20d1b999070d911e58dca53f9906 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Sun, 10 Apr 2016 21:29:59 +0200 Subject: [PATCH 04/13] ARM: pxa: add pxa25x device-tree support Add a device-tree machine entry (DT_MACHINE_START) for pxa25x based platforms. Take the opportunity to sort the file machine descriptions by alphabetical order. Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/Kconfig | 11 ++++++++++ arch/arm/mach-pxa/Makefile | 3 ++- arch/arm/mach-pxa/pxa-dt.c | 45 +++++++++++++++++++++++++------------- arch/arm/mach-pxa/pxa25x.c | 12 +++++----- 4 files changed, 49 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index cd894d69e766..76fbc115ec33 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -4,6 +4,17 @@ menu "Intel PXA2xx/PXA3xx Implementations" comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" +config MACH_PXA25X_DT + bool "Support PXA25x platforms from device tree" + select PINCTRL + select POWER_SUPPLY + select PXA25x + select USE_OF + help + Include support for Marvell PXA25x based platforms using + the device tree. Needn't select any other machine while + MACH_PXA25x_DT is enabled. + config MACH_PXA27X_DT bool "Support PXA27x platforms from device tree" select PINCTRL diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 2ceed407eda9..ef25dc597f30 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -19,8 +19,9 @@ obj-$(CONFIG_CPU_PXA930) += pxa930.o # NOTE: keep the order of boards in accordance to their order in Kconfig # Device Tree support -obj-$(CONFIG_MACH_PXA3XX_DT) += pxa-dt.o +obj-$(CONFIG_MACH_PXA25X_DT) += pxa-dt.o obj-$(CONFIG_MACH_PXA27X_DT) += pxa-dt.o +obj-$(CONFIG_MACH_PXA3XX_DT) += pxa-dt.o # Intel/Marvell Dev Platforms obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o diff --git a/arch/arm/mach-pxa/pxa-dt.c b/arch/arm/mach-pxa/pxa-dt.c index f128133a8f30..3e331e61f995 100644 --- a/arch/arm/mach-pxa/pxa-dt.c +++ b/arch/arm/mach-pxa/pxa-dt.c @@ -18,6 +18,36 @@ #include "generic.h" +#ifdef CONFIG_PXA25x +static const char * const pxa25x_dt_board_compat[] __initconst = { + "marvell,pxa250", + NULL, +}; + +DT_MACHINE_START(PXA25X_DT, "Marvell PXA25x (Device Tree Support)") + .map_io = pxa25x_map_io, + .init_irq = pxa25x_dt_init_irq, + .handle_irq = pxa25x_handle_irq, + .restart = pxa_restart, + .dt_compat = pxa25x_dt_board_compat, +MACHINE_END +#endif + +#ifdef CONFIG_PXA27x +static const char * const pxa27x_dt_board_compat[] __initconst = { + "marvell,pxa270", + NULL, +}; + +DT_MACHINE_START(PXA27X_DT, "Marvell PXA27x (Device Tree Support)") + .map_io = pxa27x_map_io, + .init_irq = pxa27x_dt_init_irq, + .handle_irq = pxa27x_handle_irq, + .restart = pxa_restart, + .dt_compat = pxa27x_dt_board_compat, +MACHINE_END +#endif + #ifdef CONFIG_PXA3xx static const char *const pxa3xx_dt_board_compat[] __initconst = { "marvell,pxa300", @@ -34,18 +64,3 @@ DT_MACHINE_START(PXA_DT, "Marvell PXA3xx (Device Tree Support)") .dt_compat = pxa3xx_dt_board_compat, MACHINE_END #endif - -#ifdef CONFIG_PXA27x -static const char * const pxa27x_dt_board_compat[] __initconst = { - "marvell,pxa270", - NULL, -}; - -DT_MACHINE_START(PXA27X_DT, "Marvell PXA2xx (Device Tree Support)") - .map_io = pxa27x_map_io, - .init_irq = pxa27x_dt_init_irq, - .handle_irq = pxa27x_handle_irq, - .restart = pxa_restart, - .dt_compat = pxa27x_dt_board_compat, -MACHINE_END -#endif diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 3aa7acab2ccd..30b4270adc02 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -209,12 +209,12 @@ static int __init pxa25x_init(void) register_syscore_ops(&pxa_irq_syscore_ops); register_syscore_ops(&pxa2xx_mfp_syscore_ops); - pxa2xx_set_dmac_info(16, 40); - pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info); - ret = platform_add_devices(pxa25x_devices, - ARRAY_SIZE(pxa25x_devices)); - if (ret) - return ret; + if (!of_have_populated_dt()) { + pxa2xx_set_dmac_info(16, 40); + pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info); + ret = platform_add_devices(pxa25x_devices, + ARRAY_SIZE(pxa25x_devices)); + } } return ret; From 6e6263069af8a3514c165b4b937e56922ac7e76f Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Fri, 8 Jul 2016 17:24:44 +0200 Subject: [PATCH 05/13] arm: colibri_pxa270_defconfig: disable IDE subsystem This patch disables deprecated IDE subsystem in colibri_pxa270_defconfig (no IDE host drivers are selected in this config so there is no valid reason to enable IDE subsystem itself). Cc: Daniel Mack Cc: Haojian Zhuang Cc: Robert Jarzmik Signed-off-by: Bartlomiej Zolnierkiewicz Signed-off-by: Robert Jarzmik --- arch/arm/configs/colibri_pxa270_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/configs/colibri_pxa270_defconfig b/arch/arm/configs/colibri_pxa270_defconfig index 0b9211b2b73b..3146ad055716 100644 --- a/arch/arm/configs/colibri_pxa270_defconfig +++ b/arch/arm/configs/colibri_pxa270_defconfig @@ -83,7 +83,6 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m CONFIG_BLK_DEV_NBD=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=8 -CONFIG_IDE=y CONFIG_NETDEVICES=y CONFIG_PHYLIB=y CONFIG_NET_ETHERNET=y From 85719b0e217bba4d068449366a0fca109049c193 Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Fri, 8 Jul 2016 17:24:46 +0200 Subject: [PATCH 06/13] arm: lpda270_defconfig: disable IDE subsystem This patch disables deprecated IDE subsystem in lpd270_defconfig (no IDE host drivers are selected in this config so there is no valid reason to enable IDE subsystem itself). Cc: Daniel Mack Cc: Haojian Zhuang Cc: Robert Jarzmik Signed-off-by: Bartlomiej Zolnierkiewicz Signed-off-by: Robert Jarzmik --- arch/arm/configs/lpd270_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/configs/lpd270_defconfig b/arch/arm/configs/lpd270_defconfig index 1c8c9ee71d31..a9dd1e93b556 100644 --- a/arch/arm/configs/lpd270_defconfig +++ b/arch/arm/configs/lpd270_defconfig @@ -31,7 +31,6 @@ CONFIG_MTD_CFI_GEOMETRY=y # CONFIG_MTD_CFI_I1 is not set CONFIG_MTD_CFI_INTELEXT=y CONFIG_BLK_DEV_NBD=y -CONFIG_IDE=y CONFIG_NETDEVICES=y CONFIG_NET_ETHERNET=y CONFIG_SMC91X=y From 12f6d59ccb4efb3cc8983fbc162f76ef404dfe66 Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Fri, 8 Jul 2016 17:24:48 +0200 Subject: [PATCH 07/13] arm: pxa255-idp_defconfig: disable IDE subsystem This patch disables deprecated IDE subsystem in pxa255-idp_defconfig (no IDE host drivers are selected in this config so there is no valid reason to enable IDE subsystem itself). Cc: Daniel Mack Cc: Haojian Zhuang Cc: Robert Jarzmik Signed-off-by: Bartlomiej Zolnierkiewicz Signed-off-by: Robert Jarzmik --- arch/arm/configs/pxa255-idp_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/configs/pxa255-idp_defconfig b/arch/arm/configs/pxa255-idp_defconfig index 917a070b4bb9..088627ad875f 100644 --- a/arch/arm/configs/pxa255-idp_defconfig +++ b/arch/arm/configs/pxa255-idp_defconfig @@ -28,7 +28,6 @@ CONFIG_MTD_CFI_GEOMETRY=y # CONFIG_MTD_MAP_BANK_WIDTH_2 is not set # CONFIG_MTD_CFI_I1 is not set CONFIG_MTD_CFI_INTELEXT=y -CONFIG_IDE=y CONFIG_NETDEVICES=y CONFIG_NET_ETHERNET=y CONFIG_SMC91X=y From cd0f319bfbae81b32b601332a3e6e684fd360f34 Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Fri, 8 Jul 2016 17:24:50 +0200 Subject: [PATCH 08/13] arm: trizeps4_defconfig: disable IDE subsystem This patch disables deprecated IDE subsystem in trizeps4_defconfig (ide-cs host driver is selected in this config but pata_pcmcia libata PATA host driver is also selected so ide-cs is redundant and can be disabled together with the whole IDE subsystem). Cc: Daniel Mack Cc: Haojian Zhuang Cc: Robert Jarzmik Signed-off-by: Bartlomiej Zolnierkiewicz Signed-off-by: Robert Jarzmik --- arch/arm/configs/trizeps4_defconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/configs/trizeps4_defconfig b/arch/arm/configs/trizeps4_defconfig index 0ada29d568ec..492f7f3eb4ac 100644 --- a/arch/arm/configs/trizeps4_defconfig +++ b/arch/arm/configs/trizeps4_defconfig @@ -94,8 +94,6 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m CONFIG_BLK_DEV_NBD=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=8 -CONFIG_IDE=y -CONFIG_BLK_DEV_IDECS=m CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y CONFIG_CHR_DEV_SG=y From ca26475bf02ed8562b9b46f91d3e8b52ec312541 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Tue, 2 Aug 2016 00:01:32 +0200 Subject: [PATCH 09/13] ARM: pxa: fix GPIO double shifts The commit 9bf448c66d4b ("ARM: pxa: use generic gpio operation instead of gpio register") from Oct 17, 2011, leads to the following static checker warning: arch/arm/mach-pxa/spitz_pm.c:172 spitz_charger_wakeup() warn: double left shift '!gpio_get_value(SPITZ_GPIO_KEY_INT) << (1 << ((SPITZ_GPIO_KEY_INT) & 31))' As Dan reported, the value is shifted three times : - once by gpio_get_value(), which returns either 0 or BIT(gpio) - once by the shift operation '<<' - a last time by GPIO_bit(gpio) which is BIT(gpio) Therefore the calculation lead to a chained or operator of : - (1 << gpio) << (1 << gpio) = (2^gpio)^gpio = 2 ^ (gpio * gpio) It is be sheer luck the former statement works, only because each gpio used is strictly smaller than 6, and therefore 2^(gpio^2) never overflows a 32 bits value, and because it is used as a boolean value to check a gpio activation. As the xxx_charger_wakeup() functions are used as a true/false detection mechanism, take that opportunity to change their prototypes from integer return value to boolean one. Fixes: 9bf448c66d4b ("ARM: pxa: use generic gpio operation instead of gpio register") Reported-by: Dan Carpenter Cc: Joe Perches Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/corgi_pm.c | 13 ++++--------- arch/arm/mach-pxa/sharpsl_pm.c | 2 +- arch/arm/mach-pxa/sharpsl_pm.h | 2 +- arch/arm/mach-pxa/spitz_pm.c | 9 +++------ 4 files changed, 9 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index d9206811be9b..c71c483f410e 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c @@ -131,16 +131,11 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm) return is_resume; } -static unsigned long corgi_charger_wakeup(void) +static bool corgi_charger_wakeup(void) { - unsigned long ret; - - ret = (!gpio_get_value(CORGI_GPIO_AC_IN) << GPIO_bit(CORGI_GPIO_AC_IN)) - | (!gpio_get_value(CORGI_GPIO_KEY_INT) - << GPIO_bit(CORGI_GPIO_KEY_INT)) - | (!gpio_get_value(CORGI_GPIO_WAKEUP) - << GPIO_bit(CORGI_GPIO_WAKEUP)); - return ret; + return !gpio_get_value(CORGI_GPIO_AC_IN) || + !gpio_get_value(CORGI_GPIO_KEY_INT) || + !gpio_get_value(CORGI_GPIO_WAKEUP); } unsigned long corgipm_read_devdata(int type) diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index b80eab9993c5..249b7bd5fbc4 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c @@ -744,7 +744,7 @@ static int sharpsl_off_charge_battery(void) time = RCNR; while (1) { /* Check if any wakeup event had occurred */ - if (sharpsl_pm.machinfo->charger_wakeup() != 0) + if (sharpsl_pm.machinfo->charger_wakeup()) return 0; /* Check for timeout */ if ((RCNR - time) > SHARPSL_WAIT_CO_TIME) diff --git a/arch/arm/mach-pxa/sharpsl_pm.h b/arch/arm/mach-pxa/sharpsl_pm.h index 905be6755f04..fa75b6df8134 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.h +++ b/arch/arm/mach-pxa/sharpsl_pm.h @@ -34,7 +34,7 @@ struct sharpsl_charger_machinfo { #define SHARPSL_STATUS_LOCK 5 #define SHARPSL_STATUS_CHRGFULL 6 #define SHARPSL_STATUS_FATAL 7 - unsigned long (*charger_wakeup)(void); + bool (*charger_wakeup)(void); int (*should_wakeup)(unsigned int resume_on_alarm); void (*backlight_limit)(int); int (*backlight_get_status) (void); diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index ea9f9034cb54..4e64a140252e 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c @@ -165,13 +165,10 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm) return is_resume; } -static unsigned long spitz_charger_wakeup(void) +static bool spitz_charger_wakeup(void) { - unsigned long ret; - ret = ((!gpio_get_value(SPITZ_GPIO_KEY_INT) - << GPIO_bit(SPITZ_GPIO_KEY_INT)) - | gpio_get_value(SPITZ_GPIO_SYNC)); - return ret; + return !gpio_get_value(SPITZ_GPIO_KEY_INT) || + gpio_get_value(SPITZ_GPIO_SYNC); } unsigned long spitzpm_read_devdata(int type) From e572f6491a4b8ffbf31c59e2ad0eb8ee9244bf58 Mon Sep 17 00:00:00 2001 From: Petr Cvek Date: Wed, 17 Aug 2016 12:36:13 +0200 Subject: [PATCH 10/13] ARM: pxa: magician: Remove duplicated I2C pins declaration Magician has GPIO117_I2C_SCL and GPIO118_I2C_SDA pins declared twice. Signed-off-by: Petr Cvek Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/magician.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index abc918169367..6f8837ebbf91 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c @@ -121,10 +121,6 @@ static unsigned long magician_pin_config[] __initdata = { GPIO107_GPIO, /* DS1WM_IRQ */ GPIO108_GPIO, /* GSM_READY */ GPIO115_GPIO, /* nPEN_IRQ */ - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, }; /* From 8571110575c985b12d443288c397dba6dc7a44f5 Mon Sep 17 00:00:00 2001 From: Markus Elfring Date: Thu, 25 Aug 2016 18:01:37 +0200 Subject: [PATCH 11/13] ARM: pxa: Use kmalloc_array() in pxa_pm_init() * A multiplication for the size determination of a memory allocation indicated that an array data structure should be processed. Thus use the corresponding function "kmalloc_array". This issue was detected by using the Coccinelle software. * Replace the specification of a data type by a pointer dereference to make the corresponding size determination a bit safer according to the Linux coding style convention. Signed-off-by: Markus Elfring Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/pm.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index 388463b99090..e7450fb49d24 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c @@ -104,8 +104,9 @@ static int __init pxa_pm_init(void) return -EINVAL; } - sleep_save = kmalloc(pxa_cpu_pm_fns->save_count * sizeof(unsigned long), - GFP_KERNEL); + sleep_save = kmalloc_array(pxa_cpu_pm_fns->save_count, + sizeof(*sleep_save), + GFP_KERNEL); if (!sleep_save) { printk(KERN_ERR "failed to alloc memory for pm save\n"); return -ENOMEM; From 32f17997c1307c44f9365ed5ff4cf2b5c1e22301 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Mon, 15 Aug 2016 00:24:55 +0200 Subject: [PATCH 12/13] ARM: pxa: remove irq init from dt machines The init_irq and handle_irq can be declared through standard irqchip declaration and are not necessary in machine descriptions. This is another step towards the generic kernel for the pxa architecture. Signed-off-by: Robert Jarzmik Acked-by: Arnd Bergmann --- arch/arm/mach-pxa/generic.h | 3 --- arch/arm/mach-pxa/pxa-dt.c | 6 ------ arch/arm/mach-pxa/pxa25x.c | 11 ++++++++--- arch/arm/mach-pxa/pxa27x.c | 11 ++++++++--- arch/arm/mach-pxa/pxa3xx.c | 8 +++++++- 5 files changed, 23 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 3f914d97cac2..75e3f611e5d8 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h @@ -27,21 +27,18 @@ extern void pxa_timer_init(void); #define pxa25x_handle_irq icip_handle_irq extern int __init pxa25x_clocks_init(void); -extern void __init pxa25x_dt_init_irq(void); extern void __init pxa25x_init_irq(void); extern void __init pxa25x_map_io(void); extern void __init pxa26x_init_irq(void); #define pxa27x_handle_irq ichp_handle_irq extern int __init pxa27x_clocks_init(void); -extern void __init pxa27x_dt_init_irq(void); extern unsigned pxa27x_get_clk_frequency_khz(int); extern void __init pxa27x_init_irq(void); extern void __init pxa27x_map_io(void); #define pxa3xx_handle_irq ichp_handle_irq extern int __init pxa3xx_clocks_init(void); -extern void __init pxa3xx_dt_init_irq(void); extern void __init pxa3xx_init_irq(void); extern void __init pxa3xx_map_io(void); diff --git a/arch/arm/mach-pxa/pxa-dt.c b/arch/arm/mach-pxa/pxa-dt.c index 3e331e61f995..aa9b255f5570 100644 --- a/arch/arm/mach-pxa/pxa-dt.c +++ b/arch/arm/mach-pxa/pxa-dt.c @@ -26,8 +26,6 @@ static const char * const pxa25x_dt_board_compat[] __initconst = { DT_MACHINE_START(PXA25X_DT, "Marvell PXA25x (Device Tree Support)") .map_io = pxa25x_map_io, - .init_irq = pxa25x_dt_init_irq, - .handle_irq = pxa25x_handle_irq, .restart = pxa_restart, .dt_compat = pxa25x_dt_board_compat, MACHINE_END @@ -41,8 +39,6 @@ static const char * const pxa27x_dt_board_compat[] __initconst = { DT_MACHINE_START(PXA27X_DT, "Marvell PXA27x (Device Tree Support)") .map_io = pxa27x_map_io, - .init_irq = pxa27x_dt_init_irq, - .handle_irq = pxa27x_handle_irq, .restart = pxa_restart, .dt_compat = pxa27x_dt_board_compat, MACHINE_END @@ -58,8 +54,6 @@ static const char *const pxa3xx_dt_board_compat[] __initconst = { DT_MACHINE_START(PXA_DT, "Marvell PXA3xx (Device Tree Support)") .map_io = pxa3xx_map_io, - .init_irq = pxa3xx_dt_init_irq, - .handle_irq = pxa3xx_handle_irq, .restart = pxa_restart, .dt_compat = pxa3xx_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 30b4270adc02..12b94357fbc1 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -151,11 +152,15 @@ void __init pxa26x_init_irq(void) } #endif -void __init pxa25x_dt_init_irq(void) +static int __init __init +pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent) { - if (IS_ENABLED(CONFIG_OF)) - pxa_dt_irq_init(pxa25x_set_wake); + pxa_dt_irq_init(pxa25x_set_wake); + set_handle_irq(ichp_handle_irq); + + return 0; } +IRQCHIP_DECLARE(pxa25x_intc, "marvell,pxa-intc", pxa25x_dt_init_irq); static struct map_desc pxa25x_io_desc[] __initdata = { { /* Mem Ctl */ diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 488d0ab789d2..c0185c5c5a08 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -233,11 +234,15 @@ void __init pxa27x_init_irq(void) pxa_init_irq(34, pxa27x_set_wake); } -void __init pxa27x_dt_init_irq(void) +static int __init +pxa27x_dt_init_irq(struct device_node *node, struct device_node *parent) { - if (IS_ENABLED(CONFIG_OF)) - pxa_dt_irq_init(pxa27x_set_wake); + pxa_dt_irq_init(pxa27x_set_wake); + set_handle_irq(ichp_handle_irq); + + return 0; } +IRQCHIP_DECLARE(pxa27x_intc, "marvell,pxa-intc", pxa27x_dt_init_irq); static struct map_desc pxa27x_io_desc[] __initdata = { { /* Mem Ctl */ diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 6a014c8d8a47..87acc96388c7 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -356,11 +357,16 @@ void __init pxa3xx_init_irq(void) } #ifdef CONFIG_OF -void __init pxa3xx_dt_init_irq(void) +static int __init __init +pxa3xx_dt_init_irq(struct device_node *node, struct device_node *parent) { __pxa3xx_init_irq(); pxa_dt_irq_init(pxa3xx_set_wake); + set_handle_irq(ichp_handle_irq); + + return 0; } +IRQCHIP_DECLARE(pxa3xx_intc, "marvell,pxa-intc", pxa3xx_dt_init_irq); #endif /* CONFIG_OF */ static struct map_desc pxa3xx_io_desc[] __initdata = { From 9ba63e3cc849cdaf3b675c47cc51fe35419e5117 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Sun, 4 Sep 2016 20:59:45 +0200 Subject: [PATCH 13/13] ARM: pxa: pxa_cplds: fix interrupt handling Since its initial commit, the driver is buggy for multiple interrupts handling. The translation from the former lubbock.c file was not complete, and might stall all interrupt handling when multiple interrupts occur. This is especially true when inside the interrupt handler and if a new interrupt comes and is not handled, leaving the output line still held, and not creating a transition as the GPIO block behind would expect to trigger another cplds_irq_handler() call. For the record, the hardware is working as follows. The interrupt mechanism relies on : - one status register - one mask register Let's suppose the input irq lines are called : - i_sa1111 - i_lan91x - i_mmc_cd Let's suppose the status register for each irq line is called : - status_sa1111 - status_lan91x - status_mmc_cd Let's suppose the interrupt mask for each irq line is called : - irqen_sa1111 - irqen_lan91x - irqen_mmc_cd Let's suppose the output irq line, connected to GPIO0 is called : - o_gpio0 The behavior is as follows : - o_gpio0 = not((status_sa1111 & irqen_sa1111) | (status_lan91x & irqen_lan91x) | (status_mmc_cd & irqen_mmc_cd)) => this is a N-to-1 NOR gate and multiple AND gates - irqen_* is exactly as programmed by a write to the FPGA - status_* behavior is governed by a bi-stable D flip-flop => on next FPGA clock : - if i_xxx is high, status_xxx becomes 1 - if i_xxx is low, status_xxx remains as it is - if software sets status_xxx to 0, the D flip-flop is reset => status_xxx becomes 0 => on next FPGA clock cycle, if i_xxx is high, status_xxx becomes 1 again Fixes: fc9e38c0f4d3 ("ARM: pxa: lubbock: use new pxa_cplds driver") Reported-by: Russell King Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/pxa_cplds_irqs.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-pxa/pxa_cplds_irqs.c b/arch/arm/mach-pxa/pxa_cplds_irqs.c index 2385052b0ce1..e362f865fcd2 100644 --- a/arch/arm/mach-pxa/pxa_cplds_irqs.c +++ b/arch/arm/mach-pxa/pxa_cplds_irqs.c @@ -41,30 +41,35 @@ static irqreturn_t cplds_irq_handler(int in_irq, void *d) unsigned long pending; unsigned int bit; - pending = readl(fpga->base + FPGA_IRQ_SET_CLR) & fpga->irq_mask; - for_each_set_bit(bit, &pending, CPLDS_NB_IRQ) - generic_handle_irq(irq_find_mapping(fpga->irqdomain, bit)); + do { + pending = readl(fpga->base + FPGA_IRQ_SET_CLR) & fpga->irq_mask; + for_each_set_bit(bit, &pending, CPLDS_NB_IRQ) { + generic_handle_irq(irq_find_mapping(fpga->irqdomain, + bit)); + } + } while (pending); return IRQ_HANDLED; } -static void cplds_irq_mask_ack(struct irq_data *d) +static void cplds_irq_mask(struct irq_data *d) { struct cplds *fpga = irq_data_get_irq_chip_data(d); unsigned int cplds_irq = irqd_to_hwirq(d); - unsigned int set, bit = BIT(cplds_irq); + unsigned int bit = BIT(cplds_irq); fpga->irq_mask &= ~bit; writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); - set = readl(fpga->base + FPGA_IRQ_SET_CLR); - writel(set & ~bit, fpga->base + FPGA_IRQ_SET_CLR); } static void cplds_irq_unmask(struct irq_data *d) { struct cplds *fpga = irq_data_get_irq_chip_data(d); unsigned int cplds_irq = irqd_to_hwirq(d); - unsigned int bit = BIT(cplds_irq); + unsigned int set, bit = BIT(cplds_irq); + + set = readl(fpga->base + FPGA_IRQ_SET_CLR); + writel(set & ~bit, fpga->base + FPGA_IRQ_SET_CLR); fpga->irq_mask |= bit; writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); @@ -72,7 +77,8 @@ static void cplds_irq_unmask(struct irq_data *d) static struct irq_chip cplds_irq_chip = { .name = "pxa_cplds", - .irq_mask_ack = cplds_irq_mask_ack, + .irq_ack = cplds_irq_mask, + .irq_mask = cplds_irq_mask, .irq_unmask = cplds_irq_unmask, .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE, };