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KVM: vmx/pmu: Expose LBR_FMT in the MSR_IA32_PERF_CAPABILITIES 

Userspace could enable guest LBR feature when the exactly supported
LBR format value is initialized to the MSR_IA32_PERF_CAPABILITIES
and the LBR is also compatible with vPMU version and host cpu model.

The LBR could be enabled on the guest if host perf supports LBR
(checked via x86_perf_get_lbr()) and the vcpu model is compatible
with the host one.

Signed-off-by: Like Xu <like.xu@linux.intel.com>
Message-Id: <20210201051039.255478-11-like.xu@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Like Xu 2021-02-01 13:10:38 +08:00 committed by Paolo Bonzini
parent 9aa4f62246
commit be635e34c2
1 changed files with 8 additions and 1 deletions
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9
arch/x86/kvm/vmx/capabilities.h
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@ -380,11 +380,18 @@ static inline bool vmx_pt_mode_is_host_guest(void)
static inline u64 vmx_get_perf_capabilities(void)
{
u64 perf_cap = 0;
if (boot_cpu_has(X86_FEATURE_PDCM))
rdmsrl(MSR_IA32_PERF_CAPABILITIES, perf_cap);
perf_cap &= PMU_CAP_LBR_FMT;
/*
* Since counters are virtualized, KVM would support full
* width counting unconditionally, even if the host lacks it.
*/
return PMU_CAP_FW_WRITES;
return PMU_CAP_FW_WRITES | perf_cap;
}
static inline u64 vmx_supported_debugctl(void)