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drm/i915: Add REG_GENMASK64() and REG_FIELD_GET64()
We treat SSKPD as a 64 bit register. Add the support macros to define/extract bits in such registers. v2: Fix 32bit builds Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220211182045.23555-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
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@ -37,6 +37,21 @@
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__is_constexpr(__low) && \
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((__low) < 0 || (__high) > 31 || (__low) > (__high)))))
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/**
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* REG_GENMASK64() - Prepare a continuous u64 bitmask
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* @__high: 0-based high bit
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* @__low: 0-based low bit
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*
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* Local wrapper for GENMASK_ULL() to force u64, with compile time checks.
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*
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* @return: Continuous bitmask from @__high to @__low, inclusive.
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*/
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#define REG_GENMASK64(__high, __low) \
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((u64)(GENMASK_ULL(__high, __low) + \
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BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \
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__is_constexpr(__low) && \
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((__low) < 0 || (__high) > 63 || (__low) > (__high)))))
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/*
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* Local integer constant expression version of is_power_of_2().
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*/
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@ -71,6 +86,18 @@
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*/
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#define REG_FIELD_GET(__mask, __val) ((u32)FIELD_GET(__mask, __val))
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/**
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* REG_FIELD_GET64() - Extract a u64 bitfield value
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* @__mask: shifted mask defining the field's length and position
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* @__val: value to extract the bitfield value from
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*
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* Local wrapper for FIELD_GET() to force u64 and for consistency with
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* REG_GENMASK64().
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*
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* @return: Masked and shifted value of the field defined by @__mask in @__val.
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*/
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#define REG_FIELD_GET64(__mask, __val) ((u64)FIELD_GET(__mask, __val))
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typedef struct {
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u32 reg;
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} i915_reg_t;
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