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ARCv2: IOC: Tighten up the contraints (specifically base / size alignment)
[Needed for HSDK] - Currently IOC base is hardcoded to 0x8000_0000 which is default value of LINUX_LINK_BASE, but may not always be the case - IOC programming model imposes the constraint that IOC aperture size needs to be aligned to IOC base address, which we were not checking so far. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> [vgupta: reworked the changelog]
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1 changed files with 19 additions and 8 deletions
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@ -1147,7 +1147,7 @@ SYSCALL_DEFINE3(cacheflush, uint32_t, start, uint32_t, sz, uint32_t, flags)
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*/
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noinline void __init arc_ioc_setup(void)
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{
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unsigned int ap_sz;
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unsigned int ioc_base, mem_sz;
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/* Flush + invalidate + disable L1 dcache */
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__dc_disable();
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@ -1156,18 +1156,29 @@ noinline void __init arc_ioc_setup(void)
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if (read_aux_reg(ARC_REG_SLC_BCR))
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slc_entire_op(OP_FLUSH_N_INV);
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/* IOC Aperture start: TDB: handle non default CONFIG_LINUX_LINK_BASE */
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write_aux_reg(ARC_REG_IO_COH_AP0_BASE, 0x80000);
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/*
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* IOC Aperture size:
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* decoded as 2 ^ (SIZE + 2) KB: so setting 0x11 implies 512M
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* currently IOC Aperture covers entire DDR
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* TBD: fix for PGU + 1GB of low mem
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* TBD: fix for PAE
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*/
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ap_sz = order_base_2(arc_get_mem_sz()/1024) - 2;
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write_aux_reg(ARC_REG_IO_COH_AP0_SIZE, ap_sz);
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mem_sz = arc_get_mem_sz();
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if (!is_power_of_2(mem_sz) || mem_sz < 4096)
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panic("IOC Aperture size must be power of 2 larger than 4KB");
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/*
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* IOC Aperture size decoded as 2 ^ (SIZE + 2) KB,
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* so setting 0x11 implies 512MB, 0x12 implies 1GB...
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*/
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write_aux_reg(ARC_REG_IO_COH_AP0_SIZE, order_base_2(mem_sz >> 10) - 2);
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/* for now assume kernel base is start of IOC aperture */
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ioc_base = CONFIG_LINUX_LINK_BASE;
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if (ioc_base % mem_sz != 0)
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panic("IOC Aperture start must be aligned to the size of the aperture");
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write_aux_reg(ARC_REG_IO_COH_AP0_BASE, ioc_base >> 12);
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write_aux_reg(ARC_REG_IO_COH_PARTIAL, 1);
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write_aux_reg(ARC_REG_IO_COH_ENABLE, 1);
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