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i2c: opal: Update quirk flags to do write-then-anything
Hardware can do write-then-anything. Activate that. Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com> [wsa: cosmetic updates] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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1 changed files with 6 additions and 6 deletions
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@ -104,7 +104,8 @@ static int i2c_opal_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
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req.buffer_ra = cpu_to_be64(__pa(msgs[0].buf));
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req.buffer_ra = cpu_to_be64(__pa(msgs[0].buf));
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break;
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break;
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case 2:
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case 2:
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req.type = OPAL_I2C_SM_READ;
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req.type = (msgs[1].flags & I2C_M_RD) ?
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OPAL_I2C_SM_READ : OPAL_I2C_SM_WRITE;
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req.addr = cpu_to_be16(msgs[0].addr);
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req.addr = cpu_to_be16(msgs[0].addr);
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req.subaddr_sz = msgs[0].len;
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req.subaddr_sz = msgs[0].len;
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for (i = 0; i < msgs[0].len; i++)
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for (i = 0; i < msgs[0].len; i++)
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@ -199,13 +200,12 @@ static const struct i2c_algorithm i2c_opal_algo = {
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.functionality = i2c_opal_func,
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.functionality = i2c_opal_func,
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};
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};
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/* For two messages, we basically support only simple
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/*
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* smbus transactions of a write plus a read. We might
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* For two messages, we basically support simple smbus transactions of a
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* want to allow also two writes but we'd have to bounce
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* write-then-anything.
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* the data into a single buffer.
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*/
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*/
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static struct i2c_adapter_quirks i2c_opal_quirks = {
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static struct i2c_adapter_quirks i2c_opal_quirks = {
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.flags = I2C_AQ_COMB_WRITE_THEN_READ,
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.flags = I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST | I2C_AQ_COMB_SAME_ADDR,
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.max_comb_1st_msg_len = 4,
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.max_comb_1st_msg_len = 4,
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};
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};
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