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perf: Fix perf ring buffer memory ordering
The PPC64 people noticed a missing memory barrier and crufty old comments in the perf ring buffer code. So update all the comments and add the missing barrier. When the architecture implements local_t using atomic_long_t there will be double barriers issued; but short of introducing more conditional barrier primitives this is the best we can do. Reported-by: Victor Kaplansky <victork@il.ibm.com> Tested-by: Victor Kaplansky <victork@il.ibm.com> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: michael@ellerman.id.au Cc: Paul McKenney <paulmck@linux.vnet.ibm.com> Cc: Michael Neuling <mikey@neuling.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: anton@samba.org Cc: benh@kernel.crashing.org Link: http://lkml.kernel.org/r/20131025173749.GG19466@laptop.lan Signed-off-by: Ingo Molnar <mingo@kernel.org>
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2 changed files with 34 additions and 9 deletions
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@ -456,13 +456,15 @@ struct perf_event_mmap_page {
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/*
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* Control data for the mmap() data buffer.
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*
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* User-space reading the @data_head value should issue an rmb(), on
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* SMP capable platforms, after reading this value -- see
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* perf_event_wakeup().
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* User-space reading the @data_head value should issue an smp_rmb(),
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* after reading this value.
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*
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* When the mapping is PROT_WRITE the @data_tail value should be
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* written by userspace to reflect the last read data. In this case
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* the kernel will not over-write unread data.
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* written by userspace to reflect the last read data, after issueing
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* an smp_mb() to separate the data read from the ->data_tail store.
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* In this case the kernel will not over-write unread data.
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*
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* See perf_output_put_handle() for the data ordering.
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*/
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__u64 data_head; /* head in the data section */
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__u64 data_tail; /* user-space written tail */
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@ -87,10 +87,31 @@ static void perf_output_put_handle(struct perf_output_handle *handle)
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goto out;
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/*
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* Publish the known good head. Rely on the full barrier implied
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* by atomic_dec_and_test() order the rb->head read and this
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* write.
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* Since the mmap() consumer (userspace) can run on a different CPU:
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*
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* kernel user
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*
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* READ ->data_tail READ ->data_head
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* smp_mb() (A) smp_rmb() (C)
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* WRITE $data READ $data
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* smp_wmb() (B) smp_mb() (D)
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* STORE ->data_head WRITE ->data_tail
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*
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* Where A pairs with D, and B pairs with C.
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*
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* I don't think A needs to be a full barrier because we won't in fact
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* write data until we see the store from userspace. So we simply don't
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* issue the data WRITE until we observe it. Be conservative for now.
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*
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* OTOH, D needs to be a full barrier since it separates the data READ
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* from the tail WRITE.
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*
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* For B a WMB is sufficient since it separates two WRITEs, and for C
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* an RMB is sufficient since it separates two READs.
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*
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* See perf_output_begin().
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*/
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smp_wmb();
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rb->user_page->data_head = head;
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/*
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@ -154,9 +175,11 @@ int perf_output_begin(struct perf_output_handle *handle,
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* Userspace could choose to issue a mb() before updating the
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* tail pointer. So that all reads will be completed before the
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* write is issued.
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*
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* See perf_output_put_handle().
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*/
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tail = ACCESS_ONCE(rb->user_page->data_tail);
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smp_rmb();
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smp_mb();
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offset = head = local_read(&rb->head);
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head += size;
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if (unlikely(!perf_output_space(rb, tail, offset, head)))
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