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drm: meson: drv: use macro when initializing vpu 

This patch add new macro which is used to set WRARB/RDARB mode of
the VPU.

Signed-off-by: Julien Masson <jmasson@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/86v9wv82f1.fsf@baylibre.com
This commit is contained in:
Julien Masson 2019-06-24 16:48:27 +02:00 committed by Neil Armstrong
parent 39bf9985b8
commit bfb8681982
2 changed files with 23 additions and 4 deletions
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26
drivers/gpu/drm/meson/meson_drv.c
View File

@ -140,10 +140,28 @@ static struct regmap_config meson_regmap_config = {
static void meson_vpu_init(struct meson_drm *priv)
{
writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
u32 value;
/*
* Slave dc0 and dc5 connected to master port 1.
* By default other slaves are connected to master port 0.
*/
value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
/* Slave dc0 connected to master port 1 */
value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
/* Slave dc4 and dc7 connected to master port 1 */
value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
/* Slave dc1 connected to master port 1 */
value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
}
static void meson_remove_framebuffers(void)

1
drivers/gpu/drm/meson/meson_registers.h
View File

@ -1488,6 +1488,7 @@
#define VPU_RDARB_MODE_L1C2 0x2799
#define VPU_RDARB_MODE_L2C1 0x279d
#define VPU_WRARB_MODE_L2C1 0x27a2
#define VPU_RDARB_SLAVE_TO_MASTER_PORT(dc, port) (port << (16 + dc))
/* osd super scale */
#define OSDSR_HV_SIZEIN 0x3130