diff --git a/drivers/iommu/intel-pasid.c b/drivers/iommu/intel-pasid.c
index 25d749830500..c81f0f17c6ba 100644
--- a/drivers/iommu/intel-pasid.c
+++ b/drivers/iommu/intel-pasid.c
@@ -815,13 +815,13 @@ int intel_pasid_setup_nested(struct intel_iommu *iommu, struct device *dev,
 	}
 
 	/* First level PGD is in GPA, must be supported by the second level */
-	if ((unsigned long long)gpgd > domain->max_addr) {
+	if ((uintptr_t)gpgd > domain->max_addr) {
 		dev_err_ratelimited(dev,
-				    "Guest PGD %llx not supported, max %llx\n",
-				    (unsigned long long)gpgd, domain->max_addr);
+				    "Guest PGD %lx not supported, max %llx\n",
+				    (uintptr_t)gpgd, domain->max_addr);
 		return -EINVAL;
 	}
-	pasid_set_flptr(pte, (u64)gpgd);
+	pasid_set_flptr(pte, (uintptr_t)gpgd);
 
 	ret = intel_pasid_setup_bind_data(iommu, pte, pasid_data);
 	if (ret)
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index 11366dc91971..acc7555b002d 100644
--- a/drivers/iommu/intel-svm.c
+++ b/drivers/iommu/intel-svm.c
@@ -340,7 +340,8 @@ int intel_svm_bind_gpasid(struct iommu_domain *domain, struct device *dev,
 	 * call the nested mode setup function here.
 	 */
 	spin_lock(&iommu->lock);
-	ret = intel_pasid_setup_nested(iommu, dev, (pgd_t *)data->gpgd,
+	ret = intel_pasid_setup_nested(iommu, dev,
+				       (pgd_t *)(uintptr_t)data->gpgd,
 				       data->hpasid, &data->vtd, dmar_domain,
 				       data->addr_width);
 	spin_unlock(&iommu->lock);