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dt-bindings: pinctrl: renesas: Document RZ/V2L pinctrl
Document Renesas RZ/V2L pinctrl bindings. The RZ/V2L SoC is package- and pin-compatible with RZ/G2L. No driver changes are required as the RZ/G2L compatible string "renesas,r9a07g044-pinctrl" will be used as a fallback. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220110134659.30424-7-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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$id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RZ/G2L combined Pin and GPIO controller
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title: Renesas RZ/{G2L,V2L} combined Pin and GPIO controller
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maintainers:
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- Geert Uytterhoeven <geert+renesas@glider.be>
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- Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
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description:
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The Renesas SoCs of the RZ/G2L series feature a combined Pin and GPIO
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The Renesas SoCs of the RZ/{G2L,V2L} series feature a combined Pin and GPIO
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controller.
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Pin multiplexing and GPIO configuration is performed on a per-pin basis.
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Each port features up to 8 pins, each of them configurable for GPIO function
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properties:
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compatible:
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enum:
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- renesas,r9a07g044-pinctrl # RZ/G2{L,LC}
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oneOf:
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- items:
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- enum:
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- renesas,r9a07g044-pinctrl # RZ/G2{L,LC}
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- items:
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- enum:
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- renesas,r9a07g054-pinctrl # RZ/V2L
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- const: renesas,r9a07g044-pinctrl # RZ/G2{L,LC} fallback for RZ/V2L
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reg:
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maxItems: 1
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