mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-25 02:09:42 +00:00
drm/i915: Remove the "INDEX" suffix from PPAT marcos
Remove the "INDEX" suffix from PPAT marcos as they are bits actually, not indexes. Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Cc: Ben Widawsky <benjamin.widawsky@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1505392783-4084-2-git-send-email-zhi.a.wang@intel.com
This commit is contained in:
parent
4395890a48
commit
c095b97c1e
3 changed files with 10 additions and 10 deletions
|
@ -1971,7 +1971,7 @@ static int alloc_scratch_pages(struct intel_vgpu *vgpu,
|
|||
*/
|
||||
se.val64 |= _PAGE_PRESENT | _PAGE_RW;
|
||||
if (type == GTT_TYPE_PPGTT_PDE_PT)
|
||||
se.val64 |= PPAT_CACHED_INDEX;
|
||||
se.val64 |= PPAT_CACHED;
|
||||
|
||||
for (i = 0; i < page_entry_num; i++)
|
||||
ops->set_entry(scratch_pt, &se, i, false, 0, vgpu);
|
||||
|
|
|
@ -230,13 +230,13 @@ static gen8_pte_t gen8_pte_encode(dma_addr_t addr,
|
|||
|
||||
switch (level) {
|
||||
case I915_CACHE_NONE:
|
||||
pte |= PPAT_UNCACHED_INDEX;
|
||||
pte |= PPAT_UNCACHED;
|
||||
break;
|
||||
case I915_CACHE_WT:
|
||||
pte |= PPAT_DISPLAY_ELLC_INDEX;
|
||||
pte |= PPAT_DISPLAY_ELLC;
|
||||
break;
|
||||
default:
|
||||
pte |= PPAT_CACHED_INDEX;
|
||||
pte |= PPAT_CACHED;
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -249,9 +249,9 @@ static gen8_pde_t gen8_pde_encode(const dma_addr_t addr,
|
|||
gen8_pde_t pde = _PAGE_PRESENT | _PAGE_RW;
|
||||
pde |= addr;
|
||||
if (level != I915_CACHE_NONE)
|
||||
pde |= PPAT_CACHED_PDE_INDEX;
|
||||
pde |= PPAT_CACHED_PDE;
|
||||
else
|
||||
pde |= PPAT_UNCACHED_INDEX;
|
||||
pde |= PPAT_UNCACHED;
|
||||
return pde;
|
||||
}
|
||||
|
||||
|
|
|
@ -126,10 +126,10 @@ typedef u64 gen8_ppgtt_pml4e_t;
|
|||
* tables */
|
||||
#define GEN8_PDPE_MASK 0x1ff
|
||||
|
||||
#define PPAT_UNCACHED_INDEX (_PAGE_PWT | _PAGE_PCD)
|
||||
#define PPAT_CACHED_PDE_INDEX 0 /* WB LLC */
|
||||
#define PPAT_CACHED_INDEX _PAGE_PAT /* WB LLCeLLC */
|
||||
#define PPAT_DISPLAY_ELLC_INDEX _PAGE_PCD /* WT eLLC */
|
||||
#define PPAT_UNCACHED (_PAGE_PWT | _PAGE_PCD)
|
||||
#define PPAT_CACHED_PDE 0 /* WB LLC */
|
||||
#define PPAT_CACHED _PAGE_PAT /* WB LLCeLLC */
|
||||
#define PPAT_DISPLAY_ELLC _PAGE_PCD /* WT eLLC */
|
||||
|
||||
#define CHV_PPAT_SNOOP (1<<6)
|
||||
#define GEN8_PPAT_AGE(x) ((x)<<4)
|
||||
|
|
Loading…
Reference in a new issue