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gianfar: Add missing graceful reset steps and fixes
gfar_halt() and gfar_start() are responsible for stopping and starting the DMA and the Rx/Tx hw rings. They implement the support for the "graceful Rx/Tx stop/start" hw procedure, and also disable/enable eTSEC's hw interrupts in the process. The GRS/GTS procedure requires however to have the RQUEUE/TQUEUE registers cleared first and to wait for a period of time for the current frame to pass through the interface (around ~10ms for a jumbo frame). Only then may the GTS and GRS bits from DMACTRL be set to shut down the DMA, and finally the Tx_EN and Rx_EN bits in MACCFG1 may be cleared to disable the Tx/Rx blocks. The same register programming order applies to start the Rx/Tx: enabling the RQUEUE/TQUEUE *before* clearing the GRS/GTS bits. This is a HW recommendation in order to avoid a possible controller "lock up" during graceful reset. Cleanup the gfar_halt()/start() prototypes, to take priv instead of ndev as their purpose is to operate on HW. Enabling the RQUEUE/TQUEUE in the hw_init() is not needed anymore since that's the job of gfar_start(). Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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efeddce7ea
commit
c10650b661
3 changed files with 31 additions and 30 deletions
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@ -138,9 +138,7 @@ int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit);
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static void gfar_clean_tx_ring(struct gfar_priv_tx_q *tx_queue);
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static void gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
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int amount_pull, struct napi_struct *napi);
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void gfar_halt(struct net_device *dev);
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static void gfar_halt_nodisable(struct net_device *dev);
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void gfar_start(struct net_device *dev);
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static void gfar_halt_nodisable(struct gfar_private *priv);
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static void gfar_clear_exact_match(struct net_device *dev);
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static void gfar_set_mac_for_addr(struct net_device *dev, int num,
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const u8 *addr);
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@ -1070,10 +1068,6 @@ static void gfar_hw_init(struct gfar_private *priv)
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/* Program the interrupt steering regs, only for MG devices */
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if (priv->num_grps > 1)
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gfar_write_isrg(priv);
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/* Enable all Rx/Tx queues after MAC reset */
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gfar_write(®s->rqueue, priv->rqueue);
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gfar_write(®s->tqueue, priv->tqueue);
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}
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static void __init gfar_init_addr_hash_table(struct gfar_private *priv)
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@ -1146,7 +1140,7 @@ static int gfar_probe(struct platform_device *ofdev)
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/* Stop the DMA engine now, in case it was running before
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* (The firmware could have used it, and left it running).
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*/
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gfar_halt(dev);
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gfar_halt(priv);
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gfar_hw_init(priv);
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@ -1314,7 +1308,7 @@ static int gfar_suspend(struct device *dev)
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lock_tx_qs(priv);
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lock_rx_qs(priv);
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gfar_halt_nodisable(ndev);
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gfar_halt_nodisable(priv);
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/* Disable Tx, and Rx if wake-on-LAN is disabled. */
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tempval = gfar_read(®s->maccfg1);
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@ -1378,7 +1372,7 @@ static int gfar_resume(struct device *dev)
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tempval &= ~MACCFG2_MPEN;
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gfar_write(®s->maccfg2, tempval);
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gfar_start(ndev);
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gfar_start(priv);
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unlock_rx_qs(priv);
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unlock_tx_qs(priv);
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@ -1410,7 +1404,7 @@ static int gfar_restore(struct device *dev)
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init_registers(ndev);
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gfar_set_mac_address(ndev);
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gfar_init_mac(ndev);
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gfar_start(ndev);
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gfar_start(priv);
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priv->oldlink = 0;
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priv->oldspeed = 0;
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@ -1633,9 +1627,8 @@ static int __gfar_is_rx_idle(struct gfar_private *priv)
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}
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/* Halt the receive and transmit queues */
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static void gfar_halt_nodisable(struct net_device *dev)
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static void gfar_halt_nodisable(struct gfar_private *priv)
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{
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struct gfar_private *priv = netdev_priv(dev);
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struct gfar __iomem *regs = priv->gfargrp[0].regs;
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u32 tempval;
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@ -1661,15 +1654,20 @@ static void gfar_halt_nodisable(struct net_device *dev)
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}
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/* Halt the receive and transmit queues */
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void gfar_halt(struct net_device *dev)
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void gfar_halt(struct gfar_private *priv)
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{
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struct gfar_private *priv = netdev_priv(dev);
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struct gfar __iomem *regs = priv->gfargrp[0].regs;
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u32 tempval;
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gfar_halt_nodisable(dev);
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/* Dissable the Rx/Tx hw queues */
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gfar_write(®s->rqueue, 0);
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gfar_write(®s->tqueue, 0);
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/* Disable Rx and Tx */
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mdelay(10);
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gfar_halt_nodisable(priv);
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/* Disable Rx/Tx DMA */
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tempval = gfar_read(®s->maccfg1);
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tempval &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
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gfar_write(®s->maccfg1, tempval);
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@ -1696,7 +1694,7 @@ void stop_gfar(struct net_device *dev)
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lock_tx_qs(priv);
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lock_rx_qs(priv);
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gfar_halt(dev);
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gfar_halt(priv);
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unlock_rx_qs(priv);
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unlock_tx_qs(priv);
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@ -1801,17 +1799,15 @@ static void free_skb_resources(struct gfar_private *priv)
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priv->tx_queue[0]->tx_bd_dma_base);
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}
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void gfar_start(struct net_device *dev)
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void gfar_start(struct gfar_private *priv)
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{
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struct gfar_private *priv = netdev_priv(dev);
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struct gfar __iomem *regs = priv->gfargrp[0].regs;
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u32 tempval;
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int i = 0;
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/* Enable Rx and Tx in MACCFG1 */
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tempval = gfar_read(®s->maccfg1);
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tempval |= (MACCFG1_RX_EN | MACCFG1_TX_EN);
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gfar_write(®s->maccfg1, tempval);
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/* Enable Rx/Tx hw queues */
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gfar_write(®s->rqueue, priv->rqueue);
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gfar_write(®s->tqueue, priv->tqueue);
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/* Initialize DMACTRL to have WWR and WOP */
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tempval = gfar_read(®s->dmactrl);
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@ -1830,9 +1826,14 @@ void gfar_start(struct net_device *dev)
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gfar_write(®s->rstat, priv->gfargrp[i].rstat);
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}
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/* Enable Rx/Tx DMA */
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tempval = gfar_read(®s->maccfg1);
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tempval |= (MACCFG1_RX_EN | MACCFG1_TX_EN);
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gfar_write(®s->maccfg1, tempval);
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gfar_ints_enable(priv);
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dev->trans_start = jiffies; /* prevent tx timeout */
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priv->ndev->trans_start = jiffies; /* prevent tx timeout */
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}
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static void gfar_configure_coalescing(struct gfar_private *priv,
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@ -1956,7 +1957,7 @@ int startup_gfar(struct net_device *ndev)
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}
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/* Start the controller */
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gfar_start(ndev);
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gfar_start(priv);
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phy_start(priv->phydev);
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@ -1205,7 +1205,8 @@ void unlock_tx_qs(struct gfar_private *priv);
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irqreturn_t gfar_receive(int irq, void *dev_id);
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int startup_gfar(struct net_device *dev);
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void stop_gfar(struct net_device *dev);
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void gfar_halt(struct net_device *dev);
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void gfar_halt(struct gfar_private *priv);
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void gfar_start(struct gfar_private *priv);
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void gfar_phy_test(struct mii_bus *bus, struct phy_device *phydev, int enable,
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u32 regnum, u32 read);
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void gfar_configure_coalescing_all(struct gfar_private *priv);
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@ -44,7 +44,6 @@
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#include "gianfar.h"
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extern void gfar_start(struct net_device *dev);
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extern int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue,
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int rx_work_limit);
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@ -504,7 +503,7 @@ static int gfar_sringparam(struct net_device *dev,
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lock_tx_qs(priv);
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lock_rx_qs(priv);
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gfar_halt(dev);
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gfar_halt(priv);
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unlock_rx_qs(priv);
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unlock_tx_qs(priv);
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@ -627,7 +626,7 @@ int gfar_set_features(struct net_device *dev, netdev_features_t features)
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lock_tx_qs(priv);
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lock_rx_qs(priv);
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gfar_halt(dev);
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gfar_halt(priv);
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unlock_tx_qs(priv);
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unlock_rx_qs(priv);
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