mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-02 23:27:06 +00:00
drm/amd/display: Populate dtbclk from bounding box
dtbclk is unavaliable from pmfw. Try to grab the value from bounding box Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
2170fb03be
commit
c1afbb715e
2 changed files with 12 additions and 7 deletions
|
@ -124,7 +124,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = {
|
|||
.phyclk_mhz = 600.0,
|
||||
.phyclk_d18_mhz = 667.0,
|
||||
.dscclk_mhz = 186.0,
|
||||
.dtbclk_mhz = 625.0,
|
||||
.dtbclk_mhz = 600.0,
|
||||
},
|
||||
{
|
||||
.state = 1,
|
||||
|
@ -133,7 +133,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = {
|
|||
.phyclk_mhz = 810.0,
|
||||
.phyclk_d18_mhz = 667.0,
|
||||
.dscclk_mhz = 209.0,
|
||||
.dtbclk_mhz = 625.0,
|
||||
.dtbclk_mhz = 600.0,
|
||||
},
|
||||
{
|
||||
.state = 2,
|
||||
|
@ -142,7 +142,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = {
|
|||
.phyclk_mhz = 810.0,
|
||||
.phyclk_d18_mhz = 667.0,
|
||||
.dscclk_mhz = 209.0,
|
||||
.dtbclk_mhz = 625.0,
|
||||
.dtbclk_mhz = 600.0,
|
||||
},
|
||||
{
|
||||
.state = 3,
|
||||
|
@ -151,7 +151,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = {
|
|||
.phyclk_mhz = 810.0,
|
||||
.phyclk_d18_mhz = 667.0,
|
||||
.dscclk_mhz = 371.0,
|
||||
.dtbclk_mhz = 625.0,
|
||||
.dtbclk_mhz = 600.0,
|
||||
},
|
||||
{
|
||||
.state = 4,
|
||||
|
@ -160,7 +160,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = {
|
|||
.phyclk_mhz = 810.0,
|
||||
.phyclk_d18_mhz = 667.0,
|
||||
.dscclk_mhz = 417.0,
|
||||
.dtbclk_mhz = 625.0,
|
||||
.dtbclk_mhz = 600.0,
|
||||
},
|
||||
},
|
||||
.num_states = 5,
|
||||
|
@ -367,6 +367,8 @@ void dcn35_update_bw_bounding_box_fpu(struct dc *dc,
|
|||
clock_limits[i].socclk_mhz;
|
||||
dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].memclk_mhz =
|
||||
clk_table->entries[i].memclk_mhz * clk_table->entries[i].wck_ratio;
|
||||
dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dtbclk_mhz =
|
||||
clock_limits[i].dtbclk_mhz;
|
||||
dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels =
|
||||
clk_table->num_entries;
|
||||
dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels =
|
||||
|
@ -379,6 +381,8 @@ void dcn35_update_bw_bounding_box_fpu(struct dc *dc,
|
|||
clk_table->num_entries;
|
||||
dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels =
|
||||
clk_table->num_entries;
|
||||
dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dtbclk_levels =
|
||||
clk_table->num_entries;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -425,6 +425,7 @@ void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc,
|
|||
}
|
||||
|
||||
for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_dtbclk_levels; i++) {
|
||||
if (dml2->config.bbox_overrides.clks_table.clk_entries[i].dtbclk_mhz > 0)
|
||||
p->in_states->state_array[i].dtbclk_mhz =
|
||||
dml2->config.bbox_overrides.clks_table.clk_entries[i].dtbclk_mhz;
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue