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drm/amdgpu: use ARRAY_SIZE
Using the ARRAY_SIZE macro improves the readability of the code. Found with Coccinelle with the following semantic patch: @r depends on (org || report)@ type T; T[] E; position p; @@ ( (sizeof(E)@p /sizeof(*E)) | (sizeof(E)@p /sizeof(E[...])) | (sizeof(E)@p /sizeof(T)) ) Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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parent
2642cf110d
commit
c1b24a1405
2 changed files with 10 additions and 8 deletions
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@ -20,6 +20,7 @@
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/firmware.h>
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#include <drm/drmP.h>
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#include "amdgpu.h"
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@ -3952,10 +3953,10 @@ static int gfx_v8_0_init_save_restore_list(struct amdgpu_device *adev)
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adev->gfx.rlc.reg_list_format_size_bytes >> 2,
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unique_indices,
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&indices_count,
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sizeof(unique_indices) / sizeof(int),
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ARRAY_SIZE(unique_indices),
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indirect_start_offsets,
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&offset_count,
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sizeof(indirect_start_offsets)/sizeof(int));
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ARRAY_SIZE(indirect_start_offsets));
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/* save and restore list */
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WREG32_FIELD(RLC_SRM_CNTL, AUTO_INCR_ADDR, 1);
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@ -3977,14 +3978,14 @@ static int gfx_v8_0_init_save_restore_list(struct amdgpu_device *adev)
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/* starting offsets starts */
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WREG32(mmRLC_GPM_SCRATCH_ADDR,
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adev->gfx.rlc.starting_offsets_start);
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for (i = 0; i < sizeof(indirect_start_offsets)/sizeof(int); i++)
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for (i = 0; i < ARRAY_SIZE(indirect_start_offsets); i++)
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WREG32(mmRLC_GPM_SCRATCH_DATA,
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indirect_start_offsets[i]);
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/* unique indices */
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temp = mmRLC_SRM_INDEX_CNTL_ADDR_0;
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data = mmRLC_SRM_INDEX_CNTL_DATA_0;
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for (i = 0; i < sizeof(unique_indices) / sizeof(int); i++) {
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for (i = 0; i < ARRAY_SIZE(unique_indices); i++) {
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if (unique_indices[i] != 0) {
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WREG32(temp + i, unique_indices[i] & 0x3FFFF);
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WREG32(data + i, unique_indices[i] >> 20);
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@ -20,6 +20,7 @@
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/firmware.h>
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#include <drm/drmP.h>
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#include "amdgpu.h"
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@ -1730,10 +1731,10 @@ static int gfx_v9_0_init_rlc_save_restore_list(struct amdgpu_device *adev)
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adev->gfx.rlc.reg_list_format_size_bytes >> 2,
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unique_indirect_regs,
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&unique_indirect_reg_count,
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sizeof(unique_indirect_regs)/sizeof(int),
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ARRAY_SIZE(unique_indirect_regs),
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indirect_start_offsets,
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&indirect_start_offsets_count,
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sizeof(indirect_start_offsets)/sizeof(int));
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ARRAY_SIZE(indirect_start_offsets));
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/* enable auto inc in case it is disabled */
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tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL));
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@ -1770,12 +1771,12 @@ static int gfx_v9_0_init_rlc_save_restore_list(struct amdgpu_device *adev)
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/* write the starting offsets to RLC scratch ram */
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WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_ADDR),
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adev->gfx.rlc.starting_offsets_start);
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for (i = 0; i < sizeof(indirect_start_offsets)/sizeof(int); i++)
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for (i = 0; i < ARRAY_SIZE(indirect_start_offsets); i++)
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WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA),
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indirect_start_offsets[i]);
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/* load unique indirect regs*/
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for (i = 0; i < sizeof(unique_indirect_regs)/sizeof(int); i++) {
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for (i = 0; i < ARRAY_SIZE(unique_indirect_regs); i++) {
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WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_INDEX_CNTL_ADDR_0) + i,
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unique_indirect_regs[i] & 0x3FFFF);
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WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_INDEX_CNTL_DATA_0) + i,
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