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drm/i915/tgl: Add memory type decoding for bandwidth checking
The memory type values have changed in TGL, so we need to translate them differently than ICL. While we're moving it, fix up the ICL translation for LPDDR4. BSpec: 53998 v2: Fix up ICL LPDDR4 entry (Ville); Drop unused values from TGL (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: James Ausmus <james.ausmus@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Stuart Summers <stuart.summers@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190924222829.13142-1-james.ausmus@intel.com
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1 changed files with 39 additions and 16 deletions
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@ -35,22 +35,45 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
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if (ret)
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return ret;
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switch (val & 0xf) {
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case 0:
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qi->dram_type = INTEL_DRAM_DDR4;
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break;
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case 1:
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qi->dram_type = INTEL_DRAM_DDR3;
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break;
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case 2:
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qi->dram_type = INTEL_DRAM_LPDDR3;
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break;
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case 3:
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qi->dram_type = INTEL_DRAM_LPDDR3;
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break;
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default:
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MISSING_CASE(val & 0xf);
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break;
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if (IS_GEN(dev_priv, 12)) {
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switch (val & 0xf) {
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case 0:
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qi->dram_type = INTEL_DRAM_DDR4;
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break;
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case 3:
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qi->dram_type = INTEL_DRAM_LPDDR4;
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break;
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case 4:
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qi->dram_type = INTEL_DRAM_DDR3;
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break;
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case 5:
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qi->dram_type = INTEL_DRAM_LPDDR3;
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break;
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default:
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MISSING_CASE(val & 0xf);
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break;
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}
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} else if (IS_GEN(dev_priv, 11)) {
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switch (val & 0xf) {
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case 0:
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qi->dram_type = INTEL_DRAM_DDR4;
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break;
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case 1:
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qi->dram_type = INTEL_DRAM_DDR3;
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break;
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case 2:
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qi->dram_type = INTEL_DRAM_LPDDR3;
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break;
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case 3:
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qi->dram_type = INTEL_DRAM_LPDDR4;
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break;
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default:
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MISSING_CASE(val & 0xf);
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break;
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}
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} else {
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MISSING_CASE(INTEL_GEN(dev_priv));
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qi->dram_type = INTEL_DRAM_LPDDR3; /* Conservative default */
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}
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qi->num_channels = (val & 0xf0) >> 4;
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