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powerpc/bpf: Introduce __PPC_SH64()
Introduce __PPC_SH64() as a 64-bit variant to encode shift field in some of the shift and rotate instructions operating on double-words. Convert some of the BPF instruction macros to use the same. Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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2 changed files with 6 additions and 6 deletions
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@ -306,6 +306,7 @@
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#define __PPC_WC(w) (((w) & 0x3) << 21)
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#define __PPC_WS(w) (((w) & 0x1f) << 11)
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#define __PPC_SH(s) __PPC_WS(s)
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#define __PPC_SH64(s) (__PPC_SH(s) | (((s) & 0x20) >> 4))
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#define __PPC_MB(s) (((s) & 0x1f) << 6)
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#define __PPC_ME(s) (((s) & 0x1f) << 1)
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#define __PPC_MB64(s) (__PPC_MB(s) | ((s) & 0x20))
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@ -157,8 +157,7 @@
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#define PPC_SRAD(d, a, s) EMIT(PPC_INST_SRAD | ___PPC_RA(d) | \
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___PPC_RS(a) | ___PPC_RB(s))
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#define PPC_SRADI(d, a, i) EMIT(PPC_INST_SRADI | ___PPC_RA(d) | \
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___PPC_RS(a) | __PPC_SH(i) | \
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(((i) & 0x20) >> 4))
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___PPC_RS(a) | __PPC_SH64(i))
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#define PPC_RLWINM(d, a, i, mb, me) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \
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___PPC_RS(a) | __PPC_SH(i) | \
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__PPC_MB(mb) | __PPC_ME(me))
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@ -166,11 +165,11 @@
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___PPC_RS(a) | __PPC_SH(i) | \
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__PPC_MB(mb) | __PPC_ME(me))
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#define PPC_RLDICL(d, a, i, mb) EMIT(PPC_INST_RLDICL | ___PPC_RA(d) | \
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___PPC_RS(a) | __PPC_SH(i) | \
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__PPC_MB64(mb) | (((i) & 0x20) >> 4))
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___PPC_RS(a) | __PPC_SH64(i) | \
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__PPC_MB64(mb))
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#define PPC_RLDICR(d, a, i, me) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \
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___PPC_RS(a) | __PPC_SH(i) | \
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__PPC_ME64(me) | (((i) & 0x20) >> 4))
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___PPC_RS(a) | __PPC_SH64(i) | \
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__PPC_ME64(me))
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/* slwi = rlwinm Rx, Ry, n, 0, 31-n */
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#define PPC_SLWI(d, a, i) PPC_RLWINM(d, a, i, 0, 31-(i))
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