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drm/amdgpu: add plumbing for ctx priority changes v2
Introduce amdgpu_ctx_priority_override(). A mechanism to override a context's priority. An override can be terminated by setting the override to AMD_SCHED_PRIORITY_UNSET. v2: change refcounted interface for a direct set Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2 changed files with 34 additions and 1 deletions
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@ -735,7 +735,9 @@ struct amdgpu_ctx {
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spinlock_t ring_lock;
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struct dma_fence **fences;
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struct amdgpu_ctx_ring rings[AMDGPU_MAX_RINGS];
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bool preamble_presented;
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bool preamble_presented;
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enum amd_sched_priority init_priority;
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enum amd_sched_priority override_priority;
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};
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struct amdgpu_ctx_mgr {
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@ -752,6 +754,8 @@ int amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx, struct amdgpu_ring *ring,
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struct dma_fence *fence, uint64_t *seq);
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struct dma_fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
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struct amdgpu_ring *ring, uint64_t seq);
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void amdgpu_ctx_priority_override(struct amdgpu_ctx *ctx,
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enum amd_sched_priority priority);
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int amdgpu_ctx_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp);
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@ -72,6 +72,8 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
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}
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ctx->reset_counter = atomic_read(&adev->gpu_reset_counter);
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ctx->init_priority = priority;
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ctx->override_priority = AMD_SCHED_PRIORITY_UNSET;
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/* create context entity for each ring */
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for (i = 0; i < adev->num_rings; i++) {
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@ -362,6 +364,33 @@ struct dma_fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
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return fence;
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}
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void amdgpu_ctx_priority_override(struct amdgpu_ctx *ctx,
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enum amd_sched_priority priority)
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{
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int i;
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struct amdgpu_device *adev = ctx->adev;
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struct amd_sched_rq *rq;
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struct amd_sched_entity *entity;
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struct amdgpu_ring *ring;
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enum amd_sched_priority ctx_prio;
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ctx->override_priority = priority;
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ctx_prio = (ctx->override_priority == AMD_SCHED_PRIORITY_UNSET) ?
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ctx->init_priority : ctx->override_priority;
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for (i = 0; i < adev->num_rings; i++) {
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ring = adev->rings[i];
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entity = &ctx->rings[i].entity;
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rq = &ring->sched.sched_rq[ctx_prio];
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if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)
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continue;
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amd_sched_entity_set_rq(entity, rq);
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}
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}
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void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr)
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{
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mutex_init(&mgr->lock);
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