STM32 DT updates for v4.11, round 1.

Highlights:
 ----------
 
  - ADD RTC support on STM32F429 MCU
  - Enable RTC on STM32F469and STM32F429 boards
  - ADD ADC support on STM32F429 MCU
  - Enable ADC on STM32F429 Eval board
  - Add I2S external clock
  - Fix memory size for STM32F429 Disco
 
 Note:
 -----
 First patch "clk: stm32f4: Update DT bindings documentation")
 has already been merged in clock tree.
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Merge tag 'stm32-dt-for-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt

STM32 DT updates for v4.11, round 1.

Highlights:
----------

 - ADD RTC support on STM32F429 MCU
 - Enable RTC on STM32F469and STM32F429 boards
 - ADD ADC support on STM32F429 MCU
 - Enable ADC on STM32F429 Eval board
 - Add I2S external clock
 - Fix memory size for STM32F429 Disco

Note:
-----
First patch "clk: stm32f4: Update DT bindings documentation")
has already been merged in clock tree.

* tag 'stm32-dt-for-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: enable RTC on stm32429i-eval
  ARM: dts: stm32: enable RTC on stm32f469-disco
  ARM: dts: stm32: enable RTC on stm32f429-disco
  ARM: dts: stm32: Add RTC support for STM32F429 MCU
  ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f429
  ARM: dts: stm32: Include auxiliary stm32fx clock definition
  ARM: dts: stm32: Add external I2S clock on stm32f429 MCU
  ARM: dts: stm32: enable ADC on stm32f429i-eval board
  ARM: dts: stm32: Add ADC support to stm32f429
  ARM: dts: stm32: Add missing USART3 pin config to stm32f469-disco board
  ARM: dts: stm32: Fix memory size from 8MB to 16MB on stm32f469-disco board
  clk: stm32f4: Update DT bindings documentation

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2017-01-16 22:47:51 -08:00
commit c2b360449e
6 changed files with 185 additions and 3 deletions

View file

@ -17,6 +17,9 @@ Required properties:
property, containing a phandle to the clock device node, an index selecting
between gated clocks and other clocks and an index specifying the clock to
use.
- clocks: External oscillator clock phandle
- high speed external clock signal (HSE)
- external I2S clock (I2S_CKIN)
Example:
@ -25,6 +28,7 @@ Example:
#clock-cells = <2>
compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
reg = <0x40023800 0x400>;
clocks = <&clk_hse>, <&clk_i2s_ckin>;
};
Specifying gated clocks
@ -66,6 +70,19 @@ The secondary index is bound with the following magic numbers:
0 SYSTICK
1 FCLK
2 CLK_LSI (low-power clock source)
3 CLK_LSE (generated from a 32.768 kHz low-speed external
crystal or ceramic resonator)
4 CLK_HSE_RTC (HSE division factor for RTC clock)
5 CLK_RTC (real-time clock)
6 PLL_VCO_I2S (vco frequency of I2S pll)
7 PLL_VCO_SAI (vco frequency of SAI pll)
8 CLK_LCD (LCD-TFT)
9 CLK_I2S (I2S clocks)
10 CLK_SAI1 (audio clocks)
11 CLK_SAI2
12 CLK_I2SQ_PDIV (post divisor of pll i2s q divisor)
13 CLK_SAIQ_PDIV (post divisor of pll sai q divisor)
Example:

View file

@ -70,6 +70,20 @@ soc {
dma-ranges = <0xc0000000 0x0 0x10000000>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_vref: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vref";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
leds {
compatible = "gpio-leds";
green {
@ -112,6 +126,17 @@ usbotg_hs_phy: usbphy {
};
};
&adc {
pinctrl-names = "default";
pinctrl-0 = <&adc3_in8_pin>;
vref-supply = <&reg_vref>;
status = "okay";
adc3: adc@200 {
st,adc-channels = <8>;
status = "okay";
};
};
&clk_hse {
clock-frequency = <25000000>;
};
@ -132,6 +157,10 @@ phy1: ethernet-phy@1 {
};
};
&rtc {
status = "okay";
};
&usart1 {
pinctrl-0 = <&usart1_pins_a>;
pinctrl-names = "default";

View file

@ -94,6 +94,12 @@ &clk_hse {
clock-frequency = <8000000>;
};
&rtc {
assigned-clocks = <&rcc 1 CLK_RTC>;
assigned-clock-parents = <&rcc 1 CLK_LSI>;
status = "okay";
};
&usart1 {
pinctrl-0 = <&usart1_pins_a>;
pinctrl-names = "default";

View file

@ -48,6 +48,7 @@
#include "skeleton.dtsi"
#include "armv7-m.dtsi"
#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
#include <dt-bindings/clock/stm32fx-clock.h>
/ {
clocks {
@ -68,6 +69,12 @@ clk-lsi {
compatible = "fixed-clock";
clock-frequency = <32000>;
};
clk_i2s_ckin: i2s-ckin {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <0>;
};
};
soc {
@ -118,6 +125,20 @@ timer7: timer@40001400 {
status = "disabled";
};
rtc: rtc@40002800 {
compatible = "st,stm32-rtc";
reg = <0x40002800 0x400>;
clocks = <&rcc 1 CLK_RTC>;
clock-names = "ck_rtc";
assigned-clocks = <&rcc 1 CLK_RTC>;
assigned-clock-parents = <&rcc 1 CLK_LSE>;
interrupt-parent = <&exti>;
interrupts = <17 1>;
interrupt-names = "alarm";
st,syscfg = <&pwrcfg>;
status = "disabled";
};
usart2: serial@40004400 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004400 0x400>;
@ -188,6 +209,49 @@ usart6: serial@40011400 {
status = "disabled";
};
adc: adc@40012000 {
compatible = "st,stm32f4-adc-core";
reg = <0x40012000 0x400>;
interrupts = <18>;
clocks = <&rcc 0 168>;
clock-names = "adc";
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
adc1: adc@0 {
compatible = "st,stm32f4-adc";
#io-channel-cells = <1>;
reg = <0x0>;
clocks = <&rcc 0 168>;
interrupt-parent = <&adc>;
interrupts = <0>;
status = "disabled";
};
adc2: adc@100 {
compatible = "st,stm32f4-adc";
#io-channel-cells = <1>;
reg = <0x100>;
clocks = <&rcc 0 169>;
interrupt-parent = <&adc>;
interrupts = <1>;
status = "disabled";
};
adc3: adc@200 {
compatible = "st,stm32f4-adc";
#io-channel-cells = <1>;
reg = <0x200>;
clocks = <&rcc 0 170>;
interrupt-parent = <&adc>;
interrupts = <2>;
status = "disabled";
};
};
syscfg: system-config@40013800 {
compatible = "syscon";
reg = <0x40013800 0x400>;
@ -316,6 +380,19 @@ pins2 {
};
};
usart3_pins_a: usart3@0 {
pins1 {
pinmux = <STM32F429_PB10_FUNC_USART3_TX>;
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32F429_PB11_FUNC_USART3_RX>;
bias-disable;
};
};
usbotg_hs_pins_a: usbotg_hs@0 {
pins {
pinmux = <STM32F429_PH4_FUNC_OTG_HS_ULPI_NXT>,
@ -355,6 +432,12 @@ pins {
slew-rate = <2>;
};
};
adc3_in8_pin: adc@200 {
pins {
pinmux = <STM32F429_PF10_FUNC_ANALOG>;
};
};
};
rcc: rcc@40023810 {
@ -362,8 +445,10 @@ rcc: rcc@40023810 {
#clock-cells = <2>;
compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
reg = <0x40023800 0x400>;
clocks = <&clk_hse>;
clocks = <&clk_hse>, <&clk_i2s_ckin>;
st,syscfg = <&pwrcfg>;
assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
assigned-clock-rates = <1000000>;
};
dma1: dma-controller@40026000 {

View file

@ -58,7 +58,7 @@ chosen {
};
memory {
reg = <0x00000000 0x800000>;
reg = <0x00000000 0x1000000>;
};
aliases {
@ -78,6 +78,12 @@ &clk_hse {
clock-frequency = <8000000>;
};
&usart3 {
&rtc {
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_pins_a>;
pinctrl-names = "default";
status = "okay";
};

View file

@ -0,0 +1,39 @@
/*
* stm32fx-clock.h
*
* Copyright (C) 2016 STMicroelectronics
* Author: Gabriel Fernandez for STMicroelectronics.
* License terms: GNU General Public License (GPL), version 2
*/
/*
* List of clocks wich are not derived from system clock (SYSCLOCK)
*
* The index of these clocks is the secondary index of DT bindings
* (see Documentatoin/devicetree/bindings/clock/st,stm32-rcc.txt)
*
* e.g:
<assigned-clocks = <&rcc 1 CLK_LSE>;
*/
#ifndef _DT_BINDINGS_CLK_STMFX_H
#define _DT_BINDINGS_CLK_STMFX_H
#define SYSTICK 0
#define FCLK 1
#define CLK_LSI 2
#define CLK_LSE 3
#define CLK_HSE_RTC 4
#define CLK_RTC 5
#define PLL_VCO_I2S 6
#define PLL_VCO_SAI 7
#define CLK_LCD 8
#define CLK_I2S 9
#define CLK_SAI1 10
#define CLK_SAI2 11
#define CLK_I2SQ_PDIV 12
#define CLK_SAIQ_PDIV 13
#define END_PRIMARY_CLK 14
#endif