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arm64: dts: rockchip: add usb3-phy otg-port support for rk3399
Add the usb3 phyter for the USB3.0 OTG controller. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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parent
b7e63d95c1
commit
c301b327ae
1 changed files with 4 additions and 4 deletions
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@ -411,8 +411,8 @@ usbdrd_dwc3_0: dwc3 {
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reg = <0x0 0xfe800000 0x0 0x100000>;
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reg = <0x0 0xfe800000 0x0 0x100000>;
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interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
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dr_mode = "otg";
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dr_mode = "otg";
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phys = <&u2phy0_otg>;
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phys = <&u2phy0_otg>, <&tcphy0_usb3>;
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phy-names = "usb2-phy";
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phy-names = "usb2-phy", "usb3-phy";
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phy_type = "utmi_wide";
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phy_type = "utmi_wide";
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snps,dis_enblslpm_quirk;
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snps,dis_enblslpm_quirk;
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snps,dis-u2-freeclk-exists-quirk;
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snps,dis-u2-freeclk-exists-quirk;
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@ -444,8 +444,8 @@ usbdrd_dwc3_1: dwc3 {
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reg = <0x0 0xfe900000 0x0 0x100000>;
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reg = <0x0 0xfe900000 0x0 0x100000>;
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interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
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dr_mode = "otg";
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dr_mode = "otg";
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phys = <&u2phy1_otg>;
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phys = <&u2phy1_otg>, <&tcphy1_usb3>;
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phy-names = "usb2-phy";
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phy-names = "usb2-phy", "usb3-phy";
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phy_type = "utmi_wide";
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phy_type = "utmi_wide";
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snps,dis_enblslpm_quirk;
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snps,dis_enblslpm_quirk;
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snps,dis-u2-freeclk-exists-quirk;
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snps,dis-u2-freeclk-exists-quirk;
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