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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-11-01 17:08:10 +00:00
usb: gadget: R8A66597 peripheral controller support.
While in-tree support for the R8A66597 host side has been supported for some time, the peripheral side has so far been unsupported. This adds a new USB gadget driver which bridges the gap and finally wires up the peripheral side as well. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Tested-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
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24d76195d1
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c41442474a
5 changed files with 1911 additions and 0 deletions
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@ -251,6 +251,24 @@ config USB_PXA25X_SMALL
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default y if USB_ETH
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default y if USB_ETH
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default y if USB_G_SERIAL
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default y if USB_G_SERIAL
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config USB_GADGET_R8A66597
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boolean "Renesas R8A66597 USB Peripheral Controller"
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select USB_GADGET_DUALSPEED
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help
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R8A66597 is a discrete USB host and peripheral controller chip that
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supports both full and high speed USB 2.0 data transfers.
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It has nine configurable endpoints, and endpoint zero.
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Say "y" to link the driver statically, or "m" to build a
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dynamically linked module called "r8a66597_udc" and force all
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gadget drivers to also be dynamically linked.
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config USB_R8A66597
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tristate
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depends on USB_GADGET_R8A66597
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default USB_GADGET
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select USB_GADGET_SELECTED
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config USB_GADGET_PXA27X
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config USB_GADGET_PXA27X
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boolean "PXA 27x"
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boolean "PXA 27x"
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depends on ARCH_PXA && (PXA27x || PXA3xx)
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depends on ARCH_PXA && (PXA27x || PXA3xx)
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@ -23,6 +23,7 @@ ifeq ($(CONFIG_ARCH_MXC),y)
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fsl_usb2_udc-objs += fsl_mx3_udc.o
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fsl_usb2_udc-objs += fsl_mx3_udc.o
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endif
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endif
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obj-$(CONFIG_USB_M66592) += m66592-udc.o
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obj-$(CONFIG_USB_M66592) += m66592-udc.o
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obj-$(CONFIG_USB_R8A66597) += r8a66597-udc.o
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obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o
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obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o
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obj-$(CONFIG_USB_CI13XXX) += ci13xxx_udc.o
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obj-$(CONFIG_USB_CI13XXX) += ci13xxx_udc.o
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obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o
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obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o
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@ -173,6 +173,12 @@
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// CONFIG_USB_GADGET_AU1X00
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// CONFIG_USB_GADGET_AU1X00
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// ...
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// ...
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#ifdef CONFIG_USB_GADGET_R8A66597
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#define gadget_is_r8a66597(g) !strcmp("r8a66597_udc", (g)->name)
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#else
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#define gadget_is_r8a66597(g) 0
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#endif
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/**
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/**
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* usb_gadget_controller_number - support bcdDevice id convention
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* usb_gadget_controller_number - support bcdDevice id convention
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@ -239,6 +245,8 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget)
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return 0x23;
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return 0x23;
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else if (gadget_is_langwell(gadget))
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else if (gadget_is_langwell(gadget))
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return 0x24;
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return 0x24;
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else if (gadget_is_r8a66597(gadget))
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return 0x25;
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return -ENOENT;
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return -ENOENT;
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}
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}
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1635
drivers/usb/gadget/r8a66597-udc.c
Normal file
1635
drivers/usb/gadget/r8a66597-udc.c
Normal file
File diff suppressed because it is too large
Load diff
249
drivers/usb/gadget/r8a66597-udc.h
Normal file
249
drivers/usb/gadget/r8a66597-udc.h
Normal file
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@ -0,0 +1,249 @@
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/*
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* R8A66597 UDC
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*
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* Copyright (C) 2007-2009 Renesas Solutions Corp.
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*
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* Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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#ifndef __R8A66597_H__
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#define __R8A66597_H__
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#include <linux/usb/r8a66597.h>
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#define R8A66597_MAX_SAMPLING 10
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#define R8A66597_MAX_NUM_PIPE 8
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#define R8A66597_MAX_NUM_BULK 3
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#define R8A66597_MAX_NUM_ISOC 2
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#define R8A66597_MAX_NUM_INT 2
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#define R8A66597_BASE_PIPENUM_BULK 3
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#define R8A66597_BASE_PIPENUM_ISOC 1
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#define R8A66597_BASE_PIPENUM_INT 6
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#define R8A66597_BASE_BUFNUM 6
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#define R8A66597_MAX_BUFNUM 0x4F
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#define is_bulk_pipe(pipenum) \
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((pipenum >= R8A66597_BASE_PIPENUM_BULK) && \
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(pipenum < (R8A66597_BASE_PIPENUM_BULK + R8A66597_MAX_NUM_BULK)))
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#define is_interrupt_pipe(pipenum) \
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((pipenum >= R8A66597_BASE_PIPENUM_INT) && \
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(pipenum < (R8A66597_BASE_PIPENUM_INT + R8A66597_MAX_NUM_INT)))
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#define is_isoc_pipe(pipenum) \
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((pipenum >= R8A66597_BASE_PIPENUM_ISOC) && \
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(pipenum < (R8A66597_BASE_PIPENUM_ISOC + R8A66597_MAX_NUM_ISOC)))
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struct r8a66597_pipe_info {
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u16 pipe;
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u16 epnum;
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u16 maxpacket;
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u16 type;
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u16 interval;
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u16 dir_in;
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};
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struct r8a66597_request {
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struct usb_request req;
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struct list_head queue;
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};
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struct r8a66597_ep {
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struct usb_ep ep;
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struct r8a66597 *r8a66597;
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struct list_head queue;
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unsigned busy:1;
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unsigned internal_ccpl:1; /* use only control */
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/* this member can able to after r8a66597_enable */
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unsigned use_dma:1;
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u16 pipenum;
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u16 type;
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const struct usb_endpoint_descriptor *desc;
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/* register address */
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unsigned char fifoaddr;
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unsigned char fifosel;
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unsigned char fifoctr;
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unsigned char fifotrn;
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unsigned char pipectr;
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};
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struct r8a66597 {
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spinlock_t lock;
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unsigned long reg;
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struct r8a66597_platdata *pdata;
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struct usb_gadget gadget;
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struct usb_gadget_driver *driver;
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struct r8a66597_ep ep[R8A66597_MAX_NUM_PIPE];
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struct r8a66597_ep *pipenum2ep[R8A66597_MAX_NUM_PIPE];
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struct r8a66597_ep *epaddr2ep[16];
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struct timer_list timer;
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struct usb_request *ep0_req; /* for internal request */
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u16 ep0_data; /* for internal request */
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u16 old_vbus;
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u16 scount;
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u16 old_dvsq;
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/* pipe config */
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unsigned short bi_bufnum; /* bulk and isochronous's bufnum */
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unsigned char bulk;
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unsigned char interrupt;
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unsigned char isochronous;
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unsigned char num_dma;
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unsigned irq_sense_low:1;
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};
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#define gadget_to_r8a66597(_gadget) \
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container_of(_gadget, struct r8a66597, gadget)
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#define r8a66597_to_gadget(r8a66597) (&r8a66597->gadget)
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static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)
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{
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return inw(r8a66597->reg + offset);
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}
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static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
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unsigned long offset, u16 *buf,
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int len)
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{
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if (r8a66597->pdata->on_chip) {
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unsigned long fifoaddr = r8a66597->reg + offset;
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unsigned long count;
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union {
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unsigned long dword;
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unsigned char byte[4];
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} data;
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unsigned char *pb;
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int i;
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count = len / 4;
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insl(fifoaddr, buf, count);
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if (len & 0x00000003) {
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data.dword = inl(fifoaddr);
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pb = (unsigned char *)buf + count * 4;
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for (i = 0; i < (len & 0x00000003); i++)
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pb[i] = data.byte[i];
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}
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} else {
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len = (len + 1) / 2;
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insw(r8a66597->reg + offset, buf, len);
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}
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}
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static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
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unsigned long offset)
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{
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outw(val, r8a66597->reg + offset);
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}
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static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
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unsigned long offset, u16 *buf,
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int len)
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{
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unsigned long fifoaddr = r8a66597->reg + offset;
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if (r8a66597->pdata->on_chip) {
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unsigned long count;
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unsigned char *pb;
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int i;
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count = len / 4;
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outsl(fifoaddr, buf, count);
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if (len & 0x00000003) {
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pb = (unsigned char *)buf + count * 4;
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for (i = 0; i < (len & 0x00000003); i++) {
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if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
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outb(pb[i], fifoaddr + i);
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else
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outb(pb[i], fifoaddr + 3 - i);
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}
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}
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} else {
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int odd = len & 0x0001;
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len = len / 2;
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outsw(fifoaddr, buf, len);
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if (unlikely(odd)) {
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buf = &buf[len];
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outb((unsigned char)*buf, fifoaddr);
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}
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}
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}
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static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,
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u16 val, u16 pat, unsigned long offset)
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{
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u16 tmp;
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tmp = r8a66597_read(r8a66597, offset);
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tmp = tmp & (~pat);
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tmp = tmp | val;
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r8a66597_write(r8a66597, tmp, offset);
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}
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static inline u16 get_xtal_from_pdata(struct r8a66597_platdata *pdata)
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{
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u16 clock = 0;
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switch (pdata->xtal) {
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case R8A66597_PLATDATA_XTAL_12MHZ:
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clock = XTAL12;
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break;
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case R8A66597_PLATDATA_XTAL_24MHZ:
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clock = XTAL24;
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break;
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case R8A66597_PLATDATA_XTAL_48MHZ:
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clock = XTAL48;
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break;
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default:
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printk(KERN_ERR "r8a66597: platdata clock is wrong.\n");
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break;
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}
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return clock;
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}
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#define r8a66597_bclr(r8a66597, val, offset) \
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r8a66597_mdfy(r8a66597, 0, val, offset)
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#define r8a66597_bset(r8a66597, val, offset) \
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r8a66597_mdfy(r8a66597, val, 0, offset)
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#define get_pipectr_addr(pipenum) (PIPE1CTR + (pipenum - 1) * 2)
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#define enable_irq_ready(r8a66597, pipenum) \
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enable_pipe_irq(r8a66597, pipenum, BRDYENB)
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#define disable_irq_ready(r8a66597, pipenum) \
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disable_pipe_irq(r8a66597, pipenum, BRDYENB)
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#define enable_irq_empty(r8a66597, pipenum) \
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enable_pipe_irq(r8a66597, pipenum, BEMPENB)
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#define disable_irq_empty(r8a66597, pipenum) \
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disable_pipe_irq(r8a66597, pipenum, BEMPENB)
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#define enable_irq_nrdy(r8a66597, pipenum) \
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enable_pipe_irq(r8a66597, pipenum, NRDYENB)
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#define disable_irq_nrdy(r8a66597, pipenum) \
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disable_pipe_irq(r8a66597, pipenum, NRDYENB)
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#endif /* __R8A66597_H__ */
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