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OMAP: DSS2: RFBI: cleanup
The RFBI driver is quite messy. Remove dead and unneeded code and add statics to functions. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
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1d5952a868
commit
c42ced6391
2 changed files with 3 additions and 128 deletions
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@ -515,13 +515,6 @@ void hdmi_panel_exit(void);
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int rfbi_init_platform_driver(void);
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void rfbi_uninit_platform_driver(void);
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void rfbi_dump_regs(struct seq_file *s);
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int rfbi_configure(int rfbi_module, int bpp, int lines);
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void rfbi_enable_rfbi(bool enable);
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void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
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u16 height, void (callback)(void *data), void *data);
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void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t);
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unsigned long rfbi_get_max_tx_rate(void);
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int rfbi_init_display(struct omap_dss_device *display);
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#else
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static inline int rfbi_init_platform_driver(void)
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@ -66,9 +66,6 @@ struct rfbi_reg { u16 idx; };
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#define REG_FLD_MOD(idx, val, start, end) \
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rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
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/* To work around an RFBI transfer rate limitation */
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#define OMAP_RFBI_RATE_LIMIT 1
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enum omap_rfbi_cycleformat {
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OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0,
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OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1,
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@ -90,11 +87,6 @@ enum omap_rfbi_parallelmode {
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OMAP_DSS_RFBI_PARALLELMODE_16 = 3,
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};
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enum update_cmd {
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RFBI_CMD_UPDATE = 0,
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RFBI_CMD_SYNC = 1,
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};
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static int rfbi_convert_timings(struct rfbi_timings *t);
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static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div);
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@ -115,22 +107,9 @@ static struct {
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struct omap_dss_device *dssdev[2];
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struct kfifo cmd_fifo;
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spinlock_t cmd_lock;
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struct completion cmd_done;
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atomic_t cmd_fifo_full;
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atomic_t cmd_pending;
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struct semaphore bus_lock;
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} rfbi;
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struct update_region {
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u16 x;
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u16 y;
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u16 w;
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u16 h;
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};
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static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
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{
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__raw_writel(val, rfbi.base + idx.idx);
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@ -305,7 +284,7 @@ void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
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}
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EXPORT_SYMBOL(omap_rfbi_write_pixels);
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void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
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static void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
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u16 height, void (*callback)(void *data), void *data)
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{
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u32 l;
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@ -345,8 +324,6 @@ static void framedone_callback(void *data, u32 mask)
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if (callback != NULL)
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callback(rfbi.framedone_callback_data);
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atomic_set(&rfbi.cmd_pending, 0);
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}
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#if 1 /* VERBOSE */
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@ -436,7 +413,7 @@ static int calc_extif_timings(struct rfbi_timings *t)
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}
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void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
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static void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
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{
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int r;
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@ -471,59 +448,6 @@ static int ps_to_rfbi_ticks(int time, int div)
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return ret;
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}
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#ifdef OMAP_RFBI_RATE_LIMIT
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unsigned long rfbi_get_max_tx_rate(void)
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{
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unsigned long l4_rate, dss1_rate;
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int min_l4_ticks = 0;
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int i;
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/* According to TI this can't be calculated so make the
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* adjustments for a couple of known frequencies and warn for
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* others.
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*/
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static const struct {
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unsigned long l4_clk; /* HZ */
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unsigned long dss1_clk; /* HZ */
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unsigned long min_l4_ticks;
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} ftab[] = {
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{ 55, 132, 7, }, /* 7.86 MPix/s */
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{ 110, 110, 12, }, /* 9.16 MPix/s */
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{ 110, 132, 10, }, /* 11 Mpix/s */
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{ 120, 120, 10, }, /* 12 Mpix/s */
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{ 133, 133, 10, }, /* 13.3 Mpix/s */
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};
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l4_rate = rfbi.l4_khz / 1000;
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dss1_rate = dss_clk_get_rate(DSS_CLK_FCK) / 1000000;
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for (i = 0; i < ARRAY_SIZE(ftab); i++) {
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/* Use a window instead of an exact match, to account
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* for different DPLL multiplier / divider pairs.
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*/
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if (abs(ftab[i].l4_clk - l4_rate) < 3 &&
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abs(ftab[i].dss1_clk - dss1_rate) < 3) {
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min_l4_ticks = ftab[i].min_l4_ticks;
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break;
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}
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}
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if (i == ARRAY_SIZE(ftab)) {
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/* Can't be sure, return anyway the maximum not
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* rate-limited. This might cause a problem only for the
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* tearing synchronisation.
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*/
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DSSERR("can't determine maximum RFBI transfer rate\n");
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return rfbi.l4_khz * 1000;
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}
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return rfbi.l4_khz * 1000 / min_l4_ticks;
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}
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#else
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int rfbi_get_max_tx_rate(void)
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{
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return rfbi.l4_khz * 1000;
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}
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#endif
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static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
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{
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*clk_period = 1000000000 / rfbi.l4_khz;
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@ -683,44 +607,7 @@ int omap_rfbi_enable_te(bool enable, unsigned line)
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}
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EXPORT_SYMBOL(omap_rfbi_enable_te);
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#if 0
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static void rfbi_enable_config(int enable1, int enable2)
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{
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u32 l;
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int cs = 0;
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if (enable1)
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cs |= 1<<0;
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if (enable2)
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cs |= 1<<1;
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rfbi_enable_clocks(1);
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l = rfbi_read_reg(RFBI_CONTROL);
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l = FLD_MOD(l, cs, 3, 2);
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l = FLD_MOD(l, 0, 1, 1);
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rfbi_write_reg(RFBI_CONTROL, l);
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l = rfbi_read_reg(RFBI_CONFIG(0));
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l = FLD_MOD(l, 0, 3, 2); /* TRIGGERMODE: ITE */
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/*l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
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/*l |= FLD_VAL(0, 8, 7); */ /* L4FORMAT, 1pix/L4 */
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l = FLD_MOD(l, 0, 16, 16); /* A0POLARITY */
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l = FLD_MOD(l, 1, 20, 20); /* TE_VSYNC_POLARITY */
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l = FLD_MOD(l, 1, 21, 21); /* HSYNCPOLARITY */
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l = FLD_MOD(l, OMAP_DSS_RFBI_PARALLELMODE_8, 1, 0);
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rfbi_write_reg(RFBI_CONFIG(0), l);
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rfbi_enable_clocks(0);
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}
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#endif
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int rfbi_configure(int rfbi_module, int bpp, int lines)
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static int rfbi_configure(int rfbi_module, int bpp, int lines)
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{
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u32 l;
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int cycle1 = 0, cycle2 = 0, cycle3 = 0;
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@ -1022,13 +909,8 @@ static int omap_rfbihw_probe(struct platform_device *pdev)
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rfbi.pdev = pdev;
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spin_lock_init(&rfbi.cmd_lock);
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sema_init(&rfbi.bus_lock, 1);
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init_completion(&rfbi.cmd_done);
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atomic_set(&rfbi.cmd_fifo_full, 0);
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atomic_set(&rfbi.cmd_pending, 0);
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rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0);
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if (!rfbi_mem) {
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DSSERR("can't get IORESOURCE_MEM RFBI\n");
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