drm/amdgpu: Use new mode2 reset interface for RV.

Integrate the mode2 reset into rest sequence.

v2:
Check ppfuncs pointer for NULL

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Andrey Grodzovsky 2019-07-26 14:07:42 -04:00 committed by Alex Deucher
parent e97204ead6
commit c43b849f89
2 changed files with 18 additions and 8 deletions

View File

@ -3525,6 +3525,7 @@ bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev)
case CHIP_VEGA20:
case CHIP_VEGA10:
case CHIP_VEGA12:
case CHIP_RAVEN:
break;
default:
goto disabled;

View File

@ -509,6 +509,15 @@ static int soc15_asic_baco_reset(struct amdgpu_device *adev)
return 0;
}
static int soc15_mode2_reset(struct amdgpu_device *adev)
{
if (!adev->powerplay.pp_funcs ||
!adev->powerplay.pp_funcs->asic_reset_mode_2)
return -ENOENT;
return adev->powerplay.pp_funcs->asic_reset_mode_2(adev->powerplay.pp_handle);
}
static enum amd_reset_method
soc15_asic_reset_method(struct amdgpu_device *adev)
{
@ -547,14 +556,14 @@ soc15_asic_reset_method(struct amdgpu_device *adev)
static int soc15_asic_reset(struct amdgpu_device *adev)
{
int ret;
if (soc15_asic_reset_method(adev) == AMD_RESET_METHOD_BACO)
ret = soc15_asic_baco_reset(adev);
else
ret = soc15_asic_mode1_reset(adev);
return ret;
switch (soc15_asic_reset_method(adev)) {
case AMD_RESET_METHOD_BACO:
return soc15_asic_baco_reset(adev);
case AMD_RESET_METHOD_MODE2:
return soc15_mode2_reset(adev);
default:
return soc15_asic_mode1_reset(adev);
}
}
/*static int soc15_set_uvd_clock(struct amdgpu_device *adev, u32 clock,