From cb4ab22f722b6d550a078747390a26570fb0e208 Mon Sep 17 00:00:00 2001 From: Rickard Strandqvist Date: Mon, 7 Jul 2014 04:52:31 -0700 Subject: [PATCH 1/7] ARM: omap2+: usb-tusb6010.c: Cleaning up variable is set more than once A struct member variable is set to the same value more than once This was found using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/usb-tusb6010.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index e832bc7b8e2d..8333400898fb 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c @@ -95,7 +95,6 @@ static int tusb_set_sync_mode(unsigned sysclk_ps) dev_t.t_avdp_w = t_scsnh_advnh; dev_t.cyc_aavdh_we = 3; dev_t.cyc_wpl = 6; - dev_t.t_ce_rdyz = 7000; gpmc_calc_timings(&t, &tusb_sync, &dev_t); From 07b9b3d9e429728c89586a54a2ed715b2a7b0edf Mon Sep 17 00:00:00 2001 From: "Andrii.Tseglytskyi" Date: Thu, 5 Jun 2014 20:11:12 -0500 Subject: [PATCH 2/7] ARM: dts: OMAP5: Add device nodes for ABB Add ABB device nodes for OMAP5 family of devices. Data is based on final production OMAP543x Technical Reference Manual revision Z (April 2013). Final production Data Manual for OMAP5432 SWPS050F(APRIL 2014). [nm@ti.com: co-developer and updates to latest documentation] Signed-off-by: Nishanth Menon Signed-off-by: Andrii.Tseglytskyi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap5.dtsi | 60 ++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index a4ed54988866..8eee6fbef7ad 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -985,6 +985,66 @@ hdmi: encoder@58060000 { dma-names = "audio_tx"; }; }; + + abb_mpu: regulator-abb-mpu { + compatible = "ti,abb-v2"; + regulator-name = "abb_mpu"; + #address-cells = <0>; + #size-cells = <0>; + clocks = <&sys_clkin>; + ti,settling-time = <50>; + ti,clock-cycles = <16>; + + reg = <0x4ae07cdc 0x8>, <0x4ae06014 0x4>, + <0x4a0021c4 0x8>, <0x4ae0c318 0x4>; + reg-names = "base-address", "int-address", + "efuse-address", "ldo-address"; + ti,tranxdone-status-mask = <0x80>; + /* LDOVBBMPU_MUX_CTRL */ + ti,ldovbb-override-mask = <0x400>; + /* LDOVBBMPU_VSET_OUT */ + ti,ldovbb-vset-mask = <0x1F>; + + /* + * NOTE: only FBB mode used but actual vset will + * determine final biasing + */ + ti,abb_info = < + /*uV ABB efuse rbb_m fbb_m vset_m*/ + 1060000 0 0x0 0 0x02000000 0x01F00000 + 1250000 0 0x4 0 0x02000000 0x01F00000 + >; + }; + + abb_mm: regulator-abb-mm { + compatible = "ti,abb-v2"; + regulator-name = "abb_mm"; + #address-cells = <0>; + #size-cells = <0>; + clocks = <&sys_clkin>; + ti,settling-time = <50>; + ti,clock-cycles = <16>; + + reg = <0x4ae07ce4 0x8>, <0x4ae06010 0x4>, + <0x4a0021a4 0x8>, <0x4ae0c314 0x4>; + reg-names = "base-address", "int-address", + "efuse-address", "ldo-address"; + ti,tranxdone-status-mask = <0x80000000>; + /* LDOVBBMM_MUX_CTRL */ + ti,ldovbb-override-mask = <0x400>; + /* LDOVBBMM_VSET_OUT */ + ti,ldovbb-vset-mask = <0x1F>; + + /* + * NOTE: only FBB mode used but actual vset will + * determine final biasing + */ + ti,abb_info = < + /*uV ABB efuse rbb_m fbb_m vset_m*/ + 1025000 0 0x0 0 0x02000000 0x01F00000 + 1120000 0 0x4 0 0x02000000 0x01F00000 + >; + }; }; }; From e6f990a883b64c803cac15fa1bac0c8279f52288 Mon Sep 17 00:00:00 2001 From: Nicholas Krause Date: Wed, 2 Jul 2014 21:31:19 -0400 Subject: [PATCH 3/7] omap16xx: Removes fixme no longer needed in ocpi_enable() This removes the FIXME message above ocpi_enable being declared for proper locking in this function. As of the current kernel verisons there is no need for locking as only one driver uses this function currently and therefore there is no need for real locking requirements. Signed-off-by: Nicholas Krause Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/ocpi.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-omap1/ocpi.c b/arch/arm/mach-omap1/ocpi.c index 238170cab5b7..44a3d19eb481 100644 --- a/arch/arm/mach-omap1/ocpi.c +++ b/arch/arm/mach-omap1/ocpi.c @@ -55,7 +55,6 @@ static struct clk *ocpi_ck; /* * Enables device access to OMAP buses via the OCPI bridge - * FIXME: Add locking */ int ocpi_enable(void) { From 97a288ba2cfaf18ae2a8d19b8d9ea8cb3fbe301a Mon Sep 17 00:00:00 2001 From: Rostislav Lisovy Date: Wed, 4 Jun 2014 16:24:35 +0200 Subject: [PATCH 4/7] ARM: omap2+: gpmc-nand: Use dynamic platform_device_alloc() GPMC controller supports up to 8 memory devices connected to it. Since there is one statically allocated "struct platform_device gpmc_nand_device" it is not possible to configure the system to use more than one NAND device connected to the GPMC. This modification makes it possible to use up to 8 NAND devices connected to the GPMC controller. Signed-off-by: Rostislav Lisovy Signed-off-by: Roger Quadros --- arch/arm/mach-omap2/gpmc-nand.c | 79 +++++++++++++++------------------ 1 file changed, 37 insertions(+), 42 deletions(-) diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index 17cd39360afe..7ab486eeb769 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c @@ -24,25 +24,6 @@ /* minimum size for IO mapping */ #define NAND_IO_SIZE 4 -static struct resource gpmc_nand_resource[] = { - { - .flags = IORESOURCE_MEM, - }, - { - .flags = IORESOURCE_IRQ, - }, - { - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device gpmc_nand_device = { - .name = "omap2-nand", - .id = 0, - .num_resources = ARRAY_SIZE(gpmc_nand_resource), - .resource = gpmc_nand_resource, -}; - static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt) { /* platforms which support all ECC schemes */ @@ -93,43 +74,41 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, { int err = 0; struct gpmc_settings s; - struct device *dev = &gpmc_nand_device.dev; + struct platform_device *pdev; + struct resource gpmc_nand_res[] = { + { .flags = IORESOURCE_MEM, }, + { .flags = IORESOURCE_IRQ, }, + { .flags = IORESOURCE_IRQ, }, + }; - memset(&s, 0, sizeof(struct gpmc_settings)); - - gpmc_nand_device.dev.platform_data = gpmc_nand_data; + BUG_ON(gpmc_nand_data->cs >= GPMC_CS_NUM); err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, - (unsigned long *)&gpmc_nand_resource[0].start); + (unsigned long *)&gpmc_nand_res[0].start); if (err < 0) { - dev_err(dev, "Cannot request GPMC CS %d, error %d\n", - gpmc_nand_data->cs, err); + pr_err("omap2-gpmc: Cannot request GPMC CS %d, error %d\n", + gpmc_nand_data->cs, err); return err; } - - gpmc_nand_resource[0].end = gpmc_nand_resource[0].start + - NAND_IO_SIZE - 1; - - gpmc_nand_resource[1].start = - gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE); - gpmc_nand_resource[2].start = - gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT); + gpmc_nand_res[0].end = gpmc_nand_res[0].start + NAND_IO_SIZE - 1; + gpmc_nand_res[1].start = gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE); + gpmc_nand_res[2].start = gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT); if (gpmc_t) { err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t); if (err < 0) { - dev_err(dev, "Unable to set gpmc timings: %d\n", err); + pr_err("omap2-gpmc: Unable to set gpmc timings: %d\n", err); return err; } } + memset(&s, 0, sizeof(struct gpmc_settings)); if (gpmc_nand_data->of_node) gpmc_read_settings_dt(gpmc_nand_data->of_node, &s); else gpmc_set_legacy(gpmc_nand_data, &s); s.device_nand = true; - err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s); if (err < 0) goto out_free_cs; @@ -141,18 +120,34 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs); if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) { - dev_err(dev, "Unsupported NAND ECC scheme selected\n"); - return -EINVAL; + pr_err("omap2-nand: Unsupported NAND ECC scheme selected\n"); + err = -EINVAL; + goto out_free_cs; } - err = platform_device_register(&gpmc_nand_device); - if (err < 0) { - dev_err(dev, "Unable to register NAND device\n"); - goto out_free_cs; + + pdev = platform_device_alloc("omap2-nand", gpmc_nand_data->cs); + if (pdev) { + err = platform_device_add_resources(pdev, gpmc_nand_res, + ARRAY_SIZE(gpmc_nand_res)); + if (!err) + pdev->dev.platform_data = gpmc_nand_data; + } else { + err = -ENOMEM; + } + if (err) + goto out_free_pdev; + + err = platform_device_add(pdev); + if (err) { + dev_err(&pdev->dev, "Unable to register NAND device\n"); + goto out_free_pdev; } return 0; +out_free_pdev: + platform_device_put(pdev); out_free_cs: gpmc_cs_free(gpmc_nand_data->cs); From 7310d99ffcd15abe6c4168c36bb63a8e7dee617a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 19 Jul 2014 04:45:02 +0900 Subject: [PATCH 5/7] ARM: EXYNOS: Fix build breakge with PM_SLEEP=n Fix building of exynos_defconfig with disabled PM_SLEEP: CONFIG_PM_SLEEP=n CONFIG_PM_SLEEP_SMP=n CONFIG_SUSPEND=n by moving functions for power up/down of CPU and cluster to platsmp.c The build error messages: arch/arm/mach-exynos/built-in.o: In function `exynos_boot_secondary': arch/arm/mach-exynos/platsmp.c:111: undefined reference to `exynos_cpu_power_state' arch/arm/mach-exynos/platsmp.c:112: undefined reference to `exynos_cpu_power_up' arch/arm/mach-exynos/platsmp.c:116: undefined reference to `exynos_cpu_power_state' make: *** [vmlinux] Error 1 Signed-off-by: Krzysztof Kozlowski Reviewed-by: Tomasz Figa , Signed-off-by: Kukjin Kim Signed-off-by: Olof Johansson --- arch/arm/mach-exynos/platsmp.c | 66 ++++++++++++++++++++++++++++++++++ arch/arm/mach-exynos/pm.c | 66 ---------------------------------- 2 files changed, 66 insertions(+), 66 deletions(-) diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 1c8d31e39520..29500da24dd5 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -32,6 +32,72 @@ extern void exynos4_secondary_startup(void); +/** + * exynos_core_power_down : power down the specified cpu + * @cpu : the cpu to power down + * + * Power down the specified cpu. The sequence must be finished by a + * call to cpu_do_idle() + * + */ +void exynos_cpu_power_down(int cpu) +{ + __raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu)); +} + +/** + * exynos_cpu_power_up : power up the specified cpu + * @cpu : the cpu to power up + * + * Power up the specified cpu + */ +void exynos_cpu_power_up(int cpu) +{ + __raw_writel(S5P_CORE_LOCAL_PWR_EN, + EXYNOS_ARM_CORE_CONFIGURATION(cpu)); +} + +/** + * exynos_cpu_power_state : returns the power state of the cpu + * @cpu : the cpu to retrieve the power state from + * + */ +int exynos_cpu_power_state(int cpu) +{ + return (__raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) & + S5P_CORE_LOCAL_PWR_EN); +} + +/** + * exynos_cluster_power_down : power down the specified cluster + * @cluster : the cluster to power down + */ +void exynos_cluster_power_down(int cluster) +{ + __raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster)); +} + +/** + * exynos_cluster_power_up : power up the specified cluster + * @cluster : the cluster to power up + */ +void exynos_cluster_power_up(int cluster) +{ + __raw_writel(S5P_CORE_LOCAL_PWR_EN, + EXYNOS_COMMON_CONFIGURATION(cluster)); +} + +/** + * exynos_cluster_power_state : returns the power state of the cluster + * @cluster : the cluster to retrieve the power state from + * + */ +int exynos_cluster_power_state(int cluster) +{ + return (__raw_readl(EXYNOS_COMMON_STATUS(cluster)) & + S5P_CORE_LOCAL_PWR_EN); +} + static inline void __iomem *cpu_boot_reg_base(void) { if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 202ca73e49c4..20a8e0efd5db 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -100,72 +100,6 @@ static int exynos_irq_set_wake(struct irq_data *data, unsigned int state) return -ENOENT; } -/** - * exynos_core_power_down : power down the specified cpu - * @cpu : the cpu to power down - * - * Power down the specified cpu. The sequence must be finished by a - * call to cpu_do_idle() - * - */ -void exynos_cpu_power_down(int cpu) -{ - __raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu)); -} - -/** - * exynos_cpu_power_up : power up the specified cpu - * @cpu : the cpu to power up - * - * Power up the specified cpu - */ -void exynos_cpu_power_up(int cpu) -{ - __raw_writel(S5P_CORE_LOCAL_PWR_EN, - EXYNOS_ARM_CORE_CONFIGURATION(cpu)); -} - -/** - * exynos_cpu_power_state : returns the power state of the cpu - * @cpu : the cpu to retrieve the power state from - * - */ -int exynos_cpu_power_state(int cpu) -{ - return (__raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) & - S5P_CORE_LOCAL_PWR_EN); -} - -/** - * exynos_cluster_power_down : power down the specified cluster - * @cluster : the cluster to power down - */ -void exynos_cluster_power_down(int cluster) -{ - __raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster)); -} - -/** - * exynos_cluster_power_up : power up the specified cluster - * @cluster : the cluster to power up - */ -void exynos_cluster_power_up(int cluster) -{ - __raw_writel(S5P_CORE_LOCAL_PWR_EN, - EXYNOS_COMMON_CONFIGURATION(cluster)); -} - -/** - * exynos_cluster_power_state : returns the power state of the cluster - * @cluster : the cluster to retrieve the power state from - * - */ -int exynos_cluster_power_state(int cluster) -{ - return (__raw_readl(EXYNOS_COMMON_STATUS(cluster)) & - S5P_CORE_LOCAL_PWR_EN); -} - #define EXYNOS_BOOT_VECTOR_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \ S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \ (sysram_base_addr + 0x24) : S5P_INFORM0)) From f53b2bffc4e09a1c4bf3aff99ea27ef2bc274bfb Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Wed, 4 Jun 2014 17:30:24 +0100 Subject: [PATCH 6/7] MAINTAINERS: Add sdhci-st file to ARCH/STI architecture Signed-off-by: Peter Griffin Acked-by: Lee Jones Acked-by: Maxime Coquelin Signed-off-by: Olof Johansson --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index e31c87474739..a36b11c77173 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1357,6 +1357,7 @@ F: drivers/pinctrl/pinctrl-st.c F: drivers/media/rc/st_rc.c F: drivers/i2c/busses/i2c-st.c F: drivers/tty/serial/st-asc.c +F: drivers/mmc/host/sdhci-st.c ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT M: Lennert Buytenhek From fc5130de8309727540de7cae0199764af34b0919 Mon Sep 17 00:00:00 2001 From: Himangi Saraogi Date: Wed, 30 Jul 2014 11:37:35 +0100 Subject: [PATCH 7/7] drivers: CCI: Correct use of ! and & In commit ae91d60ba88ef0bdb1b5e9b2363bd52fc45d2af7, a bug was fixed that involved converting !x & y to !(x & y). The code below shows the same pattern, and thus should perhaps be fixed in the same way. The Coccinelle semantic patch that makes this change is as follows: // @@ expression E1,E2; @@ ( !E1 & !E2 | - !E1 & E2 + !(E1 & E2) ) // Signed-off-by: Himangi Saraogi Acked-by: Julia Lawall Acked-by: Punit Agrawal Signed-off-by: Olof Johansson --- drivers/bus/arm-cci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c index 5a86da97a70b..7af78df241f2 100644 --- a/drivers/bus/arm-cci.c +++ b/drivers/bus/arm-cci.c @@ -397,7 +397,8 @@ static irqreturn_t pmu_handle_irq(int irq_num, void *dev) hw_counter = &event->hw; /* Did this counter overflow? */ - if (!pmu_read_register(idx, CCI_PMU_OVRFLW) & CCI_PMU_OVRFLW_FLAG) + if (!(pmu_read_register(idx, CCI_PMU_OVRFLW) & + CCI_PMU_OVRFLW_FLAG)) continue; pmu_write_register(CCI_PMU_OVRFLW_FLAG, idx, CCI_PMU_OVRFLW);