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crypto: hisilicon - enable new error types for QM
QM adds 'qm_mailbox_timeout' and 'qm_flr_timeout' hardware error types on Kunpeng930. This patch enables the new error types and configures the error types as NFE. Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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2 changed files with 8 additions and 3 deletions
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@ -136,9 +136,9 @@
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#define QM_DFX_CNT_CLR_CE 0x100118
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#define QM_ABNORMAL_INT_SOURCE 0x100000
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#define QM_ABNORMAL_INT_SOURCE_CLR GENMASK(12, 0)
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#define QM_ABNORMAL_INT_SOURCE_CLR GENMASK(14, 0)
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#define QM_ABNORMAL_INT_MASK 0x100004
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#define QM_ABNORMAL_INT_MASK_VALUE 0x1fff
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#define QM_ABNORMAL_INT_MASK_VALUE 0x7fff
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#define QM_ABNORMAL_INT_STATUS 0x100008
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#define QM_ABNORMAL_INT_SET 0x10000c
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#define QM_ABNORMAL_INF00 0x100010
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@ -391,6 +391,8 @@ static const struct hisi_qm_hw_error qm_hw_error[] = {
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{ .int_msk = BIT(10), .msg = "qm_db_timeout" },
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{ .int_msk = BIT(11), .msg = "qm_of_fifo_of" },
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{ .int_msk = BIT(12), .msg = "qm_db_random_invalid" },
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{ .int_msk = BIT(13), .msg = "qm_mailbox_timeout" },
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{ .int_msk = BIT(14), .msg = "qm_flr_timeout" },
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{ /* sentinel */ }
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};
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@ -64,10 +64,13 @@
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#define QM_DB_TIMEOUT BIT(10)
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#define QM_OF_FIFO_OF BIT(11)
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#define QM_DB_RANDOM_INVALID BIT(12)
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#define QM_MAILBOX_TIMEOUT BIT(13)
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#define QM_FLR_TIMEOUT BIT(14)
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#define QM_BASE_NFE (QM_AXI_RRESP | QM_AXI_BRESP | QM_ECC_MBIT | \
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QM_ACC_GET_TASK_TIMEOUT | QM_DB_TIMEOUT | \
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QM_OF_FIFO_OF | QM_DB_RANDOM_INVALID)
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QM_OF_FIFO_OF | QM_DB_RANDOM_INVALID | \
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QM_MAILBOX_TIMEOUT | QM_FLR_TIMEOUT)
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#define QM_BASE_CE QM_ECC_1BIT
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#define QM_Q_DEPTH 1024
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