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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-12 13:55:32 +00:00
Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: [libata] pata_legacy: for VLB 32bit PIO don't try tricks with slop [libata] pata_amd: program FIFO sata_mv: fix SoC interrupt breakage pata_it821x: resume from hibernation fails with RAID volume
This commit is contained in:
commit
c4eb1bf63f
4 changed files with 75 additions and 31 deletions
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@ -24,7 +24,7 @@
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#include <linux/libata.h>
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#define DRV_NAME "pata_amd"
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#define DRV_VERSION "0.3.11"
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#define DRV_VERSION "0.4.1"
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/**
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* timing_setup - shared timing computation and load
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@ -145,6 +145,13 @@ static int amd_pre_reset(struct ata_link *link, unsigned long deadline)
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return ata_sff_prereset(link, deadline);
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}
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/**
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* amd_cable_detect - report cable type
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* @ap: port
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*
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* AMD controller/BIOS setups record the cable type in word 0x42
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*/
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static int amd_cable_detect(struct ata_port *ap)
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{
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static const u32 bitmask[2] = {0x03, 0x0C};
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@ -157,6 +164,40 @@ static int amd_cable_detect(struct ata_port *ap)
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return ATA_CBL_PATA40;
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}
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/**
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* amd_fifo_setup - set the PIO FIFO for ATA/ATAPI
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* @ap: ATA interface
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* @adev: ATA device
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*
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* Set the PCI fifo for this device according to the devices present
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* on the bus at this point in time. We need to turn the post write buffer
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* off for ATAPI devices as we may need to issue a word sized write to the
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* device as the final I/O
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*/
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static void amd_fifo_setup(struct ata_port *ap)
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{
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struct ata_device *adev;
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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static const u8 fifobit[2] = { 0xC0, 0x30};
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u8 fifo = fifobit[ap->port_no];
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u8 r;
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ata_for_each_dev(adev, &ap->link, ENABLED) {
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if (adev->class == ATA_DEV_ATAPI)
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fifo = 0;
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}
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if (pdev->device == PCI_DEVICE_ID_AMD_VIPER_7411) /* FIFO is broken */
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fifo = 0;
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/* On the later chips the read prefetch bits become no-op bits */
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pci_read_config_byte(pdev, 0x41, &r);
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r &= ~fifobit[ap->port_no];
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r |= fifo;
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pci_write_config_byte(pdev, 0x41, r);
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}
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/**
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* amd33_set_piomode - set initial PIO mode data
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* @ap: ATA interface
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@ -167,21 +208,25 @@ static int amd_cable_detect(struct ata_port *ap)
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static void amd33_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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amd_fifo_setup(ap);
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timing_setup(ap, adev, 0x40, adev->pio_mode, 1);
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}
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static void amd66_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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amd_fifo_setup(ap);
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timing_setup(ap, adev, 0x40, adev->pio_mode, 2);
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}
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static void amd100_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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amd_fifo_setup(ap);
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timing_setup(ap, adev, 0x40, adev->pio_mode, 3);
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}
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static void amd133_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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amd_fifo_setup(ap);
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timing_setup(ap, adev, 0x40, adev->pio_mode, 4);
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}
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@ -397,6 +442,16 @@ static struct ata_port_operations nv133_port_ops = {
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.set_dmamode = nv133_set_dmamode,
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};
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static void amd_clear_fifo(struct pci_dev *pdev)
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{
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u8 fifo;
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/* Disable the FIFO, the FIFO logic will re-enable it as
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appropriate */
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pci_read_config_byte(pdev, 0x41, &fifo);
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fifo &= 0x0F;
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pci_write_config_byte(pdev, 0x41, fifo);
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}
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static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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static const struct ata_port_info info[10] = {
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@ -503,14 +558,8 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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if (type < 3)
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ata_pci_bmdma_clear_simplex(pdev);
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/* Check for AMD7411 */
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if (type == 3)
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/* FIFO is broken */
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pci_write_config_byte(pdev, 0x41, fifo & 0x0F);
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else
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pci_write_config_byte(pdev, 0x41, fifo | 0xF0);
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if (pdev->vendor == PCI_VENDOR_ID_AMD)
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amd_clear_fifo(pdev);
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/* Cable detection on Nvidia chips doesn't work too well,
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* cache BIOS programmed UDMA mode.
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*/
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@ -536,18 +585,11 @@ static int amd_reinit_one(struct pci_dev *pdev)
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return rc;
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if (pdev->vendor == PCI_VENDOR_ID_AMD) {
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u8 fifo;
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pci_read_config_byte(pdev, 0x41, &fifo);
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if (pdev->device == PCI_DEVICE_ID_AMD_VIPER_7411)
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/* FIFO is broken */
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pci_write_config_byte(pdev, 0x41, fifo & 0x0F);
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else
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pci_write_config_byte(pdev, 0x41, fifo | 0xF0);
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amd_clear_fifo(pdev);
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if (pdev->device == PCI_DEVICE_ID_AMD_VIPER_7409 ||
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pdev->device == PCI_DEVICE_ID_AMD_COBRA_7401)
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ata_pci_bmdma_clear_simplex(pdev);
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}
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ata_host_resume(host);
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return 0;
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}
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@ -557,6 +557,9 @@ static unsigned int it821x_read_id(struct ata_device *adev,
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id[83] |= 0x4400; /* Word 83 is valid and LBA48 */
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id[86] |= 0x0400; /* LBA48 on */
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id[ATA_ID_MAJOR_VER] |= 0x1F;
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/* Clear the serial number because it's different each boot
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which breaks validation on resume */
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memset(&id[ATA_ID_SERNO], 0x20, ATA_ID_SERNO_LEN);
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}
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return err_mask;
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}
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@ -283,9 +283,10 @@ static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev)
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static unsigned int pdc_data_xfer_vlb(struct ata_device *dev,
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unsigned char *buf, unsigned int buflen, int rw)
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{
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if (ata_id_has_dword_io(dev->id)) {
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int slop = buflen & 3;
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/* 32bit I/O capable *and* we need to write a whole number of dwords */
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if (ata_id_has_dword_io(dev->id) && (slop == 0 || slop == 3)) {
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struct ata_port *ap = dev->link->ap;
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int slop = buflen & 3;
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unsigned long flags;
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local_irq_save(flags);
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@ -735,7 +736,7 @@ static unsigned int vlb32_data_xfer(struct ata_device *adev, unsigned char *buf,
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struct ata_port *ap = adev->link->ap;
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int slop = buflen & 3;
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if (ata_id_has_dword_io(adev->id)) {
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if (ata_id_has_dword_io(adev->id) && (slop == 0 || slop == 3)) {
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if (rw == WRITE)
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iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
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else
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@ -3114,19 +3114,17 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx)
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writelfl(0, hc_mmio + HC_IRQ_CAUSE_OFS);
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}
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if (!IS_SOC(hpriv)) {
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/* Clear any currently outstanding host interrupt conditions */
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writelfl(0, mmio + hpriv->irq_cause_ofs);
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/* Clear any currently outstanding host interrupt conditions */
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writelfl(0, mmio + hpriv->irq_cause_ofs);
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/* and unmask interrupt generation for host regs */
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writelfl(hpriv->unmask_all_irqs, mmio + hpriv->irq_mask_ofs);
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/* and unmask interrupt generation for host regs */
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writelfl(hpriv->unmask_all_irqs, mmio + hpriv->irq_mask_ofs);
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/*
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* enable only global host interrupts for now.
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* The per-port interrupts get done later as ports are set up.
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*/
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mv_set_main_irq_mask(host, 0, PCI_ERR);
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}
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/*
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* enable only global host interrupts for now.
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* The per-port interrupts get done later as ports are set up.
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*/
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mv_set_main_irq_mask(host, 0, PCI_ERR);
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done:
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return rc;
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}
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