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mtd: spi-nor: Move SST bits out of core.c
Create a SPI NOR manufacturer driver for SST chips, and move the SST definitions outside of core.c. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
This commit is contained in:
Boris Brezillon
Tudor Ambarus
parent
0173c32a0e
commit
c53b3f92b4
4 changed files with 156 additions and 120 deletions
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@ -12,4 +12,5 @@ spi-nor-objs += issi.o
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spi-nor-objs += macronix.o
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spi-nor-objs += micron-st.o
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spi-nor-objs += spansion.o
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spi-nor-objs += sst.o
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obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o
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@ -1995,25 +1995,6 @@ int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor)
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* old entries may be missing 4K flag.
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*/
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static const struct flash_info spi_nor_ids[] = {
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/* SST -- large erase sizes are "overlays", "sectors" are 4K */
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{ "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, SECT_4K | SST_WRITE) },
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{ "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
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{ "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K | SST_WRITE) },
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{ "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K | SST_WRITE) },
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{ "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, SECT_4K) },
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{ "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, SECT_4K | SST_WRITE) },
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{ "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K | SST_WRITE) },
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{ "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K | SST_WRITE) },
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{ "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4, SECT_4K) },
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{ "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8, SECT_4K) },
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{ "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K | SST_WRITE) },
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{ "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
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{ "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32, SECT_4K |
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SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32, SECT_4K |
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SPI_NOR_DUAL_READ) },
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{ "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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/* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
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{ "w25x05", INFO(0xef3010, 0, 64 * 1024, 1, SECT_4K) },
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{ "w25x10", INFO(0xef3011, 0, 64 * 1024, 2, SECT_4K) },
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@ -2114,6 +2095,7 @@ static const struct spi_nor_manufacturer *manufacturers[] = {
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&spi_nor_micron,
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&spi_nor_st,
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&spi_nor_spansion,
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&spi_nor_sst,
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};
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static const struct flash_info *
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@ -2214,92 +2196,6 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
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return ret;
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}
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static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
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size_t *retlen, const u_char *buf)
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{
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struct spi_nor *nor = mtd_to_spi_nor(mtd);
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size_t actual = 0;
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int ret;
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dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
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ret = spi_nor_lock_and_prep(nor);
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if (ret)
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return ret;
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ret = spi_nor_write_enable(nor);
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if (ret)
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goto out;
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nor->sst_write_second = false;
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/* Start write from odd address. */
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if (to % 2) {
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nor->program_opcode = SPINOR_OP_BP;
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/* write one byte. */
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ret = spi_nor_write_data(nor, to, 1, buf);
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if (ret < 0)
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goto out;
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WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret);
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ret = spi_nor_wait_till_ready(nor);
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if (ret)
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goto out;
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to++;
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actual++;
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}
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/* Write out most of the data here. */
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for (; actual < len - 1; actual += 2) {
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nor->program_opcode = SPINOR_OP_AAI_WP;
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/* write two bytes. */
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ret = spi_nor_write_data(nor, to, 2, buf + actual);
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if (ret < 0)
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goto out;
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WARN(ret != 2, "While writing 2 bytes written %i bytes\n", ret);
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ret = spi_nor_wait_till_ready(nor);
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if (ret)
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goto out;
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to += 2;
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nor->sst_write_second = true;
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}
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nor->sst_write_second = false;
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ret = spi_nor_write_disable(nor);
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if (ret)
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goto out;
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ret = spi_nor_wait_till_ready(nor);
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if (ret)
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goto out;
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/* Write out trailing byte if it exists. */
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if (actual != len) {
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ret = spi_nor_write_enable(nor);
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if (ret)
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goto out;
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nor->program_opcode = SPINOR_OP_BP;
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ret = spi_nor_write_data(nor, to, 1, buf + actual);
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if (ret < 0)
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goto out;
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WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret);
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ret = spi_nor_wait_till_ready(nor);
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if (ret)
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goto out;
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actual += 1;
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ret = spi_nor_write_disable(nor);
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}
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out:
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*retlen += actual;
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spi_nor_unlock_and_unprep(nor);
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return ret;
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}
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/*
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* Write an address range to the nor chip. Data must be written in
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* FLASH_PAGESIZE chunks. The address range may be any size provided
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@ -2893,11 +2789,6 @@ static int spi_nor_setup(struct spi_nor *nor,
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return nor->params.setup(nor, hwcaps);
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}
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static void sst_set_default_init(struct spi_nor *nor)
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{
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nor->flags |= SNOR_F_HAS_LOCK;
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}
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static void winbond_set_default_init(struct spi_nor *nor)
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{
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nor->params.set_4byte_addr_mode = winbond_set_4byte_addr_mode;
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@ -2912,10 +2803,6 @@ static void spi_nor_manufacturer_init_params(struct spi_nor *nor)
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{
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/* Init flash parameters based on MFR */
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switch (JEDEC_MFR(nor->info)) {
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case SNOR_MFR_SST:
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sst_set_default_init(nor);
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break;
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case SNOR_MFR_WINBOND:
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winbond_set_default_init(nor);
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break;
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@ -3387,6 +3274,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
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if (info->flags & SPI_NOR_HAS_LOCK)
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nor->flags |= SNOR_F_HAS_LOCK;
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mtd->_write = spi_nor_write;
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/* Init flash parameters based on flash_info struct and SFDP */
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spi_nor_init_params(nor);
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@ -3407,12 +3296,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
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mtd->_is_locked = spi_nor_is_locked;
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}
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/* sst nor chips use AAI word program */
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if (info->flags & SST_WRITE)
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mtd->_write = sst_write;
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else
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mtd->_write = spi_nor_write;
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if (info->flags & USE_FSR)
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nor->flags |= SNOR_F_USE_FSR;
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if (info->flags & SPI_NOR_HAS_TB) {
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@ -179,6 +179,7 @@ extern const struct spi_nor_manufacturer spi_nor_macronix;
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extern const struct spi_nor_manufacturer spi_nor_micron;
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extern const struct spi_nor_manufacturer spi_nor_st;
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extern const struct spi_nor_manufacturer spi_nor_spansion;
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extern const struct spi_nor_manufacturer spi_nor_sst;
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int spi_nor_write_enable(struct spi_nor *nor);
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int spi_nor_write_disable(struct spi_nor *nor);
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151
drivers/mtd/spi-nor/sst.c
Normal file
151
drivers/mtd/spi-nor/sst.c
Normal file
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@ -0,0 +1,151 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2005, Intec Automation Inc.
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* Copyright (C) 2014, Freescale Semiconductor, Inc.
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*/
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#include <linux/mtd/spi-nor.h>
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#include "core.h"
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static const struct flash_info sst_parts[] = {
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/* SST -- large erase sizes are "overlays", "sectors" are 4K */
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{ "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8,
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SECT_4K | SST_WRITE) },
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{ "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16,
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SECT_4K | SST_WRITE) },
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{ "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32,
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SECT_4K | SST_WRITE) },
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{ "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64,
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SECT_4K | SST_WRITE) },
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{ "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, SECT_4K) },
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{ "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1,
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SECT_4K | SST_WRITE) },
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{ "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2,
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SECT_4K | SST_WRITE) },
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{ "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4,
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SECT_4K | SST_WRITE) },
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{ "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4, SECT_4K) },
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{ "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8, SECT_4K) },
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{ "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8,
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SECT_4K | SST_WRITE) },
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{ "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16,
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SECT_4K | SST_WRITE) },
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{ "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32,
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SECT_4K | SPI_NOR_DUAL_READ |
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SPI_NOR_QUAD_READ) },
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{ "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32,
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SECT_4K | SPI_NOR_DUAL_READ) },
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{ "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128,
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SECT_4K | SPI_NOR_DUAL_READ |
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SPI_NOR_QUAD_READ) },
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};
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static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
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size_t *retlen, const u_char *buf)
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{
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struct spi_nor *nor = mtd_to_spi_nor(mtd);
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size_t actual = 0;
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int ret;
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dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
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ret = spi_nor_lock_and_prep(nor);
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if (ret)
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return ret;
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ret = spi_nor_write_enable(nor);
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if (ret)
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goto out;
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nor->sst_write_second = false;
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/* Start write from odd address. */
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if (to % 2) {
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nor->program_opcode = SPINOR_OP_BP;
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/* write one byte. */
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ret = spi_nor_write_data(nor, to, 1, buf);
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if (ret < 0)
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goto out;
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WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret);
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ret = spi_nor_wait_till_ready(nor);
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if (ret)
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goto out;
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to++;
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actual++;
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}
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/* Write out most of the data here. */
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for (; actual < len - 1; actual += 2) {
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nor->program_opcode = SPINOR_OP_AAI_WP;
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/* write two bytes. */
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ret = spi_nor_write_data(nor, to, 2, buf + actual);
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if (ret < 0)
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goto out;
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WARN(ret != 2, "While writing 2 bytes written %i bytes\n", ret);
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ret = spi_nor_wait_till_ready(nor);
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if (ret)
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goto out;
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to += 2;
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nor->sst_write_second = true;
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}
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nor->sst_write_second = false;
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ret = spi_nor_write_disable(nor);
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if (ret)
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goto out;
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ret = spi_nor_wait_till_ready(nor);
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if (ret)
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goto out;
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/* Write out trailing byte if it exists. */
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if (actual != len) {
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ret = spi_nor_write_enable(nor);
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if (ret)
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goto out;
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nor->program_opcode = SPINOR_OP_BP;
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ret = spi_nor_write_data(nor, to, 1, buf + actual);
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if (ret < 0)
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goto out;
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WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret);
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ret = spi_nor_wait_till_ready(nor);
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if (ret)
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goto out;
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actual += 1;
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ret = spi_nor_write_disable(nor);
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}
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out:
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*retlen += actual;
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spi_nor_unlock_and_unprep(nor);
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return ret;
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}
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static void sst_default_init(struct spi_nor *nor)
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{
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nor->flags |= SNOR_F_HAS_LOCK;
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}
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static void sst_post_sfdp_fixups(struct spi_nor *nor)
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{
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if (nor->info->flags & SST_WRITE)
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nor->mtd._write = sst_write;
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}
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static const struct spi_nor_fixups sst_fixups = {
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.default_init = sst_default_init,
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.post_sfdp = sst_post_sfdp_fixups,
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};
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const struct spi_nor_manufacturer spi_nor_sst = {
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.name = "sst",
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.parts = sst_parts,
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.nparts = ARRAY_SIZE(sst_parts),
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.fixups = &sst_fixups,
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};
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