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ARM: at91: dt: at91sam9260: split rts and cts pinctrl not

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as we just use the rts and not the rts & cts for rs485

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD 2012-11-19 07:30:01 +08:00
parent 9e3129e937
commit c58c0c5acc
8 changed files with 136 additions and 57 deletions
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40
arch/arm/boot/dts/at91sam9260.dtsi
View file

@ -127,10 +127,14 @@ pinctrl_usart0: usart0-0 {
1 5 0x1 0x0>; /* PB5 periph A */
};
pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
<1 26 0x1 0x0 /* PB26 periph A */
1 27 0x1 0x0>; /* PB27 periph A */
<1 26 0x1 0x0>; /* PB26 periph A */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
<1 27 0x1 0x0>; /* PB27 periph A */
};
pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
@ -157,10 +161,14 @@ pinctrl_usart1: usart1-0 {
2 7 0x1 0x0>; /* PB7 periph A */
};
pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
<1 28 0x1 0x0 /* PB28 periph A */
1 29 0x1 0x0>; /* PB29 periph A */
<1 28 0x1 0x0>; /* PB28 periph A */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
<1 29 0x1 0x0>; /* PB29 periph A */
};
};
@ -171,10 +179,14 @@ pinctrl_usart2: usart2-0 {
1 9 0x1 0x0>; /* PB9 periph A */
};
pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
<0 4 0x1 0x0 /* PA4 periph A */
0 5 0x1 0x0>; /* PA5 periph A */
<0 4 0x1 0x0>; /* PA4 periph A */
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
<0 5 0x1 0x0>; /* PA5 periph A */
};
};
@ -185,10 +197,14 @@ pinctrl_usart3: usart3-0 {
2 11 0x1 0x0>; /* PB11 periph A */
};
pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
<3 8 0x2 0x0 /* PB8 periph B */
3 10 0x2 0x0>; /* PB10 periph B */
<3 8 0x2 0x0>; /* PB8 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
<3 10 0x2 0x0>; /* PB10 periph B */
};
};

30
arch/arm/boot/dts/at91sam9263.dtsi
View file

@ -120,10 +120,14 @@ pinctrl_usart0: usart0-0 {
0 27 0x1 0x0>; /* PA27 periph A */
};
pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
<0 28 0x1 0x0 /* PA28 periph A */
0 29 0x1 0x0>; /* PA29 periph A */
<0 28 0x1 0x0>; /* PA28 periph A */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
<0 29 0x1 0x0>; /* PA29 periph A */
};
};
@ -134,10 +138,14 @@ pinctrl_usart1: usart1-0 {
3 1 0x1 0x0>; /* PD1 periph A */
};
pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
<3 7 0x2 0x0 /* PD7 periph B */
3 8 0x2 0x0>; /* PD8 periph B */
<3 7 0x2 0x0>; /* PD7 periph B */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
<3 8 0x2 0x0>; /* PD8 periph B */
};
};
@ -148,10 +156,14 @@ pinctrl_usart2: usart2-0 {
3 3 0x1 0x0>; /* PD3 periph A */
};
pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
<3 5 0x2 0x0 /* PD5 periph B */
4 6 0x2 0x0>; /* PD6 periph B */
<3 5 0x2 0x0>; /* PD5 periph B */
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
<4 6 0x2 0x0>; /* PD6 periph B */
};
};

5
arch/arm/boot/dts/at91sam9263ek.dts
View file

@ -38,7 +38,10 @@ dbgu: serial@ffffee00 {
};
usart0: serial@fff8c000 {
pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
pinctrl-0 = <
&pinctrl_usart0
&pinctrl_usart0_rts
&pinctrl_usart0_cts>;
status = "okay";
};

3
arch/arm/boot/dts/at91sam9g20ek_common.dtsi
View file

@ -37,7 +37,8 @@ dbgu: serial@fffff200 {
usart0: serial@fffb0000 {
pinctrl-0 =
<&pinctrl_usart0
&pinctrl_usart0_rts_cts
&pinctrl_usart0_rts
&pinctrl_usart0_cts
&pinctrl_usart0_dtr_dsr
&pinctrl_usart0_dcd
&pinctrl_usart0_ri>;

40
arch/arm/boot/dts/at91sam9g45.dtsi
View file

@ -139,10 +139,14 @@ pinctrl_usart0: usart0-0 {
1 18 0x1 0x0>; /* PB18 periph A */
};
pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
<1 17 0x2 0x0 /* PB17 periph B */
1 15 0x2 0x0>; /* PB15 periph B */
<1 17 0x2 0x0>; /* PB17 periph B */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
<1 15 0x2 0x0>; /* PB15 periph B */
};
};
@ -153,10 +157,14 @@ pinctrl_usart1: usart1-0 {
1 5 0x1 0x0>; /* PB5 periph A */
};
pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
<3 16 0x1 0x0 /* PD16 periph A */
3 17 0x1 0x0>; /* PD17 periph A */
<3 16 0x1 0x0>; /* PD16 periph A */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
<3 17 0x1 0x0>; /* PD17 periph A */
};
};
@ -167,10 +175,14 @@ pinctrl_usart2: usart2-0 {
1 7 0x1 0x0>; /* PB7 periph A */
};
pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
<2 9 0x2 0x0 /* PC9 periph B */
2 11 0x2 0x0>; /* PC11 periph B */
<2 9 0x2 0x0>; /* PC9 periph B */
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
<2 11 0x2 0x0>; /* PC11 periph B */
};
};
@ -181,10 +193,14 @@ pinctrl_usart3: usart3-0 {
1 9 0x1 0x0>; /* PB8 periph A */
};
pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
<0 23 0x2 0x0 /* PA23 periph B */
0 24 0x2 0x0>; /* PA24 periph B */
<0 23 0x2 0x0>; /* PA23 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
<0 24 0x2 0x0>; /* PA24 periph B */
};
};

5
arch/arm/boot/dts/at91sam9m10g45ek.dts
View file

@ -39,7 +39,10 @@ dbgu: serial@ffffee00 {
};
usart1: serial@fff90000 {
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
pinctrl-0 =
<&pinctrl_usart1
&pinctrl_usart1_rts
&pinctrl_usart1_cts>;
status = "okay";
};

30
arch/arm/boot/dts/at91sam9n12.dtsi
View file

@ -132,10 +132,14 @@ pinctrl_usart0: usart0-0 {
0 0 0x1 0x0>; /* PA0 periph A */
};
pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
<0 2 0x1 0x0 /* PA2 periph A */
0 3 0x1 0x0>; /* PA3 periph A */
<0 2 0x1 0x0>; /* PA2 periph A */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
<0 3 0x1 0x0>; /* PA3 periph A */
};
};
@ -154,10 +158,14 @@ pinctrl_usart2: usart2-0 {
0 7 0x1 0x0>; /* PA7 periph A */
};
pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
<1 0 0x2 0x0 /* PB0 periph B */
1 1 0x2 0x0>; /* PB1 periph B */
<1 0 0x2 0x0>; /* PB0 periph B */
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
<1 1 0x2 0x0>; /* PB1 periph B */
};
};
@ -168,10 +176,14 @@ pinctrl_usart3: usart3-0 {
2 22 0x2 0x0>; /* PC22 periph B */
};
pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
<2 24 0x2 0x0 /* PC24 periph B */
2 25 0x2 0x0>; /* PC25 periph B */
<2 24 0x2 0x0>; /* PC24 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
<2 25 0x2 0x0>; /* PC25 periph B */
};
};

40
arch/arm/boot/dts/at91sam9x5.dtsi
View file

@ -133,10 +133,14 @@ pinctrl_usart0: usart0-0 {
0 1 0x1 0x0>; /* PA1 periph A */
};
pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
<0 2 0x1 0x0 /* PA2 periph A */
0 3 0x1 0x0>; /* PA3 periph A */
<0 2 0x1 0x0>; /* PA2 periph A */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
<0 3 0x1 0x0>; /* PA3 periph A */
};
};
@ -147,10 +151,14 @@ pinctrl_usart1: usart1-0 {
0 6 0x1 0x0>; /* PA6 periph A */
};
pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
<3 27 0x3 0x0 /* PC27 periph C */
3 28 0x3 0x0>; /* PC28 periph C */
<3 27 0x3 0x0>; /* PC27 periph C */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
<3 28 0x3 0x0>; /* PC28 periph C */
};
};
@ -161,10 +169,14 @@ pinctrl_usart2: usart2-0 {
0 8 0x1 0x0>; /* PA8 periph A */
};
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
pinctrl_uart2_rts: uart2_rts-0 {
atmel,pins =
<0 0 0x2 0x0 /* PB0 periph B */
0 1 0x2 0x0>; /* PB1 periph B */
<0 0 0x2 0x0>; /* PB0 periph B */
};
pinctrl_uart2_cts: uart2_cts-0 {
atmel,pins =
<0 1 0x2 0x0>; /* PB1 periph B */
};
};
@ -175,10 +187,14 @@ pinctrl_uart3: usart3-0 {
3 23 0x2 0x0>; /* PC23 periph B */
};
pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
<3 24 0x2 0x0 /* PC24 periph B */
3 25 0x2 0x0>; /* PC25 periph B */
<3 24 0x2 0x0>; /* PC24 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
<3 25 0x2 0x0>; /* PC25 periph B */
};
};