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i2c-au1550: remove usage of volatile keyword
Replace the usage of "volatile"s with register accessor functions. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Manuel Lauss
Ben Dooks
parent
1fdb24e969
commit
c5de6467d2
2 changed files with 98 additions and 165 deletions
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@ -394,19 +394,6 @@ typedef struct psc_spi {
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#define PSC_SPITXRX_LC (1 << 29)
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#define PSC_SPITXRX_SR (1 << 28)
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/* PSC in SMBus (I2C) Mode. */
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typedef struct psc_smb {
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u32 psc_sel;
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u32 psc_ctrl;
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u32 psc_smbcfg;
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u32 psc_smbmsk;
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u32 psc_smbpcr;
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u32 psc_smbstat;
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u32 psc_smbevnt;
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u32 psc_smbtxrx;
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u32 psc_smbtmr;
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} psc_smb_t;
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/* SMBus Config Register. */
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#define PSC_SMBCFG_RT_MASK (3 << 30)
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#define PSC_SMBCFG_RT_FIFO1 (0 << 30)
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@ -39,29 +39,42 @@
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#include <asm/mach-au1x00/au1xxx.h>
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#include <asm/mach-au1x00/au1xxx_psc.h>
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#define PSC_SEL 0x00
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#define PSC_CTRL 0x04
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#define PSC_SMBCFG 0x08
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#define PSC_SMBMSK 0x0C
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#define PSC_SMBPCR 0x10
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#define PSC_SMBSTAT 0x14
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#define PSC_SMBEVNT 0x18
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#define PSC_SMBTXRX 0x1C
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#define PSC_SMBTMR 0x20
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struct i2c_au1550_data {
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u32 psc_base;
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void __iomem *psc_base;
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int xfer_timeout;
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int ack_timeout;
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struct i2c_adapter adap;
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struct resource *ioarea;
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};
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static int
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wait_xfer_done(struct i2c_au1550_data *adap)
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static inline void WR(struct i2c_au1550_data *a, int r, unsigned long v)
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{
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u32 stat;
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int i;
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volatile psc_smb_t *sp;
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__raw_writel(v, a->psc_base + r);
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wmb();
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}
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sp = (volatile psc_smb_t *)(adap->psc_base);
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static inline unsigned long RD(struct i2c_au1550_data *a, int r)
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{
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return __raw_readl(a->psc_base + r);
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}
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/* Wait for Tx Buffer Empty
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*/
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static int wait_xfer_done(struct i2c_au1550_data *adap)
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{
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int i;
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/* Wait for Tx Buffer Empty */
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for (i = 0; i < adap->xfer_timeout; i++) {
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stat = sp->psc_smbstat;
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au_sync();
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if ((stat & PSC_SMBSTAT_TE) != 0)
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if (RD(adap, PSC_SMBSTAT) & PSC_SMBSTAT_TE)
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return 0;
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udelay(1);
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@ -70,41 +83,27 @@ wait_xfer_done(struct i2c_au1550_data *adap)
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return -ETIMEDOUT;
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}
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static int
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wait_ack(struct i2c_au1550_data *adap)
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static int wait_ack(struct i2c_au1550_data *adap)
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{
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u32 stat;
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volatile psc_smb_t *sp;
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unsigned long stat;
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if (wait_xfer_done(adap))
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return -ETIMEDOUT;
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sp = (volatile psc_smb_t *)(adap->psc_base);
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stat = sp->psc_smbevnt;
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au_sync();
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stat = RD(adap, PSC_SMBEVNT);
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if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0)
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return -ETIMEDOUT;
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return 0;
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}
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static int
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wait_master_done(struct i2c_au1550_data *adap)
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static int wait_master_done(struct i2c_au1550_data *adap)
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{
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u32 stat;
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int i;
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volatile psc_smb_t *sp;
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int i;
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sp = (volatile psc_smb_t *)(adap->psc_base);
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/* Wait for Master Done.
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*/
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/* Wait for Master Done. */
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for (i = 0; i < adap->xfer_timeout; i++) {
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stat = sp->psc_smbevnt;
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au_sync();
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if ((stat & PSC_SMBEVNT_MD) != 0)
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if ((RD(adap, PSC_SMBEVNT) & PSC_SMBEVNT_MD) != 0)
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return 0;
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udelay(1);
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}
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@ -115,29 +114,20 @@ wait_master_done(struct i2c_au1550_data *adap)
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static int
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do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd, int q)
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{
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volatile psc_smb_t *sp;
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u32 stat;
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unsigned long stat;
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sp = (volatile psc_smb_t *)(adap->psc_base);
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/* Reset the FIFOs, clear events.
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*/
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stat = sp->psc_smbstat;
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sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR;
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au_sync();
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/* Reset the FIFOs, clear events. */
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stat = RD(adap, PSC_SMBSTAT);
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WR(adap, PSC_SMBEVNT, PSC_SMBEVNT_ALLCLR);
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if (!(stat & PSC_SMBSTAT_TE) || !(stat & PSC_SMBSTAT_RE)) {
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sp->psc_smbpcr = PSC_SMBPCR_DC;
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au_sync();
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do {
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stat = sp->psc_smbpcr;
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au_sync();
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} while ((stat & PSC_SMBPCR_DC) != 0);
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WR(adap, PSC_SMBPCR, PSC_SMBPCR_DC);
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while ((RD(adap, PSC_SMBPCR) & PSC_SMBPCR_DC) != 0)
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cpu_relax();
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udelay(50);
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}
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/* Write out the i2c chip address and specify operation
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*/
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/* Write out the i2c chip address and specify operation */
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addr <<= 1;
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if (rd)
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addr |= 1;
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@ -146,56 +136,42 @@ do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd, int q)
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if (q)
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addr |= PSC_SMBTXRX_STP;
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/* Put byte into fifo, start up master.
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*/
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sp->psc_smbtxrx = addr;
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au_sync();
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sp->psc_smbpcr = PSC_SMBPCR_MS;
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au_sync();
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/* Put byte into fifo, start up master. */
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WR(adap, PSC_SMBTXRX, addr);
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WR(adap, PSC_SMBPCR, PSC_SMBPCR_MS);
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if (wait_ack(adap))
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return -EIO;
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return (q) ? wait_master_done(adap) : 0;
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}
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static u32
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wait_for_rx_byte(struct i2c_au1550_data *adap, u32 *ret_data)
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static int wait_for_rx_byte(struct i2c_au1550_data *adap, unsigned char *out)
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{
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int j;
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u32 data, stat;
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volatile psc_smb_t *sp;
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int j;
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if (wait_xfer_done(adap))
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return -EIO;
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sp = (volatile psc_smb_t *)(adap->psc_base);
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j = adap->xfer_timeout * 100;
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do {
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j--;
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if (j <= 0)
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return -EIO;
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stat = sp->psc_smbstat;
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au_sync();
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if ((stat & PSC_SMBSTAT_RE) == 0)
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if ((RD(adap, PSC_SMBSTAT) & PSC_SMBSTAT_RE) == 0)
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j = 0;
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else
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udelay(1);
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} while (j > 0);
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data = sp->psc_smbtxrx;
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au_sync();
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*ret_data = data;
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*out = RD(adap, PSC_SMBTXRX);
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return 0;
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}
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static int
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i2c_read(struct i2c_au1550_data *adap, unsigned char *buf,
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static int i2c_read(struct i2c_au1550_data *adap, unsigned char *buf,
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unsigned int len)
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{
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int i;
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u32 data;
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volatile psc_smb_t *sp;
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int i;
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if (len == 0)
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return 0;
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@ -204,62 +180,46 @@ i2c_read(struct i2c_au1550_data *adap, unsigned char *buf,
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* zero bytes for timing, waiting for bytes to appear in the
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* receive fifo, then reading the bytes.
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*/
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sp = (volatile psc_smb_t *)(adap->psc_base);
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i = 0;
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while (i < (len-1)) {
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sp->psc_smbtxrx = 0;
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au_sync();
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if (wait_for_rx_byte(adap, &data))
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while (i < (len - 1)) {
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WR(adap, PSC_SMBTXRX, 0);
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if (wait_for_rx_byte(adap, &buf[i]))
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return -EIO;
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buf[i] = data;
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i++;
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}
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/* The last byte has to indicate transfer done.
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*/
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sp->psc_smbtxrx = PSC_SMBTXRX_STP;
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au_sync();
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/* The last byte has to indicate transfer done. */
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WR(adap, PSC_SMBTXRX, PSC_SMBTXRX_STP);
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if (wait_master_done(adap))
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return -EIO;
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data = sp->psc_smbtxrx;
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au_sync();
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buf[i] = data;
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buf[i] = (unsigned char)(RD(adap, PSC_SMBTXRX) & 0xff);
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return 0;
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}
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static int
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i2c_write(struct i2c_au1550_data *adap, unsigned char *buf,
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static int i2c_write(struct i2c_au1550_data *adap, unsigned char *buf,
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unsigned int len)
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{
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int i;
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u32 data;
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volatile psc_smb_t *sp;
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int i;
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unsigned long data;
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if (len == 0)
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return 0;
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sp = (volatile psc_smb_t *)(adap->psc_base);
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i = 0;
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while (i < (len-1)) {
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data = buf[i];
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sp->psc_smbtxrx = data;
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au_sync();
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WR(adap, PSC_SMBTXRX, data);
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if (wait_ack(adap))
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return -EIO;
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i++;
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}
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/* The last byte has to indicate transfer done.
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*/
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/* The last byte has to indicate transfer done. */
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data = buf[i];
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data |= PSC_SMBTXRX_STP;
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sp->psc_smbtxrx = data;
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au_sync();
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WR(adap, PSC_SMBTXRX, data);
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if (wait_master_done(adap))
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return -EIO;
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return 0;
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@ -269,12 +229,10 @@ static int
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au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
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{
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struct i2c_au1550_data *adap = i2c_adap->algo_data;
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volatile psc_smb_t *sp = (volatile psc_smb_t *)adap->psc_base;
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struct i2c_msg *p;
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int i, err = 0;
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sp->psc_ctrl = PSC_CTRL_ENABLE;
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au_sync();
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WR(adap, PSC_CTRL, PSC_CTRL_ENABLE);
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for (i = 0; !err && i < num; i++) {
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p = &msgs[i];
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@ -293,14 +251,12 @@ au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
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if (err == 0)
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err = num;
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sp->psc_ctrl = PSC_CTRL_SUSPEND;
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au_sync();
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WR(adap, PSC_CTRL, PSC_CTRL_SUSPEND);
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return err;
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}
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static u32
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au1550_func(struct i2c_adapter *adap)
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static u32 au1550_func(struct i2c_adapter *adap)
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{
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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@ -312,57 +268,45 @@ static const struct i2c_algorithm au1550_algo = {
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static void i2c_au1550_setup(struct i2c_au1550_data *priv)
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{
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volatile psc_smb_t *sp = (volatile psc_smb_t *)priv->psc_base;
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u32 stat;
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unsigned long cfg;
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sp->psc_ctrl = PSC_CTRL_DISABLE;
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au_sync();
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sp->psc_sel = PSC_SEL_PS_SMBUSMODE;
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sp->psc_smbcfg = 0;
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au_sync();
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sp->psc_ctrl = PSC_CTRL_ENABLE;
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au_sync();
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do {
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stat = sp->psc_smbstat;
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au_sync();
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} while ((stat & PSC_SMBSTAT_SR) == 0);
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WR(priv, PSC_CTRL, PSC_CTRL_DISABLE);
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WR(priv, PSC_SEL, PSC_SEL_PS_SMBUSMODE);
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WR(priv, PSC_SMBCFG, 0);
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WR(priv, PSC_CTRL, PSC_CTRL_ENABLE);
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while ((RD(priv, PSC_SMBSTAT) & PSC_SMBSTAT_SR) == 0)
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cpu_relax();
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sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 |
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PSC_SMBCFG_DD_DISABLE);
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cfg = PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | PSC_SMBCFG_DD_DISABLE;
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WR(priv, PSC_SMBCFG, cfg);
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/* Divide by 8 to get a 6.25 MHz clock. The later protocol
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* timings are based on this clock.
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*/
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sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8);
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sp->psc_smbmsk = PSC_SMBMSK_ALLMASK;
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au_sync();
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cfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8);
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WR(priv, PSC_SMBCFG, cfg);
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WR(priv, PSC_SMBMSK, PSC_SMBMSK_ALLMASK);
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/* Set the protocol timer values. See Table 71 in the
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* Au1550 Data Book for standard timing values.
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*/
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sp->psc_smbtmr = PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \
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WR(priv, PSC_SMBTMR, PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \
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PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \
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PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \
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PSC_SMBTMR_SET_CH(15);
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au_sync();
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PSC_SMBTMR_SET_CH(15));
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sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE;
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do {
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stat = sp->psc_smbstat;
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au_sync();
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} while ((stat & PSC_SMBSTAT_SR) == 0);
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cfg |= PSC_SMBCFG_DE_ENABLE;
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WR(priv, PSC_SMBCFG, cfg);
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while ((RD(priv, PSC_SMBSTAT) & PSC_SMBSTAT_SR) == 0)
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cpu_relax();
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sp->psc_ctrl = PSC_CTRL_SUSPEND;
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au_sync();
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WR(priv, PSC_CTRL, PSC_CTRL_SUSPEND);
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}
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static void i2c_au1550_disable(struct i2c_au1550_data *priv)
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{
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volatile psc_smb_t *sp = (volatile psc_smb_t *)priv->psc_base;
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sp->psc_smbcfg = 0;
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sp->psc_ctrl = PSC_CTRL_DISABLE;
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au_sync();
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WR(priv, PSC_SMBCFG, 0);
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WR(priv, PSC_CTRL, PSC_CTRL_DISABLE);
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}
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/*
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@ -396,7 +340,11 @@ i2c_au1550_probe(struct platform_device *pdev)
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goto out_mem;
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}
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priv->psc_base = CKSEG1ADDR(r->start);
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priv->psc_base = ioremap(r->start, resource_size(r));
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if (!priv->psc_base) {
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ret = -EIO;
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goto out_map;
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}
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priv->xfer_timeout = 200;
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priv->ack_timeout = 200;
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@ -406,8 +354,7 @@ i2c_au1550_probe(struct platform_device *pdev)
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priv->adap.dev.parent = &pdev->dev;
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strlcpy(priv->adap.name, "Au1xxx PSC I2C", sizeof(priv->adap.name));
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/* Now, set up the PSC for SMBus PIO mode.
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*/
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/* Now, set up the PSC for SMBus PIO mode. */
|
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i2c_au1550_setup(priv);
|
||||
|
||||
ret = i2c_add_numbered_adapter(&priv->adap);
|
||||
|
|
@ -417,7 +364,8 @@ i2c_au1550_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
i2c_au1550_disable(priv);
|
||||
|
||||
iounmap(priv->psc_base);
|
||||
out_map:
|
||||
release_resource(priv->ioarea);
|
||||
kfree(priv->ioarea);
|
||||
out_mem:
|
||||
|
|
@ -426,14 +374,14 @@ i2c_au1550_probe(struct platform_device *pdev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int __devexit
|
||||
i2c_au1550_remove(struct platform_device *pdev)
|
||||
static int __devexit i2c_au1550_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct i2c_au1550_data *priv = platform_get_drvdata(pdev);
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
i2c_del_adapter(&priv->adap);
|
||||
i2c_au1550_disable(priv);
|
||||
iounmap(priv->psc_base);
|
||||
release_resource(priv->ioarea);
|
||||
kfree(priv->ioarea);
|
||||
kfree(priv);
|
||||
|
|
@ -476,14 +424,12 @@ static struct platform_driver au1xpsc_smbus_driver = {
|
|||
.resume = i2c_au1550_resume,
|
||||
};
|
||||
|
||||
static int __init
|
||||
i2c_au1550_init(void)
|
||||
static int __init i2c_au1550_init(void)
|
||||
{
|
||||
return platform_driver_register(&au1xpsc_smbus_driver);
|
||||
}
|
||||
|
||||
static void __exit
|
||||
i2c_au1550_exit(void)
|
||||
static void __exit i2c_au1550_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&au1xpsc_smbus_driver);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue