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ASoC: Support 24.576MHz MCLKs in WM8915
We can safely divide these down to within the supported SYSCLK range. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Liam Girdwood <lrg@ti.com>
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1 changed files with 5 additions and 2 deletions
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@ -1831,6 +1831,7 @@ static int wm8915_set_sysclk(struct snd_soc_dai *dai,
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struct snd_soc_codec *codec = dai->codec;
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struct wm8915_priv *wm8915 = snd_soc_codec_get_drvdata(codec);
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int lfclk = 0;
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int ratediv = 0;
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int src;
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int old;
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@ -1862,6 +1863,8 @@ static int wm8915_set_sysclk(struct snd_soc_dai *dai,
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snd_soc_update_bits(codec, WM8915_AIF_RATE,
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WM8915_SYSCLK_RATE, 0);
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break;
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case 24576000:
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ratediv = WM8915_SYSCLK_DIV;
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case 12288000:
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snd_soc_update_bits(codec, WM8915_AIF_RATE,
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WM8915_SYSCLK_RATE, WM8915_SYSCLK_RATE);
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@ -1877,8 +1880,8 @@ static int wm8915_set_sysclk(struct snd_soc_dai *dai,
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}
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snd_soc_update_bits(codec, WM8915_AIF_CLOCKING_1,
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WM8915_SYSCLK_SRC_MASK,
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src << WM8915_SYSCLK_SRC_SHIFT);
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WM8915_SYSCLK_SRC_MASK | WM8915_SYSCLK_DIV_MASK,
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src << WM8915_SYSCLK_SRC_SHIFT | ratediv);
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snd_soc_update_bits(codec, WM8915_CLOCKING_1, WM8915_LFCLK_ENA, lfclk);
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snd_soc_update_bits(codec, WM8915_AIF_CLOCKING_1,
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WM8915_SYSCLK_ENA, old);
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