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x86: Fix build with older binutils and consolidate linker script
binutils prior to 2.17 can't deal with the currently possible situation of a new segment following the per-CPU segment, but that new segment being empty - objcopy misplaces the .bss (and perhaps also the .brk) sections outside of any segment. However, the current ordering of sections really just appears to be the effect of cumulative unrelated changes; re-ordering things allows to easily guarantee that the segment following the per-CPU one is non-empty, and at once eliminates the need for the bogus data.init2 segment. Once touching this code, also use the various data section helper macros from include/asm-generic/vmlinux.lds.h. -v2: fix !SMP builds. Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: <sam@ravnborg.org> LKML-Reference: <4A94085D02000078000119A5@vpn.id2.novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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parent
a6a06f7b57
commit
c62e43202e
1 changed files with 54 additions and 86 deletions
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@ -46,11 +46,10 @@ PHDRS {
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data PT_LOAD FLAGS(7); /* RWE */
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#ifdef CONFIG_X86_64
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user PT_LOAD FLAGS(7); /* RWE */
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data.init PT_LOAD FLAGS(7); /* RWE */
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#ifdef CONFIG_SMP
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percpu PT_LOAD FLAGS(7); /* RWE */
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#endif
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data.init2 PT_LOAD FLAGS(7); /* RWE */
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init PT_LOAD FLAGS(7); /* RWE */
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#endif
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note PT_NOTE FLAGS(0); /* ___ */
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}
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@ -103,65 +102,43 @@ SECTIONS
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__stop___ex_table = .;
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} :text = 0x9090
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RODATA
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RO_DATA(PAGE_SIZE)
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/* Data */
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. = ALIGN(PAGE_SIZE);
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.data : AT(ADDR(.data) - LOAD_OFFSET) {
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/* Start of data section */
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_sdata = .;
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/* init_task */
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INIT_TASK_DATA(THREAD_SIZE)
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#ifdef CONFIG_X86_32
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/* 32 bit has nosave before _edata */
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NOSAVE_DATA
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#endif
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PAGE_ALIGNED_DATA(PAGE_SIZE)
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*(.data.idt)
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CACHELINE_ALIGNED_DATA(CONFIG_X86_L1_CACHE_BYTES)
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DATA_DATA
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CONSTRUCTORS
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} :data
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#ifdef CONFIG_X86_32
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/* 32 bit has nosave before _edata */
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. = ALIGN(PAGE_SIZE);
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.data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
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__nosave_begin = .;
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*(.data.nosave)
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. = ALIGN(PAGE_SIZE);
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__nosave_end = .;
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}
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#endif
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. = ALIGN(PAGE_SIZE);
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.data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) {
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*(.data.page_aligned)
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*(.data.idt)
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}
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#ifdef CONFIG_X86_32
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. = ALIGN(32);
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#else
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. = ALIGN(PAGE_SIZE);
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. = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
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#endif
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.data.cacheline_aligned :
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AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) {
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*(.data.cacheline_aligned)
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}
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/* rarely changed data like cpu maps */
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#ifdef CONFIG_X86_32
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. = ALIGN(32);
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#else
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. = ALIGN(CONFIG_X86_INTERNODE_CACHE_BYTES);
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#endif
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.data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) {
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*(.data.read_mostly)
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/* rarely changed data like cpu maps */
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READ_MOSTLY_DATA(CONFIG_X86_INTERNODE_CACHE_BYTES)
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/* End of data section */
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_edata = .;
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}
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} :data
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#ifdef CONFIG_X86_64
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#define VSYSCALL_ADDR (-10*1024*1024)
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#define VSYSCALL_PHYS_ADDR ((LOADADDR(.data.read_mostly) + \
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SIZEOF(.data.read_mostly) + 4095) & ~(4095))
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#define VSYSCALL_VIRT_ADDR ((ADDR(.data.read_mostly) + \
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SIZEOF(.data.read_mostly) + 4095) & ~(4095))
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#define VSYSCALL_PHYS_ADDR ((LOADADDR(.data) + SIZEOF(.data) + \
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PAGE_SIZE - 1) & ~(PAGE_SIZE - 1))
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#define VSYSCALL_VIRT_ADDR ((ADDR(.data) + SIZEOF(.data) + \
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PAGE_SIZE - 1) & ~(PAGE_SIZE - 1))
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#define VLOAD_OFFSET (VSYSCALL_ADDR - VSYSCALL_PHYS_ADDR)
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#define VLOAD(x) (ADDR(x) - VLOAD_OFFSET)
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@ -227,35 +204,29 @@ SECTIONS
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#endif /* CONFIG_X86_64 */
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/* init_task */
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. = ALIGN(THREAD_SIZE);
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.data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) {
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*(.data.init_task)
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}
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#ifdef CONFIG_X86_64
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:data.init
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#endif
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/*
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* smp_locks might be freed after init
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* start/end must be page aligned
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*/
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. = ALIGN(PAGE_SIZE);
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.smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
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__smp_locks = .;
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*(.smp_locks)
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__smp_locks_end = .;
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. = ALIGN(PAGE_SIZE);
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}
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/* Init code and data - will be freed after init */
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. = ALIGN(PAGE_SIZE);
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.init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
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.init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
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__init_begin = .; /* paired with __init_end */
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}
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#if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
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/*
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* percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the
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* output PHDR, so the next output section - .init.text - should
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* start another segment - init.
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*/
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PERCPU_VADDR(0, :percpu)
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#endif
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.init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
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_sinittext = .;
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INIT_TEXT
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_einittext = .;
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}
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#ifdef CONFIG_X86_64
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:init
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#endif
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.init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
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INIT_DATA
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@ -326,17 +297,7 @@ SECTIONS
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}
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#endif
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#if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
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/*
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* percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the
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* output PHDR, so the next output section - __data_nosave - should
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* start another section data.init2. Also, pda should be at the head of
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* percpu area. Preallocate it and define the percpu offset symbol
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* so that it can be accessed as a percpu variable.
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*/
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. = ALIGN(PAGE_SIZE);
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PERCPU_VADDR(0, :percpu)
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#else
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#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
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PERCPU(PAGE_SIZE)
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#endif
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@ -347,15 +308,22 @@ SECTIONS
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__init_end = .;
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}
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/*
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* smp_locks might be freed after init
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* start/end must be page aligned
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*/
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. = ALIGN(PAGE_SIZE);
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.smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
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__smp_locks = .;
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*(.smp_locks)
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__smp_locks_end = .;
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. = ALIGN(PAGE_SIZE);
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}
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#ifdef CONFIG_X86_64
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.data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
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. = ALIGN(PAGE_SIZE);
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__nosave_begin = .;
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*(.data.nosave)
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. = ALIGN(PAGE_SIZE);
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__nosave_end = .;
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} :data.init2
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/* use another section data.init2, see PERCPU_VADDR() above */
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NOSAVE_DATA
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}
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#endif
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/* BSS */
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