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mmc: dw_mmc: fixed a wrong UHS_REG 16 bit clear
In the legacy code, driver clear not only UHS_REG 16 bit also 0-15bit. If we use UHS-1 mode spec card like SDR50, SDR104. UHS_REG 0-15 should be set by 1 according to slot id. In this case, legacy code can cause problems. In particular, UHS_REG consists of DDR_REG[31:16] and VOLT_REG[15:0]. Before adjusting this patch, bit[15:0] is always cleared. Signed-off-by: Hyeonsu Kim <hyeonsu.kim@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
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1 changed files with 2 additions and 2 deletions
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@ -795,9 +795,9 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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/* DDR mode set */
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/* DDR mode set */
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if (ios->timing == MMC_TIMING_UHS_DDR50)
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if (ios->timing == MMC_TIMING_UHS_DDR50)
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regs |= (0x1 << slot->id) << 16;
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regs |= ((0x1 << slot->id) << 16);
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else
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else
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regs &= ~(0x1 << slot->id) << 16;
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regs &= ~((0x1 << slot->id) << 16);
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mci_writel(slot->host, UHS_REG, regs);
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mci_writel(slot->host, UHS_REG, regs);
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