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MIPS: Loongson64: Test register availability before use

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commit c04366b120 upstream.

Some global register address variable may be missing on
specific CPU type, test them before use them.

Cc: stable@vger.kernel.org
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Jiaxun Yang 2024-06-14 16:40:14 +01:00 committed by Greg Kroah-Hartman
parent 609b233625
commit c69a4c0b07
1 changed files with 21 additions and 2 deletions
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23
arch/mips/loongson64/smp.c
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@ -479,12 +479,25 @@ static void loongson3_smp_finish(void)
static void __init loongson3_smp_setup(void)
{
int i = 0, num = 0; /* i: physical id, num: logical id */
int max_cpus = 0;
init_cpu_possible(cpu_none_mask);
for (i = 0; i < ARRAY_SIZE(smp_group); i++) {
if (!smp_group[i])
break;
max_cpus += loongson_sysconf.cores_per_node;
}
if (max_cpus < loongson_sysconf.nr_cpus) {
pr_err("SMP Groups are less than the number of CPUs\n");
loongson_sysconf.nr_cpus = max_cpus ? max_cpus : 1;
}
/* For unified kernel, NR_CPUS is the maximum possible value,
* loongson_sysconf.nr_cpus is the really present value
*/
i = 0;
while (i < loongson_sysconf.nr_cpus) {
if (loongson_sysconf.reserved_cpus_mask & (1<<i)) {
/* Reserved physical CPU cores */
@ -505,14 +518,14 @@ static void __init loongson3_smp_setup(void)
__cpu_logical_map[num] = -1;
num++;
}
csr_ipi_probe();
ipi_set0_regs_init();
ipi_clear0_regs_init();
ipi_status0_regs_init();
ipi_en0_regs_init();
ipi_mailbox_buf_init();
ipi_write_enable(0);
if (smp_group[0])
ipi_write_enable(0);
cpu_set_core(&cpu_data[0],
cpu_logical_map(0) % loongson_sysconf.cores_per_package);
@ -829,6 +842,9 @@ static int loongson3_disable_clock(unsigned int cpu)
uint64_t core_id = cpu_core(&cpu_data[cpu]);
uint64_t package_id = cpu_data[cpu].package;
if (!loongson_chipcfg[package_id] || !loongson_freqctrl[package_id])
return 0;
if ((read_c0_prid() & PRID_REV_MASK) == PRID_REV_LOONGSON3A_R1) {
LOONGSON_CHIPCFG(package_id) &= ~(1 << (12 + core_id));
} else {
@ -843,6 +859,9 @@ static int loongson3_enable_clock(unsigned int cpu)
uint64_t core_id = cpu_core(&cpu_data[cpu]);
uint64_t package_id = cpu_data[cpu].package;
if (!loongson_chipcfg[package_id] || !loongson_freqctrl[package_id])
return 0;
if ((read_c0_prid() & PRID_REV_MASK) == PRID_REV_LOONGSON3A_R1) {
LOONGSON_CHIPCFG(package_id) |= 1 << (12 + core_id);
} else {