Samsung 2nd cleanup for v3.19
- remove unused static iomapping for exynos SoCs : remove unused static iomapping from exynos4/5_iodesc table, and related macros from mach/map.h and plat/map-s5p.h. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJUbz8ZAAoJEA0Cl+kVi2xq2GIP/1HtVpaC7/m2SwMCdvOoO99i IofZbcOonTZZfVhT6RDcGcgkFfbk0+pwKrOnaneq7ewqf4cd8flSGsPJspAVXHgC bxYQEkSMuLSUbSjnpTmdfjZGUkUazA2AaMEF0jHjRO/hEoUeAnSJNSPaCFZFVbDB KLfmzMo6A3TQIkXrZFEVgP4DQewsPEBTcjhrgaiC9KB2XoVU1J/Bw5jt8cadmSUa /HBt1hyXOrAwdPjqaLjzu9JHwo6FdAOdSfCNbYG9TYpPtmu7+RHJNUWvRh6N31BH GOoW90S/K/eR3jqhOrxSsN5EkUS9CyTA/maj/7n9tfyoYnrNWop60LBLWi+gsPpp Fu6dqOvCOi4rhjRvW36DupdC/9HYrxcU/zyaGWONSLc/Ze4y+utBmflOdi014iH1 8ET5xpCpWj/l5BIwAy3/JzcPbklharzUdxnq2MF/iD92Z/cVLX8eKvhojRjFNJPb GWO8819B+ej56rDbp/9/ge2mAFWEGQ5FVZOxRnrRTPo7tS/Kb+eCBF+Mio5/y2h2 RUYSjojlVm6LmzzNJdToMcYnYyERpXJxZINwmRnA9IWyAWa14veR5+urW96UVnZR uEoSubm48yJ2ekPy3Vygy9kyAv45X/ELqa+x8l77BjU0Az1YxzfIoYJpNBMqlnv+ d4DRA23SWqYdiILhS9h1 =QCdR -----END PGP SIGNATURE----- Merge tag 'samsung-cleanup-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup Pull "Samsung 2nd cleanup for v3.19" from Kukjin Kim: - remove unused static iomapping for exynos SoCs : remove unused static iomapping from exynos4/5_iodesc table, and related macros from mach/map.h and plat/map-s5p.h. * tag 'samsung-cleanup-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Remove unused static iomapping Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
c746dd2579
|
@ -40,41 +40,11 @@ static struct map_desc exynos4_iodesc[] __initdata = {
|
|||
.pfn = __phys_to_pfn(EXYNOS4_PA_SYSCON),
|
||||
.length = SZ_64K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_TIMER,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_TIMER),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_WATCHDOG,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_WATCHDOG),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_SROMC,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_SYSTIMER,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_GIC_CPU,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU),
|
||||
.length = SZ_64K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_GIC_DIST,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
|
||||
.length = SZ_64K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_CMU,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
|
||||
|
@ -85,11 +55,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
|
|||
.pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI),
|
||||
.length = SZ_8K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_L2CC,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_L2CC),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_DMC0,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
|
||||
|
@ -100,11 +65,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
|
|||
.pfn = __phys_to_pfn(EXYNOS4_PA_DMC1),
|
||||
.length = SZ_64K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_USB_HSPHY,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -114,16 +74,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
|
|||
.pfn = __phys_to_pfn(EXYNOS5_PA_SYSCON),
|
||||
.length = SZ_64K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_TIMER,
|
||||
.pfn = __phys_to_pfn(EXYNOS5_PA_TIMER),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_WATCHDOG,
|
||||
.pfn = __phys_to_pfn(EXYNOS5_PA_WATCHDOG),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_SROMC,
|
||||
.pfn = __phys_to_pfn(EXYNOS5_PA_SROMC),
|
||||
|
|
|
@ -30,40 +30,17 @@
|
|||
#define EXYNOS4_PA_CMU 0x10030000
|
||||
#define EXYNOS5_PA_CMU 0x10010000
|
||||
|
||||
#define EXYNOS4_PA_SYSTIMER 0x10050000
|
||||
|
||||
#define EXYNOS4_PA_WATCHDOG 0x10060000
|
||||
#define EXYNOS5_PA_WATCHDOG 0x101D0000
|
||||
|
||||
#define EXYNOS4_PA_DMC0 0x10400000
|
||||
#define EXYNOS4_PA_DMC1 0x10410000
|
||||
|
||||
#define EXYNOS4_PA_COMBINER 0x10440000
|
||||
#define EXYNOS5_PA_COMBINER 0x10440000
|
||||
|
||||
#define EXYNOS4_PA_GIC_CPU 0x10480000
|
||||
#define EXYNOS4_PA_GIC_DIST 0x10490000
|
||||
#define EXYNOS5_PA_GIC_CPU 0x10482000
|
||||
#define EXYNOS5_PA_GIC_DIST 0x10481000
|
||||
|
||||
#define EXYNOS4_PA_COREPERI 0x10500000
|
||||
#define EXYNOS4_PA_L2CC 0x10502000
|
||||
|
||||
#define EXYNOS4_PA_SROMC 0x12570000
|
||||
#define EXYNOS5_PA_SROMC 0x12250000
|
||||
|
||||
#define EXYNOS4_PA_HSPHY 0x125B0000
|
||||
|
||||
#define EXYNOS4_PA_UART 0x13800000
|
||||
#define EXYNOS5_PA_UART 0x12C00000
|
||||
|
||||
#define EXYNOS4_PA_TIMER 0x139D0000
|
||||
#define EXYNOS5_PA_TIMER 0x12DD0000
|
||||
|
||||
/* Compatibility UART */
|
||||
|
||||
#define EXYNOS5440_PA_UART0 0x000B0000
|
||||
|
||||
#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
|
||||
|
||||
#endif /* __ASM_ARCH_MAP_H */
|
||||
|
|
|
@ -15,43 +15,22 @@
|
|||
|
||||
#define S5P_VA_CHIPID S3C_ADDR(0x02000000)
|
||||
#define S5P_VA_CMU S3C_ADDR(0x02100000)
|
||||
#define S5P_VA_GPIO S3C_ADDR(0x02200000)
|
||||
#define S5P_VA_GPIO1 S5P_VA_GPIO
|
||||
#define S5P_VA_GPIO2 S3C_ADDR(0x02240000)
|
||||
#define S5P_VA_GPIO3 S3C_ADDR(0x02280000)
|
||||
|
||||
#define S5P_VA_SYSRAM S3C_ADDR(0x02400000)
|
||||
#define S5P_VA_SYSRAM_NS S3C_ADDR(0x02410000)
|
||||
#define S5P_VA_DMC0 S3C_ADDR(0x02440000)
|
||||
#define S5P_VA_DMC1 S3C_ADDR(0x02480000)
|
||||
#define S5P_VA_SROMC S3C_ADDR(0x024C0000)
|
||||
|
||||
#define S5P_VA_SYSTIMER S3C_ADDR(0x02500000)
|
||||
#define S5P_VA_L2CC S3C_ADDR(0x02600000)
|
||||
|
||||
#define S5P_VA_COMBINER_BASE S3C_ADDR(0x02700000)
|
||||
#define S5P_VA_COMBINER(x) (S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10)
|
||||
|
||||
#define S5P_VA_COREPERI_BASE S3C_ADDR(0x02800000)
|
||||
#define S5P_VA_COREPERI(x) (S5P_VA_COREPERI_BASE + (x))
|
||||
#define S5P_VA_SCU S5P_VA_COREPERI(0x0)
|
||||
#define S5P_VA_TWD S5P_VA_COREPERI(0x600)
|
||||
|
||||
#define S5P_VA_GIC_CPU S3C_ADDR(0x02810000)
|
||||
#define S5P_VA_GIC_DIST S3C_ADDR(0x02820000)
|
||||
|
||||
#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
|
||||
#define VA_VIC0 VA_VIC(0)
|
||||
#define VA_VIC1 VA_VIC(1)
|
||||
#define VA_VIC2 VA_VIC(2)
|
||||
#define VA_VIC3 VA_VIC(3)
|
||||
|
||||
#define S5P_VA_UART(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
|
||||
#define S5P_VA_UART0 S5P_VA_UART(0)
|
||||
#define S5P_VA_UART1 S5P_VA_UART(1)
|
||||
#define S5P_VA_UART2 S5P_VA_UART(2)
|
||||
#define S5P_VA_UART3 S5P_VA_UART(3)
|
||||
|
||||
#ifndef S3C_UART_OFFSET
|
||||
#define S3C_UART_OFFSET (0x400)
|
||||
#endif
|
||||
|
|
Loading…
Reference in New Issue