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drm/amdgpu: add new SMU 7.0.1 registers for BACO
Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2 changed files with 3 additions and 0 deletions
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@ -49,6 +49,7 @@
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#define ixCG_SPLL_FUNC_CNTL_5 0xc0500150
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#define ixCG_SPLL_FUNC_CNTL_6 0xc0500154
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#define ixCG_SPLL_FUNC_CNTL_7 0xc0500158
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#define ixCG_SPLL_STATUS 0xC050015C
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#define ixSPLL_CNTL_MODE 0xc0500160
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#define ixCG_SPLL_SPREAD_SPECTRUM 0xc0500164
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#define ixCG_SPLL_SPREAD_SPECTRUM_2 0xc0500168
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@ -194,6 +194,8 @@
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#define CG_SPLL_FUNC_CNTL_6__SPLL_LF_CNTR__SHIFT 0x19
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#define CG_SPLL_FUNC_CNTL_7__SPLL_BW_CNTRL_MASK 0xfff
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#define CG_SPLL_FUNC_CNTL_7__SPLL_BW_CNTRL__SHIFT 0x0
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#define CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK 0x2
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#define CG_SPLL_STATUS__SPLL_CHG_STATUS__SHIFT 0x1
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#define SPLL_CNTL_MODE__SPLL_SW_DIR_CONTROL_MASK 0x1
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#define SPLL_CNTL_MODE__SPLL_SW_DIR_CONTROL__SHIFT 0x0
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#define SPLL_CNTL_MODE__SPLL_LEGACY_PDIV_MASK 0x2
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