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pinctrl: renesas: rzg2l: Rename RZG2L_SINGLE_PIN_GET_PORT macro
Rename RZG2L_SINGLE_PIN_GET_PORT -> RZG2L_SINGLE_PIN_GET_PORT_OFFSET. Also, rename port -> port_offset in rzg2l_pinctrl_pinconf_set/get for readability. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20211110224622.16022-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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parent
aa52b00844
commit
c76629a63b
1 changed files with 7 additions and 7 deletions
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@ -77,7 +77,7 @@
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#define RZG2L_SINGLE_PIN BIT(31)
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#define RZG2L_SINGLE_PIN_PACK(p, b, f) (RZG2L_SINGLE_PIN | \
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((p) << 24) | ((b) << 20) | (f))
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#define RZG2L_SINGLE_PIN_GET_PORT(x) (((x) & GENMASK(30, 24)) >> 24)
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#define RZG2L_SINGLE_PIN_GET_PORT_OFFSET(x) (((x) & GENMASK(30, 24)) >> 24)
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#define RZG2L_SINGLE_PIN_GET_BIT(x) (((x) & GENMASK(22, 20)) >> 20)
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#define RZG2L_SINGLE_PIN_GET_CFGS(x) ((x) & GENMASK(19, 0))
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@ -432,10 +432,10 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
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enum pin_config_param param = pinconf_to_config_param(*config);
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const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[_pin];
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unsigned int *pin_data = pin->drv_data;
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u32 port_offset = 0, reg;
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unsigned int arg = 0;
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unsigned long flags;
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void __iomem *addr;
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u32 port = 0, reg;
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u32 cfg = 0;
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u8 bit = 0;
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@ -443,7 +443,7 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
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return -EINVAL;
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if (*pin_data & RZG2L_SINGLE_PIN) {
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port = RZG2L_SINGLE_PIN_GET_PORT(*pin_data);
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port_offset = RZG2L_SINGLE_PIN_GET_PORT_OFFSET(*pin_data);
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cfg = RZG2L_SINGLE_PIN_GET_CFGS(*pin_data);
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bit = RZG2L_SINGLE_PIN_GET_BIT(*pin_data);
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}
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@ -454,7 +454,7 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
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return -EINVAL;
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spin_lock_irqsave(&pctrl->lock, flags);
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/* handle _L/_H for 32-bit register read/write */
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addr = pctrl->base + IEN(port);
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addr = pctrl->base + IEN(port_offset);
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if (bit >= 4) {
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bit -= 4;
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addr += 4;
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@ -502,9 +502,9 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
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const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[_pin];
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unsigned int *pin_data = pin->drv_data;
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enum pin_config_param param;
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u32 port_offset = 0, reg;
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unsigned long flags;
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void __iomem *addr;
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u32 port = 0, reg;
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unsigned int i;
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u32 cfg = 0;
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u8 bit = 0;
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@ -513,7 +513,7 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
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return -EINVAL;
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if (*pin_data & RZG2L_SINGLE_PIN) {
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port = RZG2L_SINGLE_PIN_GET_PORT(*pin_data);
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port_offset = RZG2L_SINGLE_PIN_GET_PORT_OFFSET(*pin_data);
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cfg = RZG2L_SINGLE_PIN_GET_CFGS(*pin_data);
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bit = RZG2L_SINGLE_PIN_GET_BIT(*pin_data);
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}
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@ -529,7 +529,7 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
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return -EINVAL;
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/* handle _L/_H for 32-bit register read/write */
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addr = pctrl->base + IEN(port);
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addr = pctrl->base + IEN(port_offset);
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if (bit >= 4) {
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bit -= 4;
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addr += 4;
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