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arm64: dts: imx8mp: Adjust ECSPI1 pinmux on i.MX8M Plus DHCOM
The ECSPI1 is on I2C1/I2C2 pins of the SoC, update the pinmux accordingly.
Fixes: 8d6712695b
("arm64: dts: imx8mp: Add support for DH electronics i.MX8M Plus DHCOM and PDK2")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
parent
706dd9d30d
commit
c7afab4ac7
1 changed files with 5 additions and 5 deletions
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@ -70,7 +70,7 @@ &A53_3 {
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
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cs-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
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status = "disabled";
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};
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@ -648,10 +648,10 @@ MX8MP_IOMUXC_SAI5_MCLK__GPIO3_IO25 0x40000080
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pinctrl_ecspi1: dhcom-ecspi1-grp {
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fsl,pins = <
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MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x44
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MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x44
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MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x44
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MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x40
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MX8MP_IOMUXC_I2C1_SCL__ECSPI1_SCLK 0x44
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MX8MP_IOMUXC_I2C1_SDA__ECSPI1_MOSI 0x44
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MX8MP_IOMUXC_I2C2_SCL__ECSPI1_MISO 0x44
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MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0x40
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>;
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};
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