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ata changes for 5.18-rc1

Browse source 
For this cycle, no big change but many small fixes and code cleanup to
 libata, the ahci driver and various pata drivers. In more details:
 
 * Code simplification in pata_platform using platform_get_mem_or_io(),
   from Lad.
 
 * Fix read-only arrays declarations as const in pata_atiixp and
   pata_pdc202xx_old, from Colin.
 
 * Various cleanups and code simplification in libata-scsi, from me.
 
 * Remove dead code in libata-acpi, from Sergey.
 
 * Skip device scan deboune delay for Marvell 88SE9235 adapters (ahci) to
   speedup boot, from Paul.
 
 * Simplify functions declaration and use for functions always returning
   0 in libata-core, from Sergey.
 
 * Non-fatal error fixes and in the pata_hpt366 and pata_hpt3x2n drivers,
   from Sergey.
 
 * Various code cleanup in the pata_artop, pata_hpt37x, pata_hpt366,
   pata_hpt3x2n, pata_samsung_cf and sata_rcar drivers, from Sergey.
 
 * Some libata-sff and libata-scsi code cleanup (e.g. change functions
   to return "bool"), from Sergey.
 
 * Renae ahci_board_mobile to board_ahci_low_power to be more descriptive
   of the feature as that is also used on PC and server AHCI adapters,
   from Mario.
 
 * Cleanup of OF match tables, from Geert.
 
 * Simplify the pata_pxa driver initialization using platform_get_irq(),
   from Minghao.
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Merge tag 'ata-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata

Pull ata updates from Damien Le Moal:
 "For this cycle, no big change but many small fixes and code cleanup to
  libata, the ahci driver and various pata drivers. In more details:

   - Code simplification in pata_platform using
     platform_get_mem_or_io(), from Lad.

   - Fix read-only arrays declarations as const in pata_atiixp and
     pata_pdc202xx_old, from Colin.

   - Various cleanups and code simplification in libata-scsi, from me.

   - Remove dead code in libata-acpi, from Sergey.

   - Skip device scan deboune delay for Marvell 88SE9235 adapters (ahci)
     to speedup boot, from Paul.

   - Simplify functions declaration and use for functions always
     returning 0 in libata-core, from Sergey.

   - Non-fatal error fixes and in the pata_hpt366 and pata_hpt3x2n
     drivers, from Sergey.

   - Various code cleanup in the pata_artop, pata_hpt37x, pata_hpt366,
     pata_hpt3x2n, pata_samsung_cf and sata_rcar drivers, from Sergey.

   - Some libata-sff and libata-scsi code cleanup (e.g. change functions
     to return "bool"), from Sergey.

   - Renae ahci_board_mobile to board_ahci_low_power to be more
     descriptive of the feature as that is also used on PC and server
     AHCI adapters, from Mario.

   - Cleanup of OF match tables, from Geert.

   - Simplify the pata_pxa driver initialization using
     platform_get_irq(), from Minghao"

* tag 'ata-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata: (38 commits)
  ata: pata_pxa: Use platform_get_irq() to get the interrupt
  ata: Drop commas after OF match table sentinels
  ata: ahci: Rename CONFIG_SATA_LPM_MOBILE_POLICY configuration item
  ata: ahci: Rename `AHCI_HFLAG_IS_MOBILE`
  ata: ahci: Rename board_ahci_mobile
  ata: pata_hpt37x: merge transfer mode setting methods
  ata: libata-sff: use *switch* statement in ata_sff_dev_classify()
  ata: add/use ata_taskfile::{error|status} fields
  ata: Kconfig: fix sata gemini compile test condition
  ata: libata-scsi: use *switch* statements to check SCSI command codes
  ata: libata-sff: refactor ata_sff_altstatus()
  ata: libata-sff: refactor ata_sff_set_devctl()
  ata: libata-sff: make ata_resources_present() return 'bool'
  ata: pata_hpt3x2n: disable fast interrupts in prereset() method
  ata: pata_hpt37x: disable fast interrupts in prereset() method
  ata: pata_hpt366: disable fast interrupts in prereset() method
  ata: pata_mpc52xx: use GFP_KERNEL
  ata: sata_rcar: drop unused #define's
  ata: pata_hpt366: check channel enable bits
  ata: sata_rcar: make sata_rcar_ata_devchk() return 'bool'
  ...
This commit is contained in:
Linus Torvalds 2022-03-23 14:35:59 -07:00
commit c7d4b15372
57 changed files with 456 additions and 534 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
drivers/ata/Kconfig
View file

@ -115,14 +115,14 @@ config SATA_AHCI
If unsure, say N.
config SATA_MOBILE_LPM_POLICY
int "Default SATA Link Power Management policy for mobile chipsets"
config SATA_LPM_POLICY
int "Default SATA Link Power Management policy for low power chipsets"
range 0 4
default 0
depends on SATA_AHCI
help
Select the Default SATA Link Power Management (LPM) policy to use
for mobile / laptop variants of chipsets / "South Bridges".
for chipsets / "South Bridges" designated as supporting low power.
The value set has the following meanings:
0 => Keep firmware settings
@ -283,7 +283,7 @@ config SATA_FSL
config SATA_GEMINI
tristate "Gemini SATA bridge support"
depends on ARCH_GEMINI || COMPILE_TEST
depends on ARCH_GEMINI || (OF && COMPILE_TEST)
select SATA_HOST
default ARCH_GEMINI
help

2
drivers/ata/acard-ahci.c
View file

@ -265,7 +265,7 @@ static bool acard_ahci_qc_fill_rtf(struct ata_queued_cmd *qc)
if (qc->tf.protocol == ATA_PROT_PIO && qc->dma_dir == DMA_FROM_DEVICE &&
!(qc->flags & ATA_QCFLAG_FAILED)) {
ata_tf_from_fis(rx_fis + RX_FIS_PIO_SETUP, &qc->result_tf);
qc->result_tf.command = (rx_fis + RX_FIS_PIO_SETUP)[15];
qc->result_tf.status = (rx_fis + RX_FIS_PIO_SETUP)[15];
} else
ata_tf_from_fis(rx_fis + RX_FIS_D2H_REG, &qc->result_tf);

113
drivers/ata/ahci.c
View file

@ -50,7 +50,7 @@ enum board_ids {
/* board IDs by feature in alphabetical order */
board_ahci,
board_ahci_ign_iferr,
board_ahci_mobile,
board_ahci_low_power,
board_ahci_no_debounce_delay,
board_ahci_nomsi,
board_ahci_noncq,
@ -135,8 +135,8 @@ static const struct ata_port_info ahci_port_info[] = {
.udma_mask = ATA_UDMA6,
.port_ops = &ahci_ops,
},
[board_ahci_mobile] = {
AHCI_HFLAGS (AHCI_HFLAG_IS_MOBILE),
[board_ahci_low_power] = {
AHCI_HFLAGS (AHCI_HFLAG_USE_LPM_POLICY),
.flags = AHCI_FLAG_COMMON,
.pio_mask = ATA_PIO4,
.udma_mask = ATA_UDMA6,
@ -275,13 +275,13 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, 0x2924), board_ahci }, /* ICH9 */
{ PCI_VDEVICE(INTEL, 0x2925), board_ahci }, /* ICH9 */
{ PCI_VDEVICE(INTEL, 0x2927), board_ahci }, /* ICH9 */
{ PCI_VDEVICE(INTEL, 0x2929), board_ahci_mobile }, /* ICH9M */
{ PCI_VDEVICE(INTEL, 0x292a), board_ahci_mobile }, /* ICH9M */
{ PCI_VDEVICE(INTEL, 0x292b), board_ahci_mobile }, /* ICH9M */
{ PCI_VDEVICE(INTEL, 0x292c), board_ahci_mobile }, /* ICH9M */
{ PCI_VDEVICE(INTEL, 0x292f), board_ahci_mobile }, /* ICH9M */
{ PCI_VDEVICE(INTEL, 0x2929), board_ahci_low_power }, /* ICH9M */
{ PCI_VDEVICE(INTEL, 0x292a), board_ahci_low_power }, /* ICH9M */
{ PCI_VDEVICE(INTEL, 0x292b), board_ahci_low_power }, /* ICH9M */
{ PCI_VDEVICE(INTEL, 0x292c), board_ahci_low_power }, /* ICH9M */
{ PCI_VDEVICE(INTEL, 0x292f), board_ahci_low_power }, /* ICH9M */
{ PCI_VDEVICE(INTEL, 0x294d), board_ahci }, /* ICH9 */
{ PCI_VDEVICE(INTEL, 0x294e), board_ahci_mobile }, /* ICH9M */
{ PCI_VDEVICE(INTEL, 0x294e), board_ahci_low_power }, /* ICH9M */
{ PCI_VDEVICE(INTEL, 0x502a), board_ahci }, /* Tolapai */
{ PCI_VDEVICE(INTEL, 0x502b), board_ahci }, /* Tolapai */
{ PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */
@ -291,9 +291,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */
{ PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */
{ PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */
{ PCI_VDEVICE(INTEL, 0x3b29), board_ahci_mobile }, /* PCH M AHCI */
{ PCI_VDEVICE(INTEL, 0x3b29), board_ahci_low_power }, /* PCH M AHCI */
{ PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
{ PCI_VDEVICE(INTEL, 0x3b2c), board_ahci_mobile }, /* PCH M RAID */
{ PCI_VDEVICE(INTEL, 0x3b2c), board_ahci_low_power }, /* PCH M RAID */
{ PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
{ PCI_VDEVICE(INTEL, 0x19b0), board_ahci_pcs7 }, /* DNV AHCI */
{ PCI_VDEVICE(INTEL, 0x19b1), board_ahci_pcs7 }, /* DNV AHCI */
@ -316,9 +316,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, 0x19cE), board_ahci_pcs7 }, /* DNV AHCI */
{ PCI_VDEVICE(INTEL, 0x19cF), board_ahci_pcs7 }, /* DNV AHCI */
{ PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
{ PCI_VDEVICE(INTEL, 0x1c03), board_ahci_mobile }, /* CPT M AHCI */
{ PCI_VDEVICE(INTEL, 0x1c03), board_ahci_low_power }, /* CPT M AHCI */
{ PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
{ PCI_VDEVICE(INTEL, 0x1c05), board_ahci_mobile }, /* CPT M RAID */
{ PCI_VDEVICE(INTEL, 0x1c05), board_ahci_low_power }, /* CPT M RAID */
{ PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
{ PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
{ PCI_VDEVICE(INTEL, 0x1d02), board_ahci }, /* PBG AHCI */
@ -327,29 +327,29 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* PBG/Lewisburg RAID*/
{ PCI_VDEVICE(INTEL, 0x2323), board_ahci }, /* DH89xxCC AHCI */
{ PCI_VDEVICE(INTEL, 0x1e02), board_ahci }, /* Panther Point AHCI */
{ PCI_VDEVICE(INTEL, 0x1e03), board_ahci_mobile }, /* Panther M AHCI */
{ PCI_VDEVICE(INTEL, 0x1e03), board_ahci_low_power }, /* Panther M AHCI */
{ PCI_VDEVICE(INTEL, 0x1e04), board_ahci }, /* Panther Point RAID */
{ PCI_VDEVICE(INTEL, 0x1e05), board_ahci }, /* Panther Point RAID */
{ PCI_VDEVICE(INTEL, 0x1e06), board_ahci }, /* Panther Point RAID */
{ PCI_VDEVICE(INTEL, 0x1e07), board_ahci_mobile }, /* Panther M RAID */
{ PCI_VDEVICE(INTEL, 0x1e07), board_ahci_low_power }, /* Panther M RAID */
{ PCI_VDEVICE(INTEL, 0x1e0e), board_ahci }, /* Panther Point RAID */
{ PCI_VDEVICE(INTEL, 0x8c02), board_ahci }, /* Lynx Point AHCI */
{ PCI_VDEVICE(INTEL, 0x8c03), board_ahci_mobile }, /* Lynx M AHCI */
{ PCI_VDEVICE(INTEL, 0x8c03), board_ahci_low_power }, /* Lynx M AHCI */
{ PCI_VDEVICE(INTEL, 0x8c04), board_ahci }, /* Lynx Point RAID */
{ PCI_VDEVICE(INTEL, 0x8c05), board_ahci_mobile }, /* Lynx M RAID */
{ PCI_VDEVICE(INTEL, 0x8c05), board_ahci_low_power }, /* Lynx M RAID */
{ PCI_VDEVICE(INTEL, 0x8c06), board_ahci }, /* Lynx Point RAID */
{ PCI_VDEVICE(INTEL, 0x8c07), board_ahci_mobile }, /* Lynx M RAID */
{ PCI_VDEVICE(INTEL, 0x8c07), board_ahci_low_power }, /* Lynx M RAID */
{ PCI_VDEVICE(INTEL, 0x8c0e), board_ahci }, /* Lynx Point RAID */
{ PCI_VDEVICE(INTEL, 0x8c0f), board_ahci_mobile }, /* Lynx M RAID */
{ PCI_VDEVICE(INTEL, 0x9c02), board_ahci_mobile }, /* Lynx LP AHCI */
{ PCI_VDEVICE(INTEL, 0x9c03), board_ahci_mobile }, /* Lynx LP AHCI */
{ PCI_VDEVICE(INTEL, 0x9c04), board_ahci_mobile }, /* Lynx LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c05), board_ahci_mobile }, /* Lynx LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c06), board_ahci_mobile }, /* Lynx LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c07), board_ahci_mobile }, /* Lynx LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c0e), board_ahci_mobile }, /* Lynx LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c0f), board_ahci_mobile }, /* Lynx LP RAID */
{ PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_mobile }, /* Cannon Lake PCH-LP AHCI */
{ PCI_VDEVICE(INTEL, 0x8c0f), board_ahci_low_power }, /* Lynx M RAID */
{ PCI_VDEVICE(INTEL, 0x9c02), board_ahci_low_power }, /* Lynx LP AHCI */
{ PCI_VDEVICE(INTEL, 0x9c03), board_ahci_low_power }, /* Lynx LP AHCI */
{ PCI_VDEVICE(INTEL, 0x9c04), board_ahci_low_power }, /* Lynx LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c05), board_ahci_low_power }, /* Lynx LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c06), board_ahci_low_power }, /* Lynx LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c07), board_ahci_low_power }, /* Lynx LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c0e), board_ahci_low_power }, /* Lynx LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c0f), board_ahci_low_power }, /* Lynx LP RAID */
{ PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_low_power }, /* Cannon Lake PCH-LP AHCI */
{ PCI_VDEVICE(INTEL, 0x1f22), board_ahci }, /* Avoton AHCI */
{ PCI_VDEVICE(INTEL, 0x1f23), board_ahci }, /* Avoton AHCI */
{ PCI_VDEVICE(INTEL, 0x1f24), board_ahci }, /* Avoton RAID */
@ -381,26 +381,26 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, 0x8d66), board_ahci }, /* Wellsburg RAID */
{ PCI_VDEVICE(INTEL, 0x8d6e), board_ahci }, /* Wellsburg RAID */
{ PCI_VDEVICE(INTEL, 0x23a3), board_ahci }, /* Coleto Creek AHCI */
{ PCI_VDEVICE(INTEL, 0x9c83), board_ahci_mobile }, /* Wildcat LP AHCI */
{ PCI_VDEVICE(INTEL, 0x9c85), board_ahci_mobile }, /* Wildcat LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c87), board_ahci_mobile }, /* Wildcat LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c8f), board_ahci_mobile }, /* Wildcat LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c83), board_ahci_low_power }, /* Wildcat LP AHCI */
{ PCI_VDEVICE(INTEL, 0x9c85), board_ahci_low_power }, /* Wildcat LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c87), board_ahci_low_power }, /* Wildcat LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c8f), board_ahci_low_power }, /* Wildcat LP RAID */
{ PCI_VDEVICE(INTEL, 0x8c82), board_ahci }, /* 9 Series AHCI */
{ PCI_VDEVICE(INTEL, 0x8c83), board_ahci_mobile }, /* 9 Series M AHCI */
{ PCI_VDEVICE(INTEL, 0x8c83), board_ahci_low_power }, /* 9 Series M AHCI */
{ PCI_VDEVICE(INTEL, 0x8c84), board_ahci }, /* 9 Series RAID */
{ PCI_VDEVICE(INTEL, 0x8c85), board_ahci_mobile }, /* 9 Series M RAID */
{ PCI_VDEVICE(INTEL, 0x8c85), board_ahci_low_power }, /* 9 Series M RAID */
{ PCI_VDEVICE(INTEL, 0x8c86), board_ahci }, /* 9 Series RAID */
{ PCI_VDEVICE(INTEL, 0x8c87), board_ahci_mobile }, /* 9 Series M RAID */
{ PCI_VDEVICE(INTEL, 0x8c87), board_ahci_low_power }, /* 9 Series M RAID */
{ PCI_VDEVICE(INTEL, 0x8c8e), board_ahci }, /* 9 Series RAID */
{ PCI_VDEVICE(INTEL, 0x8c8f), board_ahci_mobile }, /* 9 Series M RAID */
{ PCI_VDEVICE(INTEL, 0x9d03), board_ahci_mobile }, /* Sunrise LP AHCI */
{ PCI_VDEVICE(INTEL, 0x9d05), board_ahci_mobile }, /* Sunrise LP RAID */
{ PCI_VDEVICE(INTEL, 0x9d07), board_ahci_mobile }, /* Sunrise LP RAID */
{ PCI_VDEVICE(INTEL, 0x8c8f), board_ahci_low_power }, /* 9 Series M RAID */
{ PCI_VDEVICE(INTEL, 0x9d03), board_ahci_low_power }, /* Sunrise LP AHCI */
{ PCI_VDEVICE(INTEL, 0x9d05), board_ahci_low_power }, /* Sunrise LP RAID */
{ PCI_VDEVICE(INTEL, 0x9d07), board_ahci_low_power }, /* Sunrise LP RAID */
{ PCI_VDEVICE(INTEL, 0xa102), board_ahci }, /* Sunrise Point-H AHCI */
{ PCI_VDEVICE(INTEL, 0xa103), board_ahci_mobile }, /* Sunrise M AHCI */
{ PCI_VDEVICE(INTEL, 0xa103), board_ahci_low_power }, /* Sunrise M AHCI */
{ PCI_VDEVICE(INTEL, 0xa105), board_ahci }, /* Sunrise Point-H RAID */
{ PCI_VDEVICE(INTEL, 0xa106), board_ahci }, /* Sunrise Point-H RAID */
{ PCI_VDEVICE(INTEL, 0xa107), board_ahci_mobile }, /* Sunrise M RAID */
{ PCI_VDEVICE(INTEL, 0xa107), board_ahci_low_power }, /* Sunrise M RAID */
{ PCI_VDEVICE(INTEL, 0xa10f), board_ahci }, /* Sunrise Point-H RAID */
{ PCI_VDEVICE(INTEL, 0xa182), board_ahci }, /* Lewisburg AHCI*/
{ PCI_VDEVICE(INTEL, 0xa186), board_ahci }, /* Lewisburg RAID*/
@ -413,13 +413,13 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, 0xa356), board_ahci }, /* Cannon Lake PCH-H RAID */
{ PCI_VDEVICE(INTEL, 0x06d7), board_ahci }, /* Comet Lake-H RAID */
{ PCI_VDEVICE(INTEL, 0xa386), board_ahci }, /* Comet Lake PCH-V RAID */
{ PCI_VDEVICE(INTEL, 0x0f22), board_ahci_mobile }, /* Bay Trail AHCI */
{ PCI_VDEVICE(INTEL, 0x0f23), board_ahci_mobile }, /* Bay Trail AHCI */
{ PCI_VDEVICE(INTEL, 0x22a3), board_ahci_mobile }, /* Cherry Tr. AHCI */
{ PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_mobile }, /* ApolloLake AHCI */
{ PCI_VDEVICE(INTEL, 0x34d3), board_ahci_mobile }, /* Ice Lake LP AHCI */
{ PCI_VDEVICE(INTEL, 0x02d3), board_ahci_mobile }, /* Comet Lake PCH-U AHCI */
{ PCI_VDEVICE(INTEL, 0x02d7), board_ahci_mobile }, /* Comet Lake PCH RAID */
{ PCI_VDEVICE(INTEL, 0x0f22), board_ahci_low_power }, /* Bay Trail AHCI */
{ PCI_VDEVICE(INTEL, 0x0f23), board_ahci_low_power }, /* Bay Trail AHCI */
{ PCI_VDEVICE(INTEL, 0x22a3), board_ahci_low_power }, /* Cherry Tr. AHCI */
{ PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_low_power }, /* ApolloLake AHCI */
{ PCI_VDEVICE(INTEL, 0x34d3), board_ahci_low_power }, /* Ice Lake LP AHCI */
{ PCI_VDEVICE(INTEL, 0x02d3), board_ahci_low_power }, /* Comet Lake PCH-U AHCI */
{ PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */
/* JMicron 360/1/3/5/6, match class to avoid IDE function */
{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
@ -447,7 +447,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */
{ PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /* AMD Hudson-2 (AHCI mode) */
{ PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */
{ PCI_VDEVICE(AMD, 0x7901), board_ahci_mobile }, /* AMD Green Sardine */
{ PCI_VDEVICE(AMD, 0x7901), board_ahci_low_power }, /* AMD Green Sardine */
/* AMD is using RAID class only for ahci controllers */
{ PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci },
@ -582,6 +582,8 @@ static const struct pci_device_id ahci_pci_tbl[] = {
.driver_data = board_ahci_yes_fbs },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9230),
.driver_data = board_ahci_yes_fbs },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9235),
.driver_data = board_ahci_no_debounce_delay },
{ PCI_DEVICE(PCI_VENDOR_ID_TTI, 0x0642), /* highpoint rocketraid 642L */
.driver_data = board_ahci_yes_fbs },
{ PCI_DEVICE(PCI_VENDOR_ID_TTI, 0x0645), /* highpoint rocketraid 644L */
@ -737,7 +739,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
/* clear D2H reception area to properly wait for D2H FIS */
ata_tf_init(link->device, &tf);
tf.command = ATA_BUSY;
tf.status = ATA_BUSY;
ata_tf_to_fis(&tf, 0, 0, d2h_fis);
rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
@ -806,7 +808,7 @@ static int ahci_avn_hardreset(struct ata_link *link, unsigned int *class,
/* clear D2H reception area to properly wait for D2H FIS */
ata_tf_init(link->device, &tf);
tf.command = ATA_BUSY;
tf.status = ATA_BUSY;
ata_tf_to_fis(&tf, 0, 0, d2h_fis);
rc = sata_link_hardreset(link, timing, deadline, &online,
@ -889,7 +891,8 @@ static int ahci_pci_device_suspend(struct device *dev)
}
ahci_pci_disable_interrupts(host);
return ata_host_suspend(host, PMSG_SUSPEND);
ata_host_suspend(host, PMSG_SUSPEND);
return 0;
}
static int ahci_pci_device_resume(struct device *dev)
@ -1592,11 +1595,11 @@ static int ahci_init_msi(struct pci_dev *pdev, unsigned int n_ports,
static void ahci_update_initial_lpm_policy(struct ata_port *ap,
struct ahci_host_priv *hpriv)
{
int policy = CONFIG_SATA_MOBILE_LPM_POLICY;
int policy = CONFIG_SATA_LPM_POLICY;
/* Ignore processing for non mobile platforms */
if (!(hpriv->flags & AHCI_HFLAG_IS_MOBILE))
/* Ignore processing for chipsets that don't use policy */
if (!(hpriv->flags & AHCI_HFLAG_USE_LPM_POLICY))
return;
/* user modified policy via module param */

4
drivers/ata/ahci.h
View file

@ -235,8 +235,8 @@ enum {
AHCI_HFLAG_YES_ALPM = (1 << 23), /* force ALPM cap on */
AHCI_HFLAG_NO_WRITE_TO_RO = (1 << 24), /* don't write to read
only registers */
AHCI_HFLAG_IS_MOBILE = (1 << 25), /* mobile chipset, use
SATA_MOBILE_LPM_POLICY
AHCI_HFLAG_USE_LPM_POLICY = (1 << 25), /* chipset that should use
SATA_LPM_POLICY
as default lpm_policy */
AHCI_HFLAG_SUSPEND_PHYS = (1 << 26), /* handle PHYs during
suspend/resume */

2
drivers/ata/ahci_brcm.c
View file

@ -427,7 +427,7 @@ static const struct of_device_id ahci_of_match[] = {
{.compatible = "brcm,bcm63138-ahci", .data = (void *)BRCM_SATA_BCM7445},
{.compatible = "brcm,bcm-nsp-ahci", .data = (void *)BRCM_SATA_NSP},
{.compatible = "brcm,bcm7216-ahci", .data = (void *)BRCM_SATA_BCM7216},
{},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ahci_of_match);

2
drivers/ata/ahci_ceva.c
View file

@ -363,7 +363,7 @@ static SIMPLE_DEV_PM_OPS(ahci_ceva_pm_ops, ceva_ahci_suspend, ceva_ahci_resume);
static const struct of_device_id ceva_ahci_of_match[] = {
{ .compatible = "ceva,ahci-1v84" },
{},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ceva_ahci_of_match);

2
drivers/ata/ahci_da850.c
View file

@ -241,7 +241,7 @@ static SIMPLE_DEV_PM_OPS(ahci_da850_pm_ops, ahci_platform_suspend,
static const struct of_device_id ahci_da850_of_match[] = {
{ .compatible = "ti,da850-ahci", },
{ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ahci_da850_of_match);

2
drivers/ata/ahci_dm816.c
View file

@ -176,7 +176,7 @@ static SIMPLE_DEV_PM_OPS(ahci_dm816_pm_ops,
static const struct of_device_id ahci_dm816_of_match[] = {
{ .compatible = "ti,dm816-ahci", },
{ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ahci_dm816_of_match);

2
drivers/ata/ahci_imx.c
View file

@ -811,7 +811,7 @@ static const struct of_device_id imx_ahci_of_match[] = {
{ .compatible = "fsl,imx6q-ahci", .data = (void *)AHCI_IMX6Q },
{ .compatible = "fsl,imx6qp-ahci", .data = (void *)AHCI_IMX6QP },
{ .compatible = "fsl,imx8qm-ahci", .data = (void *)AHCI_IMX8QM },
{},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, imx_ahci_of_match);

2
drivers/ata/ahci_mtk.c
View file

@ -169,7 +169,7 @@ static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_platform_suspend,
static const struct of_device_id ahci_of_match[] = {
{ .compatible = "mediatek,mtk-ahci", },
{},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ahci_of_match);

2
drivers/ata/ahci_mvebu.c
View file

@ -239,7 +239,7 @@ static const struct of_device_id ahci_mvebu_of_match[] = {
.compatible = "marvell,armada-3700-ahci",
.data = &ahci_mvebu_armada_3700_plat_data,
},
{ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);

2
drivers/ata/ahci_octeon.c
View file

@ -80,7 +80,7 @@ static int ahci_octeon_remove(struct platform_device *pdev)
static const struct of_device_id octeon_ahci_match[] = {
{ .compatible = "cavium,octeon-7130-sata-uctl", },
{},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, octeon_ahci_match);

2
drivers/ata/ahci_platform.c
View file

@ -88,7 +88,7 @@ static const struct of_device_id ahci_of_match[] = {
{ .compatible = "snps,dwc-ahci", },
{ .compatible = "hisilicon,hisi-ahci", },
{ .compatible = "cavium,octeon-7130-ahci", },
{},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ahci_of_match);

4
drivers/ata/ahci_qoriq.c
View file

@ -77,7 +77,7 @@ static const struct of_device_id ahci_qoriq_of_match[] = {
{ .compatible = "fsl,ls1088a-ahci", .data = (void *)AHCI_LS1088A},
{ .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A},
{ .compatible = "fsl,lx2160a-ahci", .data = (void *)AHCI_LX2160A},
{},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ahci_qoriq_of_match);
@ -123,7 +123,7 @@ static int ahci_qoriq_hardreset(struct ata_link *link, unsigned int *class,
/* clear D2H reception area to properly wait for D2H FIS */
ata_tf_init(link->device, &tf);
tf.command = ATA_BUSY;
tf.status = ATA_BUSY;
ata_tf_to_fis(&tf, 0, 0, d2h_fis);
rc = sata_link_hardreset(link, timing, deadline, &online,

2
drivers/ata/ahci_st.c
View file

@ -232,7 +232,7 @@ static SIMPLE_DEV_PM_OPS(st_ahci_pm_ops, st_ahci_suspend, st_ahci_resume);
static const struct of_device_id st_ahci_match[] = {
{ .compatible = "st,ahci", },
{},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, st_ahci_match);

2
drivers/ata/ahci_sunxi.c
View file

@ -286,7 +286,7 @@ static SIMPLE_DEV_PM_OPS(ahci_sunxi_pm_ops, ahci_platform_suspend,
static const struct of_device_id ahci_sunxi_of_match[] = {
{ .compatible = "allwinner,sun4i-a10-ahci", },
{ .compatible = "allwinner,sun8i-r40-ahci", },
{ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ahci_sunxi_of_match);

4
drivers/ata/ahci_xgene.c
View file

@ -365,7 +365,7 @@ static int xgene_ahci_do_hardreset(struct ata_link *link,
do {
/* clear D2H reception area to properly wait for D2H FIS */
ata_tf_init(link->device, &tf);
tf.command = ATA_BUSY;
tf.status = ATA_BUSY;
ata_tf_to_fis(&tf, 0, 0, d2h_fis);
rc = sata_link_hardreset(link, timing, deadline, online,
ahci_check_ready);
@ -726,7 +726,7 @@ MODULE_DEVICE_TABLE(acpi, xgene_ahci_acpi_match);
static const struct of_device_id xgene_ahci_of_match[] = {
{.compatible = "apm,xgene-ahci", .data = (void *) XGENE_AHCI_V1},
{.compatible = "apm,xgene-ahci-v2", .data = (void *) XGENE_AHCI_V2},
{},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, xgene_ahci_of_match);

5
drivers/ata/ata_piix.c
View file

@ -993,11 +993,8 @@ static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
{
struct ata_host *host = pci_get_drvdata(pdev);
unsigned long flags;
int rc = 0;
rc = ata_host_suspend(host, mesg);
if (rc)
return rc;
ata_host_suspend(host, mesg);
/* Some braindamaged ACPI suspend implementations expect the
* controller to be awake on entry; otherwise, it burns cpu

4
drivers/ata/libahci.c
View file

@ -1561,7 +1561,7 @@ int ahci_do_hardreset(struct ata_link *link, unsigned int *class,
/* clear D2H reception area to properly wait for D2H FIS */
ata_tf_init(link->device, &tf);
tf.command = ATA_BUSY;
tf.status = ATA_BUSY;
ata_tf_to_fis(&tf, 0, 0, d2h_fis);
rc = sata_link_hardreset(link, timing, deadline, online,
@ -2033,7 +2033,7 @@ static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc)
if (qc->tf.protocol == ATA_PROT_PIO && qc->dma_dir == DMA_FROM_DEVICE &&
!(qc->flags & ATA_QCFLAG_FAILED)) {
ata_tf_from_fis(rx_fis + RX_FIS_PIO_SETUP, &qc->result_tf);
qc->result_tf.command = (rx_fis + RX_FIS_PIO_SETUP)[15];
qc->result_tf.status = (rx_fis + RX_FIS_PIO_SETUP)[15];
} else
ata_tf_from_fis(rx_fis + RX_FIS_D2H_REG, &qc->result_tf);

3
drivers/ata/libahci_platform.c
View file

@ -733,7 +733,8 @@ int ahci_platform_suspend_host(struct device *dev)
if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
ahci_platform_disable_phys(hpriv);
return ata_host_suspend(host, PMSG_SUSPEND);
ata_host_suspend(host, PMSG_SUSPEND);
return 0;
}
EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);

29
drivers/ata/libata-acpi.c
View file

@ -546,13 +546,13 @@ static void ata_acpi_gtf_to_tf(struct ata_device *dev,
tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
tf->protocol = ATA_PROT_NODATA;
tf->feature = gtf->tf[0]; /* 0x1f1 */
tf->error = gtf->tf[0]; /* 0x1f1 */
tf->nsect = gtf->tf[1]; /* 0x1f2 */
tf->lbal = gtf->tf[2]; /* 0x1f3 */
tf->lbam = gtf->tf[3]; /* 0x1f4 */
tf->lbah = gtf->tf[4]; /* 0x1f5 */
tf->device = gtf->tf[5]; /* 0x1f6 */
tf->command = gtf->tf[6]; /* 0x1f7 */
tf->status = gtf->tf[6]; /* 0x1f7 */
}
static int ata_acpi_filter_tf(struct ata_device *dev,
@ -679,7 +679,7 @@ static int ata_acpi_run_tf(struct ata_device *dev,
"(%s) rejected by device (Stat=0x%02x Err=0x%02x)",
tf.command, tf.feature, tf.nsect, tf.lbal,
tf.lbam, tf.lbah, tf.device, descr,
rtf.command, rtf.feature);
rtf.status, rtf.error);
rc = 0;
break;
@ -689,7 +689,7 @@ static int ata_acpi_run_tf(struct ata_device *dev,
"(%s) failed (Emask=0x%x Stat=0x%02x Err=0x%02x)",
tf.command, tf.feature, tf.nsect, tf.lbal,
tf.lbam, tf.lbah, tf.device, descr,
err_mask, rtf.command, rtf.feature);
err_mask, rtf.status, rtf.error);
rc = -EIO;
break;
}
@ -799,27 +799,6 @@ static int ata_acpi_push_id(struct ata_device *dev)
return 0;
}
/**
* ata_acpi_on_suspend - ATA ACPI hook called on suspend
* @ap: target ATA port
*
* This function is called when @ap is about to be suspended. All
* devices are already put to sleep but the port_suspend() callback
* hasn't been executed yet. Error return from this function aborts
* suspend.
*
* LOCKING:
* EH context.
*
* RETURNS:
* 0 on success, -errno on failure.
*/
int ata_acpi_on_suspend(struct ata_port *ap)
{
/* nada */
return 0;
}
/**
* ata_acpi_on_resume - ATA ACPI hook called on resume
* @ap: target ATA port

22
drivers/ata/libata-core.c
View file

@ -1171,7 +1171,7 @@ static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
ata_dev_warn(dev,
"failed to read native max address (err_mask=0x%x)\n",
err_mask);
if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
if (err_mask == AC_ERR_DEV && (tf.error & ATA_ABORTED))
return -EACCES;
return -EIO;
}
@ -1235,7 +1235,7 @@ static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
"failed to set max address (err_mask=0x%x)\n",
err_mask);
if (err_mask == AC_ERR_DEV &&
(tf.feature & (ATA_ABORTED | ATA_IDNF)))
(tf.error & (ATA_ABORTED | ATA_IDNF)))
return -EACCES;
return -EIO;
}
@ -1584,7 +1584,7 @@ unsigned ata_exec_internal_sg(struct ata_device *dev,
/* perform minimal error analysis */
if (qc->flags & ATA_QCFLAG_FAILED) {
if (qc->result_tf.command & (ATA_ERR | ATA_DF))
if (qc->result_tf.status & (ATA_ERR | ATA_DF))
qc->err_mask |= AC_ERR_DEV;
if (!qc->err_mask)
@ -1593,7 +1593,7 @@ unsigned ata_exec_internal_sg(struct ata_device *dev,
if (qc->err_mask & ~AC_ERR_OTHER)
qc->err_mask &= ~AC_ERR_OTHER;
} else if (qc->tf.command == ATA_CMD_REQ_SENSE_DATA) {
qc->result_tf.command |= ATA_SENSE;
qc->result_tf.status |= ATA_SENSE;
}
/* finish up */
@ -1813,7 +1813,7 @@ int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
return 0;
}
if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
if ((err_mask == AC_ERR_DEV) && (tf.error & ATA_ABORTED)) {
/* Device or controller might have reported
* the wrong device class. Give a shot at the
* other IDENTIFY if the current one is
@ -3569,7 +3569,7 @@ EXPORT_SYMBOL_GPL(ata_wait_after_reset);
* Kernel thread context (may sleep)
*
* RETURNS:
* 0 on success, -errno otherwise.
* Always 0.
*/
int ata_std_prereset(struct ata_link *link, unsigned long deadline)
{
@ -4384,7 +4384,7 @@ static unsigned int ata_dev_init_params(struct ata_device *dev,
/* A clean abort indicates an original or just out of spec drive
and we should continue as we issue the setup based on the
drive reported working geometry */
if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
if (err_mask == AC_ERR_DEV && (tf.error & ATA_ABORTED))
err_mask = 0;
return err_mask;
@ -5179,10 +5179,9 @@ EXPORT_SYMBOL_GPL(ata_sas_port_resume);
*
* Suspend @host. Actual operation is performed by port suspend.
*/
int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
void ata_host_suspend(struct ata_host *host, pm_message_t mesg)
{
host->dev->power.power_state = mesg;
return 0;
}
EXPORT_SYMBOL_GPL(ata_host_suspend);
@ -6099,11 +6098,8 @@ EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
{
struct ata_host *host = pci_get_drvdata(pdev);
int rc = 0;
rc = ata_host_suspend(host, mesg);
if (rc)
return rc;
ata_host_suspend(host, mesg);
ata_pci_device_do_suspend(pdev, mesg);

49
drivers/ata/libata-eh.c
View file

@ -1386,7 +1386,7 @@ unsigned int atapi_eh_tur(struct ata_device *dev, u8 *r_sense_key)
err_mask = ata_exec_internal(dev, &tf, cdb, DMA_NONE, NULL, 0, 0);
if (err_mask == AC_ERR_DEV)
*r_sense_key = tf.feature >> 4;
*r_sense_key = tf.error >> 4;
return err_mask;
}
@ -1429,12 +1429,12 @@ static void ata_eh_request_sense(struct ata_queued_cmd *qc,
err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
/* Ignore err_mask; ATA_ERR might be set */
if (tf.command & ATA_SENSE) {
if (tf.status & ATA_SENSE) {
ata_scsi_set_sense(dev, cmd, tf.lbah, tf.lbam, tf.lbal);
qc->flags |= ATA_QCFLAG_SENSE_VALID;
} else {
ata_dev_warn(dev, "request sense failed stat %02x emask %x\n",
tf.command, err_mask);
tf.status, err_mask);
}
}
@ -1557,7 +1557,7 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc,
const struct ata_taskfile *tf)
{
unsigned int tmp, action = 0;
u8 stat = tf->command, err = tf->feature;
u8 stat = tf->status, err = tf->error;
if ((stat & (ATA_BUSY | ATA_DRQ | ATA_DRDY)) != ATA_DRDY) {
qc->err_mask |= AC_ERR_HSM;
@ -1594,7 +1594,7 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc,
if (!(qc->ap->pflags & ATA_PFLAG_FROZEN)) {
tmp = atapi_eh_request_sense(qc->dev,
qc->scsicmd->sense_buffer,
qc->result_tf.feature >> 4);
qc->result_tf.error >> 4);
if (!tmp)
qc->flags |= ATA_QCFLAG_SENSE_VALID;
else
@ -2360,7 +2360,7 @@ static void ata_eh_link_report(struct ata_link *link)
cmd->hob_feature, cmd->hob_nsect,
cmd->hob_lbal, cmd->hob_lbam, cmd->hob_lbah,
cmd->device, qc->tag, data_buf, cdb_buf,
res->command, res->feature, res->nsect,
res->status, res->error, res->nsect,
res->lbal, res->lbam, res->lbah,
res->hob_feature, res->hob_nsect,
res->hob_lbal, res->hob_lbam, res->hob_lbah,
@ -2368,28 +2368,28 @@ static void ata_eh_link_report(struct ata_link *link)
qc->err_mask & AC_ERR_NCQ ? " <F>" : "");
#ifdef CONFIG_ATA_VERBOSE_ERROR
if (res->command & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ |
ATA_SENSE | ATA_ERR)) {
if (res->command & ATA_BUSY)
if (res->status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ |
ATA_SENSE | ATA_ERR)) {
if (res->status & ATA_BUSY)
ata_dev_err(qc->dev, "status: { Busy }\n");
else
ata_dev_err(qc->dev, "status: { %s%s%s%s%s}\n",
res->command & ATA_DRDY ? "DRDY " : "",
res->command & ATA_DF ? "DF " : "",
res->command & ATA_DRQ ? "DRQ " : "",
res->command & ATA_SENSE ? "SENSE " : "",
res->command & ATA_ERR ? "ERR " : "");
res->status & ATA_DRDY ? "DRDY " : "",
res->status & ATA_DF ? "DF " : "",
res->status & ATA_DRQ ? "DRQ " : "",
res->status & ATA_SENSE ? "SENSE " : "",
res->status & ATA_ERR ? "ERR " : "");
}
if (cmd->command != ATA_CMD_PACKET &&
(res->feature & (ATA_ICRC | ATA_UNC | ATA_AMNF |
ATA_IDNF | ATA_ABORTED)))
(res->error & (ATA_ICRC | ATA_UNC | ATA_AMNF | ATA_IDNF |
ATA_ABORTED)))
ata_dev_err(qc->dev, "error: { %s%s%s%s%s}\n",
res->feature & ATA_ICRC ? "ICRC " : "",
res->feature & ATA_UNC ? "UNC " : "",
res->feature & ATA_AMNF ? "AMNF " : "",
res->feature & ATA_IDNF ? "IDNF " : "",
res->feature & ATA_ABORTED ? "ABRT " : "");
res->error & ATA_ICRC ? "ICRC " : "",
res->error & ATA_UNC ? "UNC " : "",
res->error & ATA_AMNF ? "AMNF " : "",
res->error & ATA_IDNF ? "IDNF " : "",
res->error & ATA_ABORTED ? "ABRT " : "");
#endif
}
}
@ -3902,11 +3902,6 @@ static void ata_eh_handle_port_suspend(struct ata_port *ap)
}
}
/* tell ACPI we're suspending */
rc = ata_acpi_on_suspend(ap);
if (rc)
goto out;
/* suspend */
ata_eh_freeze_port(ap);
@ -3914,7 +3909,7 @@ static void ata_eh_handle_port_suspend(struct ata_port *ap)
rc = ap->ops->port_suspend(ap, ap->pm_mesg);
ata_acpi_set_state(ap, ap->pm_mesg);
out:
/* update the flags */
spin_lock_irqsave(ap->lock, flags);

10
drivers/ata/libata-sata.c
View file

@ -191,8 +191,8 @@ EXPORT_SYMBOL_GPL(ata_tf_to_fis);
void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
{
tf->command = fis[2]; /* status */
tf->feature = fis[3]; /* error */
tf->status = fis[2];
tf->error = fis[3];
tf->lbal = fis[4];
tf->lbam = fis[5];
@ -1406,8 +1406,8 @@ static int ata_eh_read_log_10h(struct ata_device *dev,
*tag = buf[0] & 0x1f;
tf->command = buf[2];
tf->feature = buf[3];
tf->status = buf[2];
tf->error = buf[3];
tf->lbal = buf[4];
tf->lbam = buf[5];
tf->lbah = buf[6];
@ -1482,7 +1482,7 @@ void ata_eh_analyze_ncq_error(struct ata_link *link)
qc->result_tf.flags = ATA_TFLAG_ISADDR | ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
qc->err_mask |= AC_ERR_DEV | AC_ERR_NCQ;
if (dev->class == ATA_DEV_ZAC &&
((qc->result_tf.command & ATA_SENSE) || qc->result_tf.auxiliary)) {
((qc->result_tf.status & ATA_SENSE) || qc->result_tf.auxiliary)) {
char sense_key, asc, ascq;
sense_key = (qc->result_tf.auxiliary >> 16) & 0xff;

95
drivers/ata/libata-scsi.c
View file

@ -680,7 +680,7 @@ static void ata_qc_set_pc_nbytes(struct ata_queued_cmd *qc)
*/
static void ata_dump_status(struct ata_port *ap, struct ata_taskfile *tf)
{
u8 stat = tf->command, err = tf->feature;
u8 stat = tf->status, err = tf->error;
if (stat & ATA_BUSY) {
ata_port_warn(ap, "status=0x%02x {Busy} ", stat);
@ -871,8 +871,8 @@ static void ata_gen_passthru_sense(struct ata_queued_cmd *qc)
* onto sense key, asc & ascq.
*/
if (qc->err_mask ||
tf->command & (ATA_BUSY | ATA_DF | ATA_ERR | ATA_DRQ)) {
ata_to_sense_error(qc->ap->print_id, tf->command, tf->feature,
tf->status & (ATA_BUSY | ATA_DF | ATA_ERR | ATA_DRQ)) {
ata_to_sense_error(qc->ap->print_id, tf->status, tf->error,
&sense_key, &asc, &ascq, verbose);
ata_scsi_set_sense(qc->dev, cmd, sense_key, asc, ascq);
} else {
@ -901,13 +901,13 @@ static void ata_gen_passthru_sense(struct ata_queued_cmd *qc)
* Copy registers into sense buffer.
*/
desc[2] = 0x00;
desc[3] = tf->feature; /* == error reg */
desc[3] = tf->error;
desc[5] = tf->nsect;
desc[7] = tf->lbal;
desc[9] = tf->lbam;
desc[11] = tf->lbah;
desc[12] = tf->device;
desc[13] = tf->command; /* == status reg */
desc[13] = tf->status;
/*
* Fill in Extend bit, and the high order bytes
@ -922,8 +922,8 @@ static void ata_gen_passthru_sense(struct ata_queued_cmd *qc)
}
} else {
/* Fixed sense format */
desc[0] = tf->feature;
desc[1] = tf->command; /* status */
desc[0] = tf->error;
desc[1] = tf->status;
desc[2] = tf->device;
desc[3] = tf->nsect;
desc[7] = 0;
@ -972,14 +972,14 @@ static void ata_gen_ata_sense(struct ata_queued_cmd *qc)
* onto sense key, asc & ascq.
*/
if (qc->err_mask ||
tf->command & (ATA_BUSY | ATA_DF | ATA_ERR | ATA_DRQ)) {
ata_to_sense_error(qc->ap->print_id, tf->command, tf->feature,
tf->status & (ATA_BUSY | ATA_DF | ATA_ERR | ATA_DRQ)) {
ata_to_sense_error(qc->ap->print_id, tf->status, tf->error,
&sense_key, &asc, &ascq, verbose);
ata_scsi_set_sense(dev, cmd, sense_key, asc, ascq);
} else {
/* Could not decode error */
ata_dev_warn(dev, "could not decode error status 0x%x err_mask 0x%x\n",
tf->command, qc->err_mask);
tf->status, qc->err_mask);
ata_scsi_set_sense(dev, cmd, ABORTED_COMMAND, 0, 0);
return;
}
@ -1314,21 +1314,10 @@ static void scsi_6_lba_len(const u8 *cdb, u64 *plba, u32 *plen)
* @plba: the LBA
* @plen: the transfer length
*/
static void scsi_10_lba_len(const u8 *cdb, u64 *plba, u32 *plen)
static inline void scsi_10_lba_len(const u8 *cdb, u64 *plba, u32 *plen)
{
u64 lba = 0;
u32 len = 0;
lba |= ((u64)cdb[2]) << 24;
lba |= ((u64)cdb[3]) << 16;
lba |= ((u64)cdb[4]) << 8;
lba |= ((u64)cdb[5]);
len |= ((u32)cdb[7]) << 8;
len |= ((u32)cdb[8]);
*plba = lba;
*plen = len;
*plba = get_unaligned_be32(&cdb[2]);
*plen = get_unaligned_be16(&cdb[7]);
}
/**
@ -1341,27 +1330,10 @@ static void scsi_10_lba_len(const u8 *cdb, u64 *plba, u32 *plen)
* @plba: the LBA
* @plen: the transfer length
*/
static void scsi_16_lba_len(const u8 *cdb, u64 *plba, u32 *plen)
static inline void scsi_16_lba_len(const u8 *cdb, u64 *plba, u32 *plen)
{
u64 lba = 0;
u32 len = 0;
lba |= ((u64)cdb[2]) << 56;
lba |= ((u64)cdb[3]) << 48;
lba |= ((u64)cdb[4]) << 40;
lba |= ((u64)cdb[5]) << 32;
lba |= ((u64)cdb[6]) << 24;
lba |= ((u64)cdb[7]) << 16;
lba |= ((u64)cdb[8]) << 8;
lba |= ((u64)cdb[9]);
len |= ((u32)cdb[10]) << 24;
len |= ((u32)cdb[11]) << 16;
len |= ((u32)cdb[12]) << 8;
len |= ((u32)cdb[13]);
*plba = lba;
*plen = len;
*plba = get_unaligned_be64(&cdb[2]);
*plen = get_unaligned_be32(&cdb[10]);
}
/**
@ -1390,19 +1362,22 @@ static unsigned int ata_scsi_verify_xlat(struct ata_queued_cmd *qc)
tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
tf->protocol = ATA_PROT_NODATA;
if (cdb[0] == VERIFY) {
switch (cdb[0]) {
case VERIFY:
if (scmd->cmd_len < 10) {
fp = 9;
goto invalid_fld;
}
scsi_10_lba_len(cdb, &block, &n_block);
} else if (cdb[0] == VERIFY_16) {
break;
case VERIFY_16:
if (scmd->cmd_len < 16) {
fp = 15;
goto invalid_fld;
}
scsi_16_lba_len(cdb, &block, &n_block);
} else {
break;
default:
fp = 0;
goto invalid_fld;
}
@ -1534,8 +1509,13 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc)
int rc;
u16 fp = 0;
if (cdb[0] == WRITE_10 || cdb[0] == WRITE_6 || cdb[0] == WRITE_16)
switch (cdb[0]) {
case WRITE_6:
case WRITE_10:
case WRITE_16:
tf_flags |= ATA_TFLAG_WRITE;
break;
}
/* Calculate the SCSI LBA, transfer length and FUA. */
switch (cdb[0]) {
@ -2493,7 +2473,7 @@ static void atapi_request_sense(struct ata_queued_cmd *qc)
/* fill these in, for the case where they are -not- overwritten */
cmd->sense_buffer[0] = 0x70;
cmd->sense_buffer[2] = qc->tf.feature >> 4;
cmd->sense_buffer[2] = qc->tf.error >> 4;
ata_qc_reinit(qc);
@ -2845,7 +2825,8 @@ static unsigned int ata_scsi_pass_thru(struct ata_queued_cmd *qc)
* 12 and 16 byte CDBs use different offsets to
* provide the various register values.
*/
if (cdb[0] == ATA_16) {
switch (cdb[0]) {
case ATA_16:
/*
* 16-byte CDB - may contain extended commands.
*
@ -2871,7 +2852,8 @@ static unsigned int ata_scsi_pass_thru(struct ata_queued_cmd *qc)
tf->lbah = cdb[12];
tf->device = cdb[13];
tf->command = cdb[14];
} else if (cdb[0] == ATA_12) {
break;
case ATA_12:
/*
* 12-byte CDB - incapable of extended commands.
*/
@ -2884,7 +2866,8 @@ static unsigned int ata_scsi_pass_thru(struct ata_queued_cmd *qc)
tf->lbah = cdb[7];
tf->device = cdb[8];
tf->command = cdb[9];
} else {
break;
default:
/*
* 32-byte CDB - may contain extended command fields.
*
@ -2908,6 +2891,7 @@ static unsigned int ata_scsi_pass_thru(struct ata_queued_cmd *qc)
tf->device = cdb[24];
tf->command = cdb[25];
tf->auxiliary = get_unaligned_be32(&cdb[28]);
break;
}
/* For NCQ commands copy the tag value */
@ -3672,7 +3656,7 @@ static unsigned int ata_scsi_mode_select_xlat(struct ata_queued_cmd *qc)
goto invalid_fld;
}
len = (cdb[7] << 8) + cdb[8];
len = get_unaligned_be16(&cdb[7]);
hdr_len = 8;
}
@ -3698,7 +3682,7 @@ static unsigned int ata_scsi_mode_select_xlat(struct ata_queued_cmd *qc)
if (six_byte)
bd_len = p[3];
else
bd_len = (p[6] << 8) + p[7];
bd_len = get_unaligned_be16(&p[6]);
len -= hdr_len;
p += hdr_len;
@ -3722,7 +3706,7 @@ static unsigned int ata_scsi_mode_select_xlat(struct ata_queued_cmd *qc)
goto invalid_param_len;
spg = p[1];
pg_len = (p[2] << 8) | p[3];
pg_len = get_unaligned_be16(&p[2]);
p += 4;
len -= 4;
} else {
@ -3933,7 +3917,6 @@ static inline ata_xlat_func_t ata_get_xlat_func(struct ata_device *dev, u8 cmd)
case MODE_SELECT:
case MODE_SELECT_10:
return ata_scsi_mode_select_xlat;
break;
case ZBC_IN:
return ata_scsi_zbc_in_xlat;

136
drivers/ata/libata-sff.c
View file

@ -70,22 +70,35 @@ EXPORT_SYMBOL_GPL(ata_sff_check_status);
/**
* ata_sff_altstatus - Read device alternate status reg
* @ap: port where the device is
* @status: pointer to a status value
*
* Reads ATA taskfile alternate status register for
* currently-selected device and return its value.
* Reads ATA alternate status register for currently-selected device
* and return its value.
*
* Note: may NOT be used as the check_altstatus() entry in
* ata_port_operations.
* RETURN:
* true if the register exists, false if not.
*
* LOCKING:
* Inherited from caller.
*/
static u8 ata_sff_altstatus(struct ata_port *ap)
static bool ata_sff_altstatus(struct ata_port *ap, u8 *status)
{
if (ap->ops->sff_check_altstatus)
return ap->ops->sff_check_altstatus(ap);
u8 tmp;
return ioread8(ap->ioaddr.altstatus_addr);
if (ap->ops->sff_check_altstatus) {
tmp = ap->ops->sff_check_altstatus(ap);
goto read;
}
if (ap->ioaddr.altstatus_addr) {
tmp = ioread8(ap->ioaddr.altstatus_addr);
goto read;
}
return false;
read:
if (status)
*status = tmp;
return true;
}
/**
@ -104,12 +117,9 @@ static u8 ata_sff_irq_status(struct ata_port *ap)
{
u8 status;
if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
status = ata_sff_altstatus(ap);
/* Not us: We are busy */
if (status & ATA_BUSY)
return status;
}
/* Not us: We are busy */
if (ata_sff_altstatus(ap, &status) && (status & ATA_BUSY))
return status;
/* Clear INTRQ latch */
status = ap->ops->sff_check_status(ap);
return status;
@ -129,10 +139,7 @@ static u8 ata_sff_irq_status(struct ata_port *ap)
static void ata_sff_sync(struct ata_port *ap)
{
if (ap->ops->sff_check_altstatus)
ap->ops->sff_check_altstatus(ap);
else if (ap->ioaddr.altstatus_addr)
ioread8(ap->ioaddr.altstatus_addr);
ata_sff_altstatus(ap, NULL);
}
/**
@ -164,12 +171,12 @@ EXPORT_SYMBOL_GPL(ata_sff_pause);
void ata_sff_dma_pause(struct ata_port *ap)
{
if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
/* An altstatus read will cause the needed delay without
messing up the IRQ status */
ata_sff_altstatus(ap);
/*
* An altstatus read will cause the needed delay without
* messing up the IRQ status
*/
if (ata_sff_altstatus(ap, NULL))
return;
}
/* There are no DMA controllers without ctl. BUG here to ensure
we never violate the HDMA1:0 transition timing and risk
corruption. */
@ -265,20 +272,26 @@ EXPORT_SYMBOL_GPL(ata_sff_wait_ready);
* @ap: port where the device is
* @ctl: value to write
*
* Writes ATA taskfile device control register.
* Writes ATA device control register.
*
* Note: may NOT be used as the sff_set_devctl() entry in
* ata_port_operations.
* RETURN:
* true if the register exists, false if not.
*
* LOCKING:
* Inherited from caller.
*/
static void ata_sff_set_devctl(struct ata_port *ap, u8 ctl)
static bool ata_sff_set_devctl(struct ata_port *ap, u8 ctl)
{
if (ap->ops->sff_set_devctl)
if (ap->ops->sff_set_devctl) {
ap->ops->sff_set_devctl(ap, ctl);
else
return true;
}
if (ap->ioaddr.ctl_addr) {
iowrite8(ctl, ap->ioaddr.ctl_addr);
return true;
}
return false;
}
/**
@ -357,8 +370,6 @@ static void ata_dev_select(struct ata_port *ap, unsigned int device,
*/
void ata_sff_irq_on(struct ata_port *ap)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
if (ap->ops->sff_irq_on) {
ap->ops->sff_irq_on(ap);
return;
@ -367,8 +378,7 @@ void ata_sff_irq_on(struct ata_port *ap)
ap->ctl &= ~ATA_NIEN;
ap->last_ctl = ap->ctl;
if (ap->ops->sff_set_devctl || ioaddr->ctl_addr)
ata_sff_set_devctl(ap, ap->ctl);
ata_sff_set_devctl(ap, ap->ctl);
ata_wait_idle(ap);
if (ap->ops->sff_irq_clear)
@ -439,8 +449,8 @@ void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
tf->command = ata_sff_check_status(ap);
tf->feature = ioread8(ioaddr->error_addr);
tf->status = ata_sff_check_status(ap);
tf->error = ioread8(ioaddr->error_addr);
tf->nsect = ioread8(ioaddr->nsect_addr);
tf->lbal = ioread8(ioaddr->lbal_addr);
tf->lbam = ioread8(ioaddr->lbam_addr);
@ -1634,14 +1644,14 @@ void ata_sff_lost_interrupt(struct ata_port *ap)
return;
/* See if the controller thinks it is still busy - if so the command
isn't a lost IRQ but is still in progress */
status = ata_sff_altstatus(ap);
if (WARN_ON_ONCE(!ata_sff_altstatus(ap, &status)))
return;
if (status & ATA_BUSY)
return;
/* There was a command running, we are no longer busy and we have
no interrupt. */
ata_port_warn(ap, "lost interrupt (Status 0x%x)\n",
status);
ata_port_warn(ap, "lost interrupt (Status 0x%x)\n", status);
/* Run the host interrupt logic as if the interrupt had not been
lost */
ata_sff_port_intr(ap, qc);
@ -1662,8 +1672,7 @@ void ata_sff_freeze(struct ata_port *ap)
ap->ctl |= ATA_NIEN;
ap->last_ctl = ap->ctl;
if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr)
ata_sff_set_devctl(ap, ap->ctl);
ata_sff_set_devctl(ap, ap->ctl);
/* Under certain circumstances, some controllers raise IRQ on
* ATA_NIEN manipulation. Also, many controllers fail to mask
@ -1708,16 +1717,15 @@ EXPORT_SYMBOL_GPL(ata_sff_thaw);
* Kernel thread context (may sleep)
*
* RETURNS:
* 0 on success, -errno otherwise.
* Always 0.
*/
int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
{
struct ata_eh_context *ehc = &link->eh_context;
int rc;
rc = ata_std_prereset(link, deadline);
if (rc)
return rc;
/* The standard prereset is best-effort and always returns 0 */
ata_std_prereset(link, deadline);
/* if we're about to do hardreset, nothing more to do */
if (ehc->i.action & ATA_EH_HARDRESET)
@ -1752,10 +1760,13 @@ EXPORT_SYMBOL_GPL(ata_sff_prereset);
* correctly storing and echoing back the
* ATA shadow register contents.
*
* RETURN:
* true if device is present, false if not.
*
* LOCKING:
* caller.
*/
static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
static bool ata_devchk(struct ata_port *ap, unsigned int device)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
u8 nsect, lbal;
@ -1775,9 +1786,9 @@ static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
lbal = ioread8(ioaddr->lbal_addr);
if ((nsect == 0x55) && (lbal == 0xaa))
return 1; /* we found a device */
return true; /* we found a device */
return 0; /* nothing found */
return false; /* nothing found */
}
/**
@ -1814,7 +1825,7 @@ unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
memset(&tf, 0, sizeof(tf));
ap->ops->sff_tf_read(ap, &tf);
err = tf.feature;
err = tf.error;
if (r_err)
*r_err = err;
@ -1831,9 +1842,10 @@ unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
/* determine if device is ATA or ATAPI */
class = ata_port_classify(ap, &tf);
if (class == ATA_DEV_UNKNOWN) {
/* If the device failed diagnostic, it's likely to
switch (class) {
case ATA_DEV_UNKNOWN:
/*
* If the device failed diagnostic, it's likely to
* have reported incorrect device signature too.
* Assume ATA device if the device seems present but
* device signature is invalid with diagnostic
@ -1843,10 +1855,12 @@ unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
class = ATA_DEV_ATA;
else
class = ATA_DEV_NONE;
} else if ((class == ATA_DEV_ATA) &&
(ap->ops->sff_check_status(ap) == 0))
class = ATA_DEV_NONE;
break;
case ATA_DEV_ATA:
if (ap->ops->sff_check_status(ap) == 0)
class = ATA_DEV_NONE;
break;
}
return class;
}
EXPORT_SYMBOL_GPL(ata_sff_dev_classify);
@ -2059,10 +2073,8 @@ void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
return;
/* set up device control */
if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr) {
ata_sff_set_devctl(ap, ap->ctl);
if (ata_sff_set_devctl(ap, ap->ctl))
ap->last_ctl = ap->ctl;
}
}
EXPORT_SYMBOL_GPL(ata_sff_postreset);
@ -2172,18 +2184,18 @@ EXPORT_SYMBOL_GPL(ata_sff_std_ports);
#ifdef CONFIG_PCI
static int ata_resources_present(struct pci_dev *pdev, int port)
static bool ata_resources_present(struct pci_dev *pdev, int port)
{
int i;
/* Check the PCI resources for this channel are enabled */
port = port * 2;
port *= 2;
for (i = 0; i < 2; i++) {
if (pci_resource_start(pdev, port + i) == 0 ||
pci_resource_len(pdev, port + i) == 0)
return 0;
return false;
}
return 1;
return true;
}
/**

2
drivers/ata/libata.h
View file

@ -107,7 +107,6 @@ static inline void ata_sas_free_tag(unsigned int tag, struct ata_port *ap) { }
#ifdef CONFIG_ATA_ACPI
extern unsigned int ata_acpi_gtf_filter;
extern void ata_acpi_dissociate(struct ata_host *host);
extern int ata_acpi_on_suspend(struct ata_port *ap);
extern void ata_acpi_on_resume(struct ata_port *ap);
extern int ata_acpi_on_devcfg(struct ata_device *dev);
extern void ata_acpi_on_disable(struct ata_device *dev);
@ -117,7 +116,6 @@ extern void ata_acpi_bind_dev(struct ata_device *dev);
extern acpi_handle ata_dev_acpi_handle(struct ata_device *dev);
#else
static inline void ata_acpi_dissociate(struct ata_host *host) { }
static inline int ata_acpi_on_suspend(struct ata_port *ap) { return 0; }
static inline void ata_acpi_on_resume(struct ata_port *ap) { }
static inline int ata_acpi_on_devcfg(struct ata_device *dev) { return 0; }
static inline void ata_acpi_on_disable(struct ata_device *dev) { }

3
drivers/ata/pata_arasan_cf.c
View file

@ -937,7 +937,8 @@ static int arasan_cf_suspend(struct device *dev)
dmaengine_terminate_all(acdev->dma_chan);
cf_exit(acdev);
return ata_host_suspend(host, PMSG_SUSPEND);
ata_host_suspend(host, PMSG_SUSPEND);
return 0;
}
static int arasan_cf_resume(struct device *dev)

31
drivers/ata/pata_artop.c
View file

@ -28,7 +28,7 @@
#include <linux/ata.h>
#define DRV_NAME "pata_artop"
#define DRV_VERSION "0.4.6"
#define DRV_VERSION "0.4.8"
/*
* The ARTOP has 33 Mhz and "over clocked" timing tables. Until we
@ -315,12 +315,15 @@ static struct ata_port_operations artop6260_ops = {
static void atp8xx_fixup(struct pci_dev *pdev)
{
if (pdev->device == 0x0005)
u8 reg;
switch (pdev->device) {
case 0x0005:
/* BIOS may have left us in UDMA, clear it before libata probe */
pci_write_config_byte(pdev, 0x54, 0);
else if (pdev->device == 0x0008 || pdev->device == 0x0009) {
u8 reg;
break;
case 0x0008:
case 0x0009:
/* Mac systems come up with some registers not set as we
will need them */
@ -338,6 +341,7 @@ static void atp8xx_fixup(struct pci_dev *pdev)
/* Enable IRQ output and burst mode */
pci_read_config_byte(pdev, 0x4a, &reg);
pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80);
break;
}
}
@ -394,16 +398,19 @@ static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
if (rc)
return rc;
if (id->driver_data == 0) /* 6210 variant */
switch (id->driver_data) {
case 0: /* 6210 variant */
ppi[0] = &info_6210;
else if (id->driver_data == 1) /* 6260 */
break;
case 1: /* 6260 */
ppi[0] = &info_626x;
else if (id->driver_data == 2) { /* 6280 or 6280 + fast */
unsigned long io = pci_resource_start(pdev, 4);
ppi[0] = &info_628x;
if (inb(io) & 0x10)
break;
case 2: /* 6280 or 6280 + fast */
if (inb(pci_resource_start(pdev, 4)) & 0x10)
ppi[0] = &info_628x_fast;
else
ppi[0] = &info_628x;
break;
}
BUG_ON(ppi[0] == NULL);

4
drivers/ata/pata_atiixp.c
View file

@ -102,7 +102,7 @@ static int atiixp_prereset(struct ata_link *link, unsigned long deadline)
static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev, int pio)
{
static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
static const u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
int dn = 2 * ap->port_no + adev->devno;
@ -149,7 +149,7 @@ static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
static const u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
int dma = adev->dma_mode;

5
drivers/ata/pata_cs5520.c
View file

@ -259,11 +259,8 @@ static int cs5520_reinit_one(struct pci_dev *pdev)
static int cs5520_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
{
struct ata_host *host = pci_get_drvdata(pdev);
int rc = 0;
rc = ata_host_suspend(host, mesg);
if (rc)
return rc;
ata_host_suspend(host, mesg);
pci_save_state(pdev);
return 0;

4
drivers/ata/pata_ep93xx.c
View file

@ -416,8 +416,8 @@ static void ep93xx_pata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
{
struct ep93xx_pata_data *drv_data = ap->host->private_data;
tf->command = ep93xx_pata_check_status(ap);
tf->feature = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_FEATURE);
tf->status = ep93xx_pata_check_status(ap);
tf->error = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_FEATURE);
tf->nsect = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_NSECT);
tf->lbal = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_LBAL);
tf->lbam = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_LBAM);

6
drivers/ata/pata_ftide010.c
View file

@ -554,10 +554,8 @@ static int pata_ftide010_remove(struct platform_device *pdev)
}
static const struct of_device_id pata_ftide010_of_match[] = {
{
.compatible = "faraday,ftide010",
},
{},
{ .compatible = "faraday,ftide010", },
{ /* sentinel */ }
};
static struct platform_driver pata_ftide010_driver = {

49
drivers/ata/pata_hpt366.c
View file

@ -23,7 +23,7 @@
#include <linux/libata.h>
#define DRV_NAME "pata_hpt366"
#define DRV_VERSION "0.6.11"
#define DRV_VERSION "0.6.13"
struct hpt_clock {
u8 xfer_mode;
@ -278,6 +278,40 @@ static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev)
hpt366_set_mode(ap, adev, adev->dma_mode);
}
/**
* hpt366_prereset - reset the hpt36x bus
* @link: ATA link to reset
* @deadline: deadline jiffies for the operation
*
* Perform the initial reset handling for the 36x series controllers.
* Reset the hardware and state machine,
*/
static int hpt366_prereset(struct ata_link *link, unsigned long deadline)
{
struct ata_port *ap = link->ap;
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
/*
* HPT36x chips have one channel per function and have
* both channel enable bits located differently and visible
* to both functions -- really stupid design decision... :-(
* Bit 4 is for the primary channel, bit 5 for the secondary.
*/
static const struct pci_bits hpt366_enable_bits = {
0x50, 1, 0x30, 0x30
};
u8 mcr2;
if (!pci_test_config_bits(pdev, &hpt366_enable_bits))
return -ENOENT;
pci_read_config_byte(pdev, 0x51, &mcr2);
if (mcr2 & 0x80)
pci_write_config_byte(pdev, 0x51, mcr2 & ~0x80);
return ata_sff_prereset(link, deadline);
}
static struct scsi_host_template hpt36x_sht = {
ATA_BMDMA_SHT(DRV_NAME),
};
@ -288,6 +322,7 @@ static struct scsi_host_template hpt36x_sht = {
static struct ata_port_operations hpt366_port_ops = {
.inherits = &ata_bmdma_port_ops,
.prereset = hpt366_prereset,
.cable_detect = hpt36x_cable_detect,
.mode_filter = hpt366_filter,
.set_piomode = hpt366_set_piomode,
@ -304,16 +339,20 @@ static struct ata_port_operations hpt366_port_ops = {
static void hpt36x_init_chipset(struct pci_dev *dev)
{
u8 drive_fast;
u8 mcr1;
pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (L1_CACHE_BYTES / 4));
pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x78);
pci_write_config_byte(dev, PCI_MIN_GNT, 0x08);
pci_write_config_byte(dev, PCI_MAX_LAT, 0x08);
pci_read_config_byte(dev, 0x51, &drive_fast);
if (drive_fast & 0x80)
pci_write_config_byte(dev, 0x51, drive_fast & ~0x80);
/*
* Now we'll have to force both channels enabled if at least one
* of them has been enabled by BIOS...
*/
pci_read_config_byte(dev, 0x50, &mcr1);
if (mcr1 & 0x30)
pci_write_config_byte(dev, 0x50, mcr1 | 0x30);
}
/**

115
drivers/ata/pata_hpt37x.c
View file

@ -23,7 +23,7 @@
#include <linux/libata.h>
#define DRV_NAME "pata_hpt37x"
#define DRV_VERSION "0.6.23"
#define DRV_VERSION "0.6.25"
struct hpt_clock {
u8 xfer_speed;
@ -394,6 +394,7 @@ static int hpt37x_pre_reset(struct ata_link *link, unsigned long deadline)
{ 0x50, 1, 0x04, 0x04 },
{ 0x54, 1, 0x04, 0x04 }
};
u8 mcr2;
if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no]))
return -ENOENT;
@ -402,25 +403,29 @@ static int hpt37x_pre_reset(struct ata_link *link, unsigned long deadline)
pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37);
udelay(100);
/*
* Disable the "fast interrupt" prediction. Don't hold off
* on interrupts. (== 0x01 despite what the docs say)
*/
pci_read_config_byte(pdev, 0x51 + 4 * ap->port_no, &mcr2);
/* Is it HPT370/A? */
if (pdev->device == PCI_DEVICE_ID_TTI_HPT366 && pdev->revision < 5) {
mcr2 &= ~0x02;
mcr2 |= 0x01;
} else {
mcr2 &= ~0x07;
}
pci_write_config_byte(pdev, 0x51 + 4 * ap->port_no, mcr2);
return ata_sff_prereset(link, deadline);
}
static void hpt370_set_mode(struct ata_port *ap, struct ata_device *adev,
static void hpt37x_set_mode(struct ata_port *ap, struct ata_device *adev,
u8 mode)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u32 addr1, addr2;
int addr = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
u32 reg, timing, mask;
u8 fast;
addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
addr2 = 0x51 + 4 * ap->port_no;
/* Fast interrupt prediction disable, hold off interrupt disable */
pci_read_config_byte(pdev, addr2, &fast);
fast &= ~0x02;
fast |= 0x01;
pci_write_config_byte(pdev, addr2, fast);
/* Determine timing mask and find matching mode entry */
if (mode < XFER_MW_DMA_0)
@ -432,34 +437,34 @@ static void hpt370_set_mode(struct ata_port *ap, struct ata_device *adev,
timing = hpt37x_find_mode(ap, mode);
pci_read_config_dword(pdev, addr1, &reg);
pci_read_config_dword(pdev, addr, &reg);
reg = (reg & ~mask) | (timing & mask);
pci_write_config_dword(pdev, addr1, reg);
pci_write_config_dword(pdev, addr, reg);
}
/**
* hpt370_set_piomode - PIO setup
* hpt37x_set_piomode - PIO setup
* @ap: ATA interface
* @adev: device on the interface
*
* Perform PIO mode setup.
*/
static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev)
static void hpt37x_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
hpt370_set_mode(ap, adev, adev->pio_mode);
hpt37x_set_mode(ap, adev, adev->pio_mode);
}
/**
* hpt370_set_dmamode - DMA timing setup
* hpt37x_set_dmamode - DMA timing setup
* @ap: ATA interface
* @adev: Device being configured
*
* Set up the channel for MWDMA or UDMA modes.
*/
static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev)
static void hpt37x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
hpt370_set_mode(ap, adev, adev->dma_mode);
hpt37x_set_mode(ap, adev, adev->dma_mode);
}
/**
@ -499,63 +504,6 @@ static void hpt370_bmdma_stop(struct ata_queued_cmd *qc)
ata_bmdma_stop(qc);
}
static void hpt372_set_mode(struct ata_port *ap, struct ata_device *adev,
u8 mode)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u32 addr1, addr2;
u32 reg, timing, mask;
u8 fast;
addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
addr2 = 0x51 + 4 * ap->port_no;
/* Fast interrupt prediction disable, hold off interrupt disable */
pci_read_config_byte(pdev, addr2, &fast);
fast &= ~0x07;
pci_write_config_byte(pdev, addr2, fast);
/* Determine timing mask and find matching mode entry */
if (mode < XFER_MW_DMA_0)
mask = 0xcfc3ffff;
else if (mode < XFER_UDMA_0)
mask = 0x31c001ff;
else
mask = 0x303c0000;
timing = hpt37x_find_mode(ap, mode);
pci_read_config_dword(pdev, addr1, &reg);
reg = (reg & ~mask) | (timing & mask);
pci_write_config_dword(pdev, addr1, reg);
}
/**
* hpt372_set_piomode - PIO setup
* @ap: ATA interface
* @adev: device on the interface
*
* Perform PIO mode setup.
*/
static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
hpt372_set_mode(ap, adev, adev->pio_mode);
}
/**
* hpt372_set_dmamode - DMA timing setup
* @ap: ATA interface
* @adev: Device being configured
*
* Set up the channel for MWDMA or UDMA modes.
*/
static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
hpt372_set_mode(ap, adev, adev->dma_mode);
}
/**
* hpt37x_bmdma_stop - DMA engine stop
* @qc: ATA command
@ -593,8 +541,8 @@ static struct ata_port_operations hpt370_port_ops = {
.mode_filter = hpt370_filter,
.cable_detect = hpt37x_cable_detect,
.set_piomode = hpt370_set_piomode,
.set_dmamode = hpt370_set_dmamode,
.set_piomode = hpt37x_set_piomode,
.set_dmamode = hpt37x_set_dmamode,
.prereset = hpt37x_pre_reset,
};
@ -608,8 +556,7 @@ static struct ata_port_operations hpt370a_port_ops = {
};
/*
* Configuration for HPT371 and HPT302. Slightly different PIO and DMA
* mode setting functionality.
* Configuration for HPT371 and HPT302.
*/
static struct ata_port_operations hpt302_port_ops = {
@ -618,8 +565,8 @@ static struct ata_port_operations hpt302_port_ops = {
.bmdma_stop = hpt37x_bmdma_stop,
.cable_detect = hpt37x_cable_detect,
.set_piomode = hpt372_set_piomode,
.set_dmamode = hpt372_set_dmamode,
.set_piomode = hpt37x_set_piomode,
.set_dmamode = hpt37x_set_dmamode,
.prereset = hpt37x_pre_reset,
};

38
drivers/ata/pata_hpt3x2n.c
View file

@ -24,10 +24,9 @@
#include <linux/libata.h>
#define DRV_NAME "pata_hpt3x2n"
#define DRV_VERSION "0.3.15"
#define DRV_VERSION "0.3.18"
enum {
HPT_PCI_FAST = (1 << 31),
PCI66 = (1 << 1),
USE_DPLL = (1 << 0)
};
@ -37,11 +36,6 @@ struct hpt_clock {
u32 timing;
};
struct hpt_chip {
const char *name;
struct hpt_clock *clocks[3];
};
/* key for bus clock timings
* bit
* 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA.
@ -168,11 +162,24 @@ static int hpt3x2n_pre_reset(struct ata_link *link, unsigned long deadline)
{
struct ata_port *ap = link->ap;
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
static const struct pci_bits hpt3x2n_enable_bits[] = {
{ 0x50, 1, 0x04, 0x04 },
{ 0x54, 1, 0x04, 0x04 }
};
u8 mcr2;
if (!pci_test_config_bits(pdev, &hpt3x2n_enable_bits[ap->port_no]))
return -ENOENT;
/* Reset the state machine */
pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37);
udelay(100);
/* Fast interrupt prediction disable, hold off interrupt disable */
pci_read_config_byte(pdev, 0x51 + 4 * ap->port_no, &mcr2);
mcr2 &= ~0x07;
pci_write_config_byte(pdev, 0x51 + 4 * ap->port_no, mcr2);
return ata_sff_prereset(link, deadline);
}
@ -180,17 +187,8 @@ static void hpt3x2n_set_mode(struct ata_port *ap, struct ata_device *adev,
u8 mode)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u32 addr1, addr2;
int addr = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
u32 reg, timing, mask;
u8 fast;
addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
addr2 = 0x51 + 4 * ap->port_no;
/* Fast interrupt prediction disable, hold off interrupt disable */
pci_read_config_byte(pdev, addr2, &fast);
fast &= ~0x07;
pci_write_config_byte(pdev, addr2, fast);
/* Determine timing mask and find matching mode entry */
if (mode < XFER_MW_DMA_0)
@ -202,9 +200,9 @@ static void hpt3x2n_set_mode(struct ata_port *ap, struct ata_device *adev,
timing = hpt3x2n_find_mode(ap, mode);
pci_read_config_dword(pdev, addr1, &reg);
pci_read_config_dword(pdev, addr, &reg);
reg = (reg & ~mask) | (timing & mask);
pci_write_config_dword(pdev, addr1, reg);
pci_write_config_dword(pdev, addr, reg);
}
/**
@ -244,7 +242,7 @@ static void hpt3x2n_bmdma_stop(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
int mscreg = 0x50 + 2 * ap->port_no;
int mscreg = 0x50 + 4 * ap->port_no;
u8 bwsr_stat, msc_stat;
pci_read_config_byte(pdev, 0x6A, &bwsr_stat);

15
drivers/ata/pata_imx.c
View file

@ -223,17 +223,14 @@ static int pata_imx_suspend(struct device *dev)
{
struct ata_host *host = dev_get_drvdata(dev);
struct pata_imx_priv *priv = host->private_data;
int ret;
ret = ata_host_suspend(host, PMSG_SUSPEND);
if (!ret) {
__raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN);
priv->ata_ctl =
__raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL);
clk_disable_unprepare(priv->clk);
}
ata_host_suspend(host, PMSG_SUSPEND);
return ret;
__raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN);
priv->ata_ctl = __raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL);
clk_disable_unprepare(priv->clk);
return 0;
}
static int pata_imx_resume(struct device *dev)

2
drivers/ata/pata_ixp4xx_cf.c
View file

@ -293,7 +293,7 @@ static int ixp4xx_pata_probe(struct platform_device *pdev)
static const struct of_device_id ixp4xx_pata_of_match[] = {
{ .compatible = "intel,ixp4xx-compact-flash", },
{ },
{ /* sentinel */ }
};
static struct platform_driver ixp4xx_pata_platform_driver = {

24
drivers/ata/pata_macio.c
View file

@ -853,12 +853,8 @@ static int pata_macio_slave_config(struct scsi_device *sdev)
#ifdef CONFIG_PM_SLEEP
static int pata_macio_do_suspend(struct pata_macio_priv *priv, pm_message_t mesg)
{
int rc;
/* First, core libata suspend to do most of the work */
rc = ata_host_suspend(priv->host, mesg);
if (rc)
return rc;
ata_host_suspend(priv->host, mesg);
/* Restore to default timings */
pata_macio_default_timings(priv);
@ -1333,19 +1329,11 @@ static int pata_macio_pci_resume(struct pci_dev *pdev)
static const struct of_device_id pata_macio_match[] =
{
{
.name = "IDE",
},
{
.name = "ATA",
},
{
.type = "ide",
},
{
.type = "ata",
},
{},
{ .name = "IDE", },
{ .name = "ATA", },
{ .type = "ide", },
{ .type = "ata", },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, pata_macio_match);

7
drivers/ata/pata_mpc52xx.c
View file

@ -736,7 +736,7 @@ static int mpc52xx_ata_probe(struct platform_device *op)
}
/* Prepare our private structure */
priv = devm_kzalloc(&op->dev, sizeof(*priv), GFP_ATOMIC);
priv = devm_kzalloc(&op->dev, sizeof(*priv), GFP_KERNEL);
if (!priv) {
rv = -ENOMEM;
goto err1;
@ -824,7 +824,8 @@ mpc52xx_ata_suspend(struct platform_device *op, pm_message_t state)
{
struct ata_host *host = platform_get_drvdata(op);
return ata_host_suspend(host, state);
ata_host_suspend(host, state);
return 0;
}
static int
@ -849,7 +850,7 @@ mpc52xx_ata_resume(struct platform_device *op)
static const struct of_device_id mpc52xx_ata_of_match[] = {
{ .compatible = "fsl,mpc5200-ata", },
{ .compatible = "mpc5200-ata", },
{},
{ /* sentinel */ }
};

4
drivers/ata/pata_ns87415.c
View file

@ -264,8 +264,8 @@ void ns87560_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
tf->command = ns87560_check_status(ap);
tf->feature = ioread8(ioaddr->error_addr);
tf->status = ns87560_check_status(ap);
tf->error = ioread8(ioaddr->error_addr);
tf->nsect = ioread8(ioaddr->nsect_addr);
tf->lbal = ioread8(ioaddr->lbal_addr);
tf->lbam = ioread8(ioaddr->lbam_addr);

10
drivers/ata/pata_octeon_cf.c
View file

@ -382,7 +382,7 @@ static void octeon_cf_tf_read16(struct ata_port *ap, struct ata_taskfile *tf)
void __iomem *base = ap->ioaddr.data_addr;
blob = __raw_readw(base + 0xc);
tf->feature = blob >> 8;
tf->error = blob >> 8;
blob = __raw_readw(base + 2);
tf->nsect = blob & 0xff;
@ -394,7 +394,7 @@ static void octeon_cf_tf_read16(struct ata_port *ap, struct ata_taskfile *tf)
blob = __raw_readw(base + 6);
tf->device = blob & 0xff;
tf->command = blob >> 8;
tf->status = blob >> 8;
if (tf->flags & ATA_TFLAG_LBA48) {
if (likely(ap->ioaddr.ctl_addr)) {
@ -1006,10 +1006,8 @@ static void octeon_cf_shutdown(struct device *dev)
}
static const struct of_device_id octeon_cf_match[] = {
{
.compatible = "cavium,ebt3000-compact-flash",
},
{},
{ .compatible = "cavium,ebt3000-compact-flash", },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, octeon_cf_match);

2
drivers/ata/pata_of_platform.c
View file

@ -79,7 +79,7 @@ static int pata_of_platform_probe(struct platform_device *ofdev)
static const struct of_device_id pata_of_platform_match[] = {
{ .compatible = "ata-generic", },
{ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, pata_of_platform_match);

2
drivers/ata/pata_pdc202xx_old.c
View file

@ -78,7 +78,7 @@ static void pdc202xx_configure_piomode(struct ata_port *ap, struct ata_device *a
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
static u16 pio_timing[5] = {
static const u16 pio_timing[5] = {
0x0913, 0x050C , 0x0308, 0x0206, 0x0104
};
u8 r_ap, r_bp;

18
drivers/ata/pata_platform.c
View file

@ -200,22 +200,16 @@ static int pata_platform_probe(struct platform_device *pdev)
/*
* Get the I/O base first
*/
io_res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (io_res == NULL) {
io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(io_res == NULL))
return -EINVAL;
}
io_res = platform_get_mem_or_io(pdev, 0);
if (!io_res)
return -EINVAL;
/*
* Then the CTL base
*/
ctl_res = platform_get_resource(pdev, IORESOURCE_IO, 1);
if (ctl_res == NULL) {
ctl_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
if (unlikely(ctl_res == NULL))
return -EINVAL;
}
ctl_res = platform_get_mem_or_io(pdev, 1);
if (!ctl_res)
return -EINVAL;
/*
* And the IRQ

10
drivers/ata/pata_pxa.c
View file

@ -164,10 +164,10 @@ static int pxa_ata_probe(struct platform_device *pdev)
struct resource *cmd_res;
struct resource *ctl_res;
struct resource *dma_res;
struct resource *irq_res;
struct pata_pxa_pdata *pdata = dev_get_platdata(&pdev->dev);
struct dma_slave_config config;
int ret = 0;
int irq;
/*
* Resource validation, three resources are needed:
@ -205,9 +205,9 @@ static int pxa_ata_probe(struct platform_device *pdev)
/*
* IRQ pin
*/
irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (unlikely(irq_res == NULL))
return -EINVAL;
irq = platform_get_irq(pdev, 0);
if (irq < 0)
return irq;
/*
* Allocate the host
@ -287,7 +287,7 @@ static int pxa_ata_probe(struct platform_device *pdev)
/*
* Activate the ATA host
*/
ret = ata_host_activate(host, irq_res->start, ata_sff_interrupt,
ret = ata_host_activate(host, irq, ata_sff_interrupt,
pdata->irq_flags, &pxa_ata_sht);
if (ret)
dma_release_channel(data->dma_chan);

12
drivers/ata/pata_samsung_cf.c
View file

@ -213,7 +213,7 @@ static void pata_s3c_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
tf->feature = ata_inb(ap->host, ioaddr->error_addr);
tf->error = ata_inb(ap->host, ioaddr->error_addr);
tf->nsect = ata_inb(ap->host, ioaddr->nsect_addr);
tf->lbal = ata_inb(ap->host, ioaddr->lbal_addr);
tf->lbam = ata_inb(ap->host, ioaddr->lbam_addr);
@ -308,8 +308,7 @@ static void pata_s3c_dev_select(struct ata_port *ap, unsigned int device)
/*
* pata_s3c_devchk - PATA device presence detection
*/
static unsigned int pata_s3c_devchk(struct ata_port *ap,
unsigned int device)
static bool pata_s3c_devchk(struct ata_port *ap, unsigned int device)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
u8 nsect, lbal;
@ -329,9 +328,9 @@ static unsigned int pata_s3c_devchk(struct ata_port *ap,
lbal = ata_inb(ap->host, ioaddr->lbal_addr);
if ((nsect == 0x55) && (lbal == 0xaa))
return 1; /* we found a device */
return true; /* we found a device */
return 0; /* nothing found */
return false; /* nothing found */
}
/*
@ -608,7 +607,8 @@ static int pata_s3c_suspend(struct device *dev)
{
struct ata_host *host = dev_get_drvdata(dev);
return ata_host_suspend(host, PMSG_SUSPEND);
ata_host_suspend(host, PMSG_SUSPEND);
return 0;
}
static int pata_s3c_resume(struct device *dev)

5
drivers/ata/pata_triflex.c
View file

@ -198,11 +198,8 @@ static const struct pci_device_id triflex[] = {
static int triflex_ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
{
struct ata_host *host = pci_get_drvdata(pdev);
int rc = 0;
rc = ata_host_suspend(host, mesg);
if (rc)
return rc;
ata_host_suspend(host, mesg);
/*
* We must not disable or powerdown the device.

14
drivers/ata/sata_fsl.c
View file

@ -1544,7 +1544,9 @@ static int sata_fsl_remove(struct platform_device *ofdev)
static int sata_fsl_suspend(struct platform_device *op, pm_message_t state)
{
struct ata_host *host = platform_get_drvdata(op);
return ata_host_suspend(host, state);
ata_host_suspend(host, state);
return 0;
}
static int sata_fsl_resume(struct platform_device *op)
@ -1577,13 +1579,9 @@ static int sata_fsl_resume(struct platform_device *op)
#endif
static const struct of_device_id fsl_sata_match[] = {
{
.compatible = "fsl,pq-sata",
},
{
.compatible = "fsl,pq-sata-v2",
},
{},
{ .compatible = "fsl,pq-sata", },
{ .compatible = "fsl,pq-sata-v2", },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, fsl_sata_match);

6
drivers/ata/sata_gemini.c
View file

@ -419,10 +419,8 @@ static int gemini_sata_remove(struct platform_device *pdev)
}
static const struct of_device_id gemini_sata_of_match[] = {
{
.compatible = "cortina,gemini-sata-bridge",
},
{},
{ .compatible = "cortina,gemini-sata-bridge", },
{ /* sentinel */ }
};
static struct platform_driver gemini_sata_driver = {

7
drivers/ata/sata_highbank.c
View file

@ -400,7 +400,7 @@ static int ahci_highbank_hardreset(struct ata_link *link, unsigned int *class,
/* clear D2H reception area to properly wait for D2H FIS */
ata_tf_init(link->device, &tf);
tf.command = ATA_BUSY;
tf.status = ATA_BUSY;
ata_tf_to_fis(&tf, 0, 0, d2h_fis);
do {
@ -444,7 +444,7 @@ static struct scsi_host_template ahci_highbank_platform_sht = {
static const struct of_device_id ahci_of_match[] = {
{ .compatible = "calxeda,hb-ahci" },
{},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ahci_of_match);
@ -587,7 +587,8 @@ static int ahci_highbank_suspend(struct device *dev)
writel(ctl, mmio + HOST_CTL);
readl(mmio + HOST_CTL); /* flush */
return ata_host_suspend(host, PMSG_SUSPEND);
ata_host_suspend(host, PMSG_SUSPEND);
return 0;
}
static int ahci_highbank_resume(struct device *dev)

10
drivers/ata/sata_inic162x.c
View file

@ -557,13 +557,13 @@ static void inic_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
{
void __iomem *port_base = inic_port_base(ap);
tf->feature = readb(port_base + PORT_TF_FEATURE);
tf->error = readb(port_base + PORT_TF_FEATURE);
tf->nsect = readb(port_base + PORT_TF_NSECT);
tf->lbal = readb(port_base + PORT_TF_LBAL);
tf->lbam = readb(port_base + PORT_TF_LBAM);
tf->lbah = readb(port_base + PORT_TF_LBAH);
tf->device = readb(port_base + PORT_TF_DEVICE);
tf->command = readb(port_base + PORT_TF_COMMAND);
tf->status = readb(port_base + PORT_TF_COMMAND);
}
static bool inic_qc_fill_rtf(struct ata_queued_cmd *qc)
@ -580,11 +580,11 @@ static bool inic_qc_fill_rtf(struct ata_queued_cmd *qc)
*/
inic_tf_read(qc->ap, &tf);
if (!(tf.command & ATA_ERR))
if (!(tf.status & ATA_ERR))
return false;
rtf->command = tf.command;
rtf->feature = tf.feature;
rtf->status = tf.status;
rtf->error = tf.error;
return true;
}

8
drivers/ata/sata_mv.c
View file

@ -4235,10 +4235,10 @@ static int mv_platform_remove(struct platform_device *pdev)
static int mv_platform_suspend(struct platform_device *pdev, pm_message_t state)
{
struct ata_host *host = platform_get_drvdata(pdev);
if (host)
return ata_host_suspend(host, state);
else
return 0;
ata_host_suspend(host, state);
return 0;
}
static int mv_platform_resume(struct platform_device *pdev)
@ -4277,7 +4277,7 @@ static int mv_platform_resume(struct platform_device *pdev)
static const struct of_device_id mv_sata_dt_ids[] = {
{ .compatible = "marvell,armada-370-sata", },
{ .compatible = "marvell,orion-sata", },
{},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mv_sata_dt_ids);
#endif

35
drivers/ata/sata_rcar.c
View file

@ -18,10 +18,6 @@
#define DRV_NAME "sata_rcar"
/* SH-Navi2G/ATAPI-ATA compatible task registers */
#define DATA_REG 0x100
#define SDEVCON_REG 0x138
/* SH-Navi2G/ATAPI module compatible control registers */
#define ATAPI_CONTROL1_REG 0x180
#define ATAPI_STATUS_REG 0x184
@ -283,8 +279,7 @@ static void sata_rcar_dev_select(struct ata_port *ap, unsigned int device)
ata_sff_pause(ap); /* needed; also flushes, for mmio */
}
static unsigned int sata_rcar_ata_devchk(struct ata_port *ap,
unsigned int device)
static bool sata_rcar_ata_devchk(struct ata_port *ap, unsigned int device)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
u8 nsect, lbal;
@ -304,9 +299,9 @@ static unsigned int sata_rcar_ata_devchk(struct ata_port *ap,
lbal = ioread32(ioaddr->lbal_addr);
if (nsect == 0x55 && lbal == 0xaa)
return 1; /* found a device */
return true; /* found a device */
return 0; /* nothing found */
return false; /* nothing found */
}
static int sata_rcar_wait_after_reset(struct ata_link *link,
@ -399,8 +394,8 @@ static void sata_rcar_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
tf->command = sata_rcar_check_status(ap);
tf->feature = ioread32(ioaddr->error_addr);
tf->status = sata_rcar_check_status(ap);
tf->error = ioread32(ioaddr->error_addr);
tf->nsect = ioread32(ioaddr->nsect_addr);
tf->lbal = ioread32(ioaddr->lbal_addr);
tf->lbam = ioread32(ioaddr->lbam_addr);
@ -857,7 +852,7 @@ static const struct of_device_id sata_rcar_match[] = {
.compatible = "renesas,rcar-gen3-sata",
.data = (void *)RCAR_GEN3_SATA
},
{ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sata_rcar_match);
@ -945,19 +940,17 @@ static int sata_rcar_suspend(struct device *dev)
struct ata_host *host = dev_get_drvdata(dev);
struct sata_rcar_priv *priv = host->private_data;
void __iomem *base = priv->base;
int ret;
ret = ata_host_suspend(host, PMSG_SUSPEND);
if (!ret) {
/* disable interrupts */
iowrite32(0, base + ATAPI_INT_ENABLE_REG);
/* mask */
iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
ata_host_suspend(host, PMSG_SUSPEND);
pm_runtime_put(dev);
}
/* disable interrupts */
iowrite32(0, base + ATAPI_INT_ENABLE_REG);
/* mask */
iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
return ret;
pm_runtime_put(dev);
return 0;
}
static int sata_rcar_resume(struct device *dev)

10
drivers/ata/sata_svw.c
View file

@ -194,24 +194,24 @@ static void k2_sata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
static void k2_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
u16 nsect, lbal, lbam, lbah, feature;
u16 nsect, lbal, lbam, lbah, error;
tf->command = k2_stat_check_status(ap);
tf->status = k2_stat_check_status(ap);
tf->device = readw(ioaddr->device_addr);
feature = readw(ioaddr->error_addr);
error = readw(ioaddr->error_addr);
nsect = readw(ioaddr->nsect_addr);
lbal = readw(ioaddr->lbal_addr);
lbam = readw(ioaddr->lbam_addr);
lbah = readw(ioaddr->lbah_addr);
tf->feature = feature;
tf->error = error;
tf->nsect = nsect;
tf->lbal = lbal;
tf->lbam = lbam;
tf->lbah = lbah;
if (tf->flags & ATA_TFLAG_LBA48) {
tf->hob_feature = feature >> 8;
tf->hob_feature = error >> 8;
tf->hob_nsect = nsect >> 8;
tf->hob_lbal = lbal >> 8;
tf->hob_lbam = lbam >> 8;

10
drivers/ata/sata_vsc.c
View file

@ -183,24 +183,24 @@ static void vsc_sata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
static void vsc_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
u16 nsect, lbal, lbam, lbah, feature;
u16 nsect, lbal, lbam, lbah, error;
tf->command = ata_sff_check_status(ap);
tf->status = ata_sff_check_status(ap);
tf->device = readw(ioaddr->device_addr);
feature = readw(ioaddr->error_addr);
error = readw(ioaddr->error_addr);
nsect = readw(ioaddr->nsect_addr);
lbal = readw(ioaddr->lbal_addr);
lbam = readw(ioaddr->lbam_addr);
lbah = readw(ioaddr->lbah_addr);
tf->feature = feature;
tf->error = error;
tf->nsect = nsect;
tf->lbal = lbal;
tf->lbam = lbam;
tf->lbah = lbah;
if (tf->flags & ATA_TFLAG_LBA48) {
tf->hob_feature = feature >> 8;
tf->hob_feature = error >> 8;
tf->hob_nsect = nsect >> 8;
tf->hob_lbal = lbal >> 8;
tf->hob_lbam = lbam >> 8;

12
include/linux/libata.h
View file

@ -519,7 +519,10 @@ struct ata_taskfile {
u8 hob_lbam;
u8 hob_lbah;
u8 feature;
union {
u8 error;
u8 feature;
};
u8 nsect;
u8 lbal;
u8 lbam;
@ -527,7 +530,10 @@ struct ata_taskfile {
u8 device;
u8 command; /* IO operation */
union {
u8 status;
u8 command;
};
u32 auxiliary; /* auxiliary field */
/* from SATA 3.1 and */
@ -1081,7 +1087,7 @@ extern int ata_sas_scsi_ioctl(struct ata_port *ap, struct scsi_device *dev,
extern bool ata_link_online(struct ata_link *link);
extern bool ata_link_offline(struct ata_link *link);
#ifdef CONFIG_PM
extern int ata_host_suspend(struct ata_host *host, pm_message_t mesg);
extern void ata_host_suspend(struct ata_host *host, pm_message_t mesg);
extern void ata_host_resume(struct ata_host *host);
extern void ata_sas_port_suspend(struct ata_port *ap);
extern void ata_sas_port_resume(struct ata_port *ap);