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mmc: sdhci: Constify sdhci_ops structs where possible
Basically all drivers can have sdhci_ops struct const, but almost none do. This patch constifies all sdhci_ops struct declarations where possible. The patch was auto-generated with the following coccinelle semantic patch: // <smpl> @r1@ identifier ops; identifier fld; @@ ops.fld = ...; @disable optional_qualifier@ identifier ops != r1.ops; @@ static +const struct sdhci_ops ops = { ... }; // </smpl> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
This commit is contained in:
parent
ad1df8c25e
commit
c915568d99
12 changed files with 12 additions and 12 deletions
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@ -124,7 +124,7 @@ unsigned int bcm2835_sdhci_get_min_clock(struct sdhci_host *host)
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return MIN_FREQ;
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}
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static struct sdhci_ops bcm2835_sdhci_ops = {
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static const struct sdhci_ops bcm2835_sdhci_ops = {
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.write_l = bcm2835_sdhci_writel,
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.write_w = bcm2835_sdhci_writew,
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.write_b = bcm2835_sdhci_writeb,
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@ -80,7 +80,7 @@ static void sdhci_cns3xxx_set_clock(struct sdhci_host *host, unsigned int clock)
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host->clock = clock;
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}
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static struct sdhci_ops sdhci_cns3xxx_ops = {
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static const struct sdhci_ops sdhci_cns3xxx_ops = {
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.get_max_clock = sdhci_cns3xxx_get_max_clk,
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.set_clock = sdhci_cns3xxx_set_clock,
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};
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@ -83,7 +83,7 @@ static u32 sdhci_dove_readl(struct sdhci_host *host, int reg)
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return ret;
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}
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static struct sdhci_ops sdhci_dove_ops = {
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static const struct sdhci_ops sdhci_dove_ops = {
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.read_w = sdhci_dove_readw,
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.read_l = sdhci_dove_readl,
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};
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@ -399,7 +399,7 @@ static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width)
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return 0;
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}
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static struct sdhci_ops sdhci_esdhc_ops = {
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static const struct sdhci_ops sdhci_esdhc_ops = {
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.read_l = esdhc_readl_le,
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.read_w = esdhc_readw_le,
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.write_l = esdhc_writel_le,
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@ -230,7 +230,7 @@ static void esdhc_of_platform_init(struct sdhci_host *host)
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host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
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}
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static struct sdhci_ops sdhci_esdhc_ops = {
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static const struct sdhci_ops sdhci_esdhc_ops = {
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.read_l = esdhc_readl,
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.read_w = esdhc_readw,
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.read_b = esdhc_readb,
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@ -51,7 +51,7 @@ static void sdhci_hlwd_writeb(struct sdhci_host *host, u8 val, int reg)
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udelay(SDHCI_HLWD_WRITE_DELAY);
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}
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static struct sdhci_ops sdhci_hlwd_ops = {
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static const struct sdhci_ops sdhci_hlwd_ops = {
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.read_l = sdhci_be32bs_readl,
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.read_w = sdhci_be32bs_readw,
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.read_b = sdhci_be32bs_readb,
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@ -975,7 +975,7 @@ static void sdhci_pci_hw_reset(struct sdhci_host *host)
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usleep_range(300, 1000);
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}
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static struct sdhci_ops sdhci_pci_ops = {
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static const struct sdhci_ops sdhci_pci_ops = {
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.enable_dma = sdhci_pci_enable_dma,
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.platform_bus_width = sdhci_pci_bus_width,
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.hw_reset = sdhci_pci_hw_reset,
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@ -44,7 +44,7 @@ unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host)
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}
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EXPORT_SYMBOL_GPL(sdhci_pltfm_clk_get_max_clock);
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static struct sdhci_ops sdhci_pltfm_ops = {
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static const struct sdhci_ops sdhci_pltfm_ops = {
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};
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#ifdef CONFIG_OF
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@ -111,7 +111,7 @@ static int pxav2_mmc_set_width(struct sdhci_host *host, int width)
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return 0;
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}
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static struct sdhci_ops pxav2_sdhci_ops = {
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static const struct sdhci_ops pxav2_sdhci_ops = {
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.get_max_clock = sdhci_pltfm_clk_get_max_clock,
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.platform_reset_exit = pxav2_set_private_registers,
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.platform_bus_width = pxav2_mmc_set_width,
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@ -167,7 +167,7 @@ static int pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
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return 0;
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}
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static struct sdhci_ops pxav3_sdhci_ops = {
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static const struct sdhci_ops pxav3_sdhci_ops = {
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.platform_reset_exit = pxav3_set_private_registers,
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.set_uhs_signaling = pxav3_set_uhs_signaling,
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.platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
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@ -36,7 +36,7 @@ struct spear_sdhci {
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};
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/* sdhci ops */
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static struct sdhci_ops sdhci_pltfm_ops = {
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static const struct sdhci_ops sdhci_pltfm_ops = {
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/* Nothing to do for now. */
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};
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@ -147,7 +147,7 @@ static int tegra_sdhci_buswidth(struct sdhci_host *host, int bus_width)
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return 0;
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}
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static struct sdhci_ops tegra_sdhci_ops = {
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static const struct sdhci_ops tegra_sdhci_ops = {
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.get_ro = tegra_sdhci_get_ro,
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.read_l = tegra_sdhci_readl,
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.read_w = tegra_sdhci_readw,
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