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drm/i915: Make DP link training channel equalization DP 1.2 Spec compliant
Fix the number of tries in channel euqalization link training sequence according to DP 1.2 Spec. It returns a boolean depending on channel equalization pass or failure. Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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parent
13b1996e84
commit
c92bd2fa33
2 changed files with 22 additions and 36 deletions
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@ -244,12 +244,12 @@ static u32 intel_dp_training_pattern(struct intel_dp *intel_dp)
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return training_pattern;
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}
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static void
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static bool
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intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp)
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{
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bool channel_eq = false;
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int tries, cr_tries;
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int tries;
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u32 training_pattern;
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uint8_t link_status[DP_LINK_STATUS_SIZE];
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training_pattern = intel_dp_training_pattern(intel_dp);
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@ -258,20 +258,11 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp)
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training_pattern |
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DP_LINK_SCRAMBLING_DISABLE)) {
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DRM_ERROR("failed to start channel equalization\n");
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return;
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return false;
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}
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tries = 0;
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cr_tries = 0;
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channel_eq = false;
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for (;;) {
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uint8_t link_status[DP_LINK_STATUS_SIZE];
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if (cr_tries > 5) {
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DRM_ERROR("failed to train DP, aborting\n");
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intel_dp_dump_link_status(link_status);
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break;
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}
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intel_dp->channel_eq_status = false;
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for (tries = 0; tries < 5; tries++) {
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drm_dp_link_train_channel_eq_delay(intel_dp->dpcd);
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if (!intel_dp_get_link_status(intel_dp, link_status)) {
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@ -282,44 +273,38 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp)
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/* Make sure clock is still ok */
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if (!drm_dp_clock_recovery_ok(link_status,
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intel_dp->lane_count)) {
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intel_dp_link_training_clock_recovery(intel_dp);
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intel_dp_set_link_train(intel_dp,
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training_pattern |
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DP_LINK_SCRAMBLING_DISABLE);
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cr_tries++;
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continue;
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intel_dp_dump_link_status(link_status);
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DRM_DEBUG_KMS("Clock recovery check failed, cannot "
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"continue channel equalization\n");
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break;
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}
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if (drm_dp_channel_eq_ok(link_status,
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intel_dp->lane_count)) {
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channel_eq = true;
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intel_dp->channel_eq_status = true;
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DRM_DEBUG_KMS("Channel EQ done. DP Training "
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"successful\n");
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break;
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}
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/* Try 5 times, then try clock recovery if that fails */
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if (tries > 5) {
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intel_dp_link_training_clock_recovery(intel_dp);
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intel_dp_set_link_train(intel_dp,
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training_pattern |
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DP_LINK_SCRAMBLING_DISABLE);
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tries = 0;
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cr_tries++;
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continue;
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}
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/* Update training set as requested by target */
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intel_get_adjust_train(intel_dp, link_status);
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if (!intel_dp_update_link_train(intel_dp)) {
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DRM_ERROR("failed to update link training\n");
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break;
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}
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++tries;
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}
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/* Try 5 times, else fail and try at lower BW */
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if (tries == 5) {
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intel_dp_dump_link_status(link_status);
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DRM_DEBUG_KMS("Channel equalization failed 5 times\n");
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}
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intel_dp_set_idle_link_train(intel_dp);
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if (channel_eq)
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DRM_DEBUG_KMS("Channel EQ done. DP Training successful\n");
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return intel_dp->channel_eq_status;
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}
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void intel_dp_stop_link_train(struct intel_dp *intel_dp)
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@ -878,6 +878,7 @@ struct intel_dp {
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bool link_mst;
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bool has_audio;
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bool detect_done;
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bool channel_eq_status;
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enum hdmi_force_audio force_audio;
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bool limited_color_range;
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bool color_range_auto;
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