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phy: cadence-torrent: Use regmap to read and write DPTX PHY registers
Use regmap to read and write DPTX specific PHY registers. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Signed-off-by: Yuti Amonkar <yamonkar@cadence.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This commit is contained in:
Swapnil Jakhade
Kishon Vijay Abraham I
parent
69d114acd6
commit
cba472ecdb
1 changed files with 100 additions and 69 deletions
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@ -45,11 +45,12 @@
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#define TORRENT_PHY_PMA_COMMON_OFFSET(block_offset) \
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(0xE000 << (block_offset))
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#define TORRENT_DPTX_PHY_OFFSET 0x0
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/*
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* register offsets from DPTX PHY register block base (i.e MHDP
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* register base + 0x30a00)
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*/
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#define PHY_AUX_CONFIG 0x00
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#define PHY_AUX_CTRL 0x04
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#define PHY_RESET 0x20
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#define PMA_TX_ELEC_IDLE_MASK 0xF0U
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@ -65,8 +66,6 @@
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#define PMA_XCVR_POWER_STATE_REQ_LN_MASK 0x3FU
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#define PHY_PMA_XCVR_POWER_STATE_ACK 0x30
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#define PHY_PMA_CMN_READY 0x34
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#define PHY_PMA_XCVR_TX_VMARGIN 0x38
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#define PHY_PMA_XCVR_TX_DEEMPH 0x3c
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/*
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* register offsets from SD0801 PHY register block base (i.e MHDP
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@ -179,6 +178,9 @@ static const struct reg_field phy_pma_cmn_ctrl_2 =
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static const struct reg_field phy_pma_pll_raw_ctrl =
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REG_FIELD(PHY_PMA_PLL_RAW_CTRL, 0, 1);
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static const struct reg_field phy_reset_ctrl =
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REG_FIELD(PHY_RESET, 8, 8);
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static const struct of_device_id cdns_torrent_phy_of_match[];
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struct cdns_torrent_phy {
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@ -195,9 +197,11 @@ struct cdns_torrent_phy {
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struct regmap *regmap_phy_pma_common_cdb;
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struct regmap *regmap_tx_lane_cdb[MAX_NUM_LANES];
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struct regmap *regmap_rx_lane_cdb[MAX_NUM_LANES];
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struct regmap *regmap_dptx_phy_reg;
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struct regmap_field *phy_pll_cfg;
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struct regmap_field *phy_pma_cmn_ctrl_2;
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struct regmap_field *phy_pma_pll_raw_ctrl;
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struct regmap_field *phy_reset_ctrl;
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};
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enum phy_powerstate {
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@ -228,12 +232,6 @@ static void cdns_torrent_dp_pma_lane_cfg(struct cdns_torrent_phy *cdns_phy,
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unsigned int lane);
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static void cdns_torrent_dp_pma_cmn_rate(struct cdns_torrent_phy *cdns_phy,
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u32 rate, u32 num_lanes);
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static void cdns_dp_phy_write_field(struct cdns_torrent_phy *cdns_phy,
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unsigned int offset,
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unsigned char start_bit,
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unsigned char num_bits,
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unsigned int val);
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static int cdns_torrent_dp_configure(struct phy *phy,
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union phy_configure_opts *opts);
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static int cdns_torrent_dp_set_power_state(struct cdns_torrent_phy *cdns_phy,
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@ -277,6 +275,27 @@ static int cdns_regmap_read(void *context, unsigned int reg, unsigned int *val)
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return 0;
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}
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static int cdns_regmap_dptx_write(void *context, unsigned int reg,
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unsigned int val)
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{
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struct cdns_regmap_cdb_context *ctx = context;
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u32 offset = reg;
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writel(val, ctx->base + offset);
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return 0;
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}
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static int cdns_regmap_dptx_read(void *context, unsigned int reg,
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unsigned int *val)
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{
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struct cdns_regmap_cdb_context *ctx = context;
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u32 offset = reg;
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*val = readl(ctx->base + offset);
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return 0;
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}
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#define TORRENT_TX_LANE_CDB_REGMAP_CONF(n) \
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{ \
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.name = "torrent_tx_lane" n "_cdb", \
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@ -333,6 +352,14 @@ static struct regmap_config cdns_torrent_phy_pma_cmn_cdb_config = {
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.reg_read = cdns_regmap_read,
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};
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static struct regmap_config cdns_torrent_dptx_phy_config = {
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.name = "torrent_dptx_phy",
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.reg_stride = 1,
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.fast_io = true,
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.reg_write = cdns_regmap_dptx_write,
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.reg_read = cdns_regmap_dptx_read,
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};
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/* PHY mmr access functions */
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static void cdns_torrent_phy_write(struct regmap *regmap, u32 offset, u32 val)
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@ -350,21 +377,18 @@ static u32 cdns_torrent_phy_read(struct regmap *regmap, u32 offset)
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/* DPTX mmr access functions */
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static void cdns_torrent_dp_write(struct cdns_torrent_phy *cdns_phy,
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u32 offset, u32 val)
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static void cdns_torrent_dp_write(struct regmap *regmap, u32 offset, u32 val)
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{
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writel(val, cdns_phy->base + offset);
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regmap_write(regmap, offset, val);
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}
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static u32 cdns_torrent_dp_read(struct cdns_torrent_phy *cdns_phy, u32 offset)
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static u32 cdns_torrent_dp_read(struct regmap *regmap, u32 offset)
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{
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return readl(cdns_phy->base + offset);
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}
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u32 val;
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#define cdns_torrent_dp_read_poll_timeout(cdns_phy, offset, val, cond, \
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delay_us, timeout_us) \
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readl_poll_timeout((cdns_phy)->base + (offset), \
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val, cond, delay_us, timeout_us)
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regmap_read(regmap, offset, &val);
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return val;
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}
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/*
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* Structure used to store values of PHY registers for voltage-related
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@ -439,6 +463,8 @@ static int cdns_torrent_dp_set_pll_en(struct cdns_torrent_phy *cdns_phy,
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{
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u32 rd_val;
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u32 ret;
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struct regmap *regmap = cdns_phy->regmap_dptx_phy_reg;
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/*
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* Used to determine, which bits to check for or enable in
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* PHY_PMA_XCVR_PLLCLK_EN register.
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@ -470,14 +496,14 @@ static int cdns_torrent_dp_set_pll_en(struct cdns_torrent_phy *cdns_phy,
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else
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pll_val = 0x00000000;
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cdns_torrent_dp_write(cdns_phy, PHY_PMA_XCVR_PLLCLK_EN, pll_val);
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cdns_torrent_dp_write(regmap, PHY_PMA_XCVR_PLLCLK_EN, pll_val);
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/* Wait for acknowledgment from PHY. */
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ret = cdns_torrent_dp_read_poll_timeout(cdns_phy,
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PHY_PMA_XCVR_PLLCLK_EN_ACK,
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rd_val,
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(rd_val & pll_bits) == pll_val,
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0, POLL_TIMEOUT_US);
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ret = regmap_read_poll_timeout(regmap,
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PHY_PMA_XCVR_PLLCLK_EN_ACK,
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rd_val,
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(rd_val & pll_bits) == pll_val,
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0, POLL_TIMEOUT_US);
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ndelay(100);
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return ret;
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}
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@ -601,9 +627,10 @@ static int cdns_torrent_dp_verify_config(struct cdns_torrent_phy *cdns_phy,
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static void cdns_torrent_dp_set_a0_pll(struct cdns_torrent_phy *cdns_phy,
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u32 num_lanes)
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{
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u32 pwr_state = cdns_torrent_dp_read(cdns_phy,
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struct regmap *regmap = cdns_phy->regmap_dptx_phy_reg;
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u32 pwr_state = cdns_torrent_dp_read(regmap,
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PHY_PMA_XCVR_POWER_STATE_REQ);
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u32 pll_clk_en = cdns_torrent_dp_read(cdns_phy,
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u32 pll_clk_en = cdns_torrent_dp_read(regmap,
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PHY_PMA_XCVR_PLLCLK_EN);
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/* Lane 0 is always enabled. */
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@ -628,9 +655,8 @@ static void cdns_torrent_dp_set_a0_pll(struct cdns_torrent_phy *cdns_phy,
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pll_clk_en &= ~(0x01U << 3);
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}
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cdns_torrent_dp_write(cdns_phy,
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PHY_PMA_XCVR_POWER_STATE_REQ, pwr_state);
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cdns_torrent_dp_write(cdns_phy, PHY_PMA_XCVR_PLLCLK_EN, pll_clk_en);
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cdns_torrent_dp_write(regmap, PHY_PMA_XCVR_POWER_STATE_REQ, pwr_state);
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cdns_torrent_dp_write(regmap, PHY_PMA_XCVR_PLLCLK_EN, pll_clk_en);
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}
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/* Configure lane count as required. */
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@ -639,18 +665,19 @@ static int cdns_torrent_dp_set_lanes(struct cdns_torrent_phy *cdns_phy,
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{
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u32 value;
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u32 ret;
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struct regmap *regmap = cdns_phy->regmap_dptx_phy_reg;
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u8 lane_mask = (1 << dp->lanes) - 1;
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value = cdns_torrent_dp_read(cdns_phy, PHY_RESET);
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value = cdns_torrent_dp_read(regmap, PHY_RESET);
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/* clear pma_tx_elec_idle_ln_* bits. */
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value &= ~PMA_TX_ELEC_IDLE_MASK;
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/* Assert pma_tx_elec_idle_ln_* for disabled lanes. */
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value |= ((~lane_mask) << PMA_TX_ELEC_IDLE_SHIFT) &
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PMA_TX_ELEC_IDLE_MASK;
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cdns_torrent_dp_write(cdns_phy, PHY_RESET, value);
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cdns_torrent_dp_write(regmap, PHY_RESET, value);
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/* reset the link by asserting phy_l00_reset_n low */
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cdns_torrent_dp_write(cdns_phy, PHY_RESET,
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cdns_torrent_dp_write(regmap, PHY_RESET,
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value & (~PHY_L00_RESET_N_MASK));
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/*
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@ -658,13 +685,13 @@ static int cdns_torrent_dp_set_lanes(struct cdns_torrent_phy *cdns_phy,
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* and powered down when re-enabling the link
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*/
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value = (value & 0x0000FFF0) | (0x0000000E & lane_mask);
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cdns_torrent_dp_write(cdns_phy, PHY_RESET, value);
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cdns_torrent_dp_write(regmap, PHY_RESET, value);
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cdns_torrent_dp_set_a0_pll(cdns_phy, dp->lanes);
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/* release phy_l0*_reset_n based on used laneCount */
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value = (value & 0x0000FFF0) | (0x0000000F & lane_mask);
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cdns_torrent_dp_write(cdns_phy, PHY_RESET, value);
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cdns_torrent_dp_write(regmap, PHY_RESET, value);
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/* Wait, until PHY gets ready after releasing PHY reset signal. */
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ret = cdns_torrent_dp_wait_pma_cmn_ready(cdns_phy);
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@ -674,7 +701,7 @@ static int cdns_torrent_dp_set_lanes(struct cdns_torrent_phy *cdns_phy,
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ndelay(100);
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/* release pma_xcvr_pllclk_en_ln_*, only for the master lane */
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cdns_torrent_dp_write(cdns_phy, PHY_PMA_XCVR_PLLCLK_EN, 0x0001);
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cdns_torrent_dp_write(regmap, PHY_PMA_XCVR_PLLCLK_EN, 0x0001);
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ret = cdns_torrent_dp_run(cdns_phy, dp->lanes);
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@ -801,6 +828,7 @@ static int cdns_torrent_dp_init(struct phy *phy)
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int ret;
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struct cdns_torrent_phy *cdns_phy = phy_get_drvdata(phy);
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struct regmap *regmap = cdns_phy->regmap_dptx_phy_reg;
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ret = clk_prepare_enable(cdns_phy->clk);
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if (ret) {
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@ -825,7 +853,7 @@ static int cdns_torrent_dp_init(struct phy *phy)
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return -EINVAL;
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}
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cdns_torrent_dp_write(cdns_phy, PHY_AUX_CTRL, 0x0003); /* enable AUX */
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cdns_torrent_dp_write(regmap, PHY_AUX_CTRL, 0x0003); /* enable AUX */
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/* PHY PMA registers configuration function */
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cdns_torrent_dp_pma_cfg(cdns_phy);
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@ -841,11 +869,11 @@ static int cdns_torrent_dp_init(struct phy *phy)
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* used lanes
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*/
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lane_bits = (1 << cdns_phy->num_lanes) - 1;
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cdns_torrent_dp_write(cdns_phy, PHY_RESET,
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cdns_torrent_dp_write(regmap, PHY_RESET,
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((0xF & ~lane_bits) << 4) | (0xF & lane_bits));
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/* release pma_xcvr_pllclk_en_ln_*, only for the master lane */
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cdns_torrent_dp_write(cdns_phy, PHY_PMA_XCVR_PLLCLK_EN, 0x0001);
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cdns_torrent_dp_write(regmap, PHY_PMA_XCVR_PLLCLK_EN, 0x0001);
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/* PHY PMA registers configuration functions */
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/* Initialize PHY with max supported link rate, without SSC. */
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@ -861,7 +889,8 @@ static int cdns_torrent_dp_init(struct phy *phy)
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cdns_phy->num_lanes);
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/* take out of reset */
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cdns_dp_phy_write_field(cdns_phy, PHY_RESET, 8, 1, 1);
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regmap_field_write(cdns_phy->phy_reset_ctrl, 0x1);
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ret = cdns_torrent_dp_wait_pma_cmn_ready(cdns_phy);
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if (ret)
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return ret;
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@ -884,10 +913,10 @@ int cdns_torrent_dp_wait_pma_cmn_ready(struct cdns_torrent_phy *cdns_phy)
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{
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unsigned int reg;
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int ret;
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struct regmap *regmap = cdns_phy->regmap_dptx_phy_reg;
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ret = cdns_torrent_dp_read_poll_timeout(cdns_phy, PHY_PMA_CMN_READY,
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reg, reg & 1, 0,
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POLL_TIMEOUT_US);
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ret = regmap_read_poll_timeout(regmap, PHY_PMA_CMN_READY, reg,
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reg & 1, 0, POLL_TIMEOUT_US);
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if (ret == -ETIMEDOUT) {
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dev_err(cdns_phy->dev,
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"timeout waiting for PMA common ready\n");
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@ -1405,6 +1434,7 @@ static int cdns_torrent_dp_set_power_state(struct cdns_torrent_phy *cdns_phy,
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u32 mask;
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u32 read_val;
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u32 ret;
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struct regmap *regmap = cdns_phy->regmap_dptx_phy_reg;
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switch (powerstate) {
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case (POWERSTATE_A0):
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@ -1445,15 +1475,12 @@ static int cdns_torrent_dp_set_power_state(struct cdns_torrent_phy *cdns_phy,
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}
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/* Set power state A<n>. */
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cdns_torrent_dp_write(cdns_phy, PHY_PMA_XCVR_POWER_STATE_REQ, value);
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cdns_torrent_dp_write(regmap, PHY_PMA_XCVR_POWER_STATE_REQ, value);
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/* Wait, until PHY acknowledges power state completion. */
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ret = cdns_torrent_dp_read_poll_timeout(cdns_phy,
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PHY_PMA_XCVR_POWER_STATE_ACK,
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read_val,
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(read_val & mask) == value, 0,
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POLL_TIMEOUT_US);
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cdns_torrent_dp_write(cdns_phy,
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PHY_PMA_XCVR_POWER_STATE_REQ, 0x00000000);
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ret = regmap_read_poll_timeout(regmap, PHY_PMA_XCVR_POWER_STATE_ACK,
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read_val, (read_val & mask) == value, 0,
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POLL_TIMEOUT_US);
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cdns_torrent_dp_write(regmap, PHY_PMA_XCVR_POWER_STATE_REQ, 0x00000000);
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ndelay(100);
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return ret;
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@ -1463,15 +1490,15 @@ static int cdns_torrent_dp_run(struct cdns_torrent_phy *cdns_phy, u32 num_lanes)
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{
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unsigned int read_val;
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int ret;
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struct regmap *regmap = cdns_phy->regmap_dptx_phy_reg;
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/*
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* waiting for ACK of pma_xcvr_pllclk_en_ln_*, only for the
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* master lane
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*/
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ret = cdns_torrent_dp_read_poll_timeout(cdns_phy,
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PHY_PMA_XCVR_PLLCLK_EN_ACK,
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read_val, read_val & 1, 0,
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POLL_TIMEOUT_US);
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ret = regmap_read_poll_timeout(regmap, PHY_PMA_XCVR_PLLCLK_EN_ACK,
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read_val, read_val & 1,
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0, POLL_TIMEOUT_US);
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if (ret == -ETIMEDOUT) {
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dev_err(cdns_phy->dev,
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"timeout waiting for link PLL clock enable ack\n");
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@ -1491,20 +1518,6 @@ static int cdns_torrent_dp_run(struct cdns_torrent_phy *cdns_phy, u32 num_lanes)
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return ret;
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}
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static void cdns_dp_phy_write_field(struct cdns_torrent_phy *cdns_phy,
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unsigned int offset,
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unsigned char start_bit,
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unsigned char num_bits,
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unsigned int val)
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{
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unsigned int read_val;
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read_val = cdns_torrent_dp_read(cdns_phy, offset);
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cdns_torrent_dp_write(cdns_phy, offset,
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((val << start_bit) |
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(read_val & ~(((1 << num_bits) - 1) <<
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start_bit))));
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}
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static struct regmap *cdns_regmap_init(struct device *dev, void __iomem *base,
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u32 block_offset,
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@ -1554,6 +1567,14 @@ static int cdns_regfield_init(struct cdns_torrent_phy *cdns_phy)
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}
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cdns_phy->phy_pma_pll_raw_ctrl = field;
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|
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regmap = cdns_phy->regmap_dptx_phy_reg;
|
||||
field = devm_regmap_field_alloc(dev, regmap, phy_reset_ctrl);
|
||||
if (IS_ERR(field)) {
|
||||
dev_err(dev, "PHY_RESET reg field init failed\n");
|
||||
return PTR_ERR(field);
|
||||
}
|
||||
cdns_phy->phy_reset_ctrl = field;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1622,6 +1643,16 @@ static int cdns_regmap_init_torrent_dp(struct cdns_torrent_phy *cdns_phy,
|
|||
}
|
||||
cdns_phy->regmap_phy_pma_common_cdb = regmap;
|
||||
|
||||
block_offset = TORRENT_DPTX_PHY_OFFSET;
|
||||
regmap = cdns_regmap_init(dev, base, block_offset,
|
||||
reg_offset_shift,
|
||||
&cdns_torrent_dptx_phy_config);
|
||||
if (IS_ERR(regmap)) {
|
||||
dev_err(dev, "Failed to init DPTX PHY regmap\n");
|
||||
return PTR_ERR(regmap);
|
||||
}
|
||||
cdns_phy->regmap_dptx_phy_reg = regmap;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue