Linux 5.12
-----BEGIN PGP SIGNATURE----- iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAmCF1cQeHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGvvgH/RAXkQ5IWAJfA6+M 8kPWOibeCRUftBQj/QP8saa/+e17R0LqFrMAOZUvIr5Z/midPsGmW3HaT0D9Un2R 80xi3bj+S4NJi1JNKr2JoEaw5T44LOU0snQ1tRU4+R/RIISNlRyYvcHyztz7cyHX K3r5j4125uYytKG6tI0c7IWGN5XtgDfd8VSew+MqjOXmJSlkOUk+xqu0uKDPWTqU AVCtPd2D7Yp7BcmQkJstu6+zPEuIbirGx+6c28pzT3d5q16+8iZ1G9jtpOk12mA7 jEIVgvIpevuZdkVUbf+gJMHyetVwNS0FtypUw5r1meoqwqeTNaCzc0KpFnQkO4Ak AWGzkMY= =QgJZ -----END PGP SIGNATURE----- Merge tag 'v5.12' into next Sync up with mainline to get the latest device tree bindings and kernel APIs.
This commit is contained in:
Dmitry Torokhov
commit
cbb2452392
10
.mailmap
10
.mailmap
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@ -36,6 +36,7 @@ Andrew Morton <akpm@linux-foundation.org>
|
|||
Andrew Murray <amurray@thegoodpenguin.co.uk> <amurray@embedded-bits.co.uk>
|
||||
Andrew Murray <amurray@thegoodpenguin.co.uk> <andrew.murray@arm.com>
|
||||
Andrew Vasquez <andrew.vasquez@qlogic.com>
|
||||
Andrey Konovalov <andreyknvl@gmail.com> <andreyknvl@google.com>
|
||||
Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com>
|
||||
Andrey Ryabinin <ryabinin.a.a@gmail.com> <aryabinin@virtuozzo.com>
|
||||
Andy Adamson <andros@citi.umich.edu>
|
||||
|
|
@ -65,6 +66,8 @@ Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>
|
|||
Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
|
||||
Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>
|
||||
Chao Yu <chao@kernel.org> <yuchao0@huawei.com>
|
||||
Chris Chiu <chris.chiu@canonical.com> <chiu@endlessm.com>
|
||||
Chris Chiu <chris.chiu@canonical.com> <chiu@endlessos.org>
|
||||
Christophe Ricard <christophe.ricard@gmail.com>
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||||
Christoph Hellwig <hch@lst.de>
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||||
Corey Minyard <minyard@acm.org>
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||||
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@ -165,6 +168,7 @@ Johan Hovold <johan@kernel.org> <jhovold@gmail.com>
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|||
Johan Hovold <johan@kernel.org> <johan@hovoldconsulting.com>
|
||||
John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
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||||
John Stultz <johnstul@us.ibm.com>
|
||||
Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>
|
||||
<josh@joshtriplett.org> <josh@freedesktop.org>
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||||
<josh@joshtriplett.org> <josh@kernel.org>
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||||
<josh@joshtriplett.org> <josht@linux.vnet.ibm.com>
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||||
|
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@ -250,8 +254,14 @@ Morten Welinder <welinder@anemone.rentec.com>
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|||
Morten Welinder <welinder@darter.rentec.com>
|
||||
Morten Welinder <welinder@troll.com>
|
||||
Mythri P K <mythripk@ti.com>
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||||
Nadia Yvette Chambers <nyc@holomorphy.com> William Lee Irwin III <wli@holomorphy.com>
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Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com>
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Nguyen Anh Quynh <aquynh@gmail.com>
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Nicholas Piggin <npiggin@gmail.com> <npiggen@suse.de>
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Nicholas Piggin <npiggin@gmail.com> <npiggin@kernel.dk>
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Nicholas Piggin <npiggin@gmail.com> <npiggin@suse.de>
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Nicholas Piggin <npiggin@gmail.com> <nickpiggin@yahoo.com.au>
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Nicholas Piggin <npiggin@gmail.com> <piggin@cyberone.com.au>
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Nicolas Ferre <nicolas.ferre@microchip.com> <nicolas.ferre@atmel.com>
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Nicolas Pitre <nico@fluxnic.net> <nicolas.pitre@linaro.org>
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Nicolas Pitre <nico@fluxnic.net> <nico@linaro.org>
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@ -1,7 +1,7 @@
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What: /sys/kernel/debug/moxtet/input
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Date: March 2019
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KernelVersion: 5.3
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Contact: Marek Behún <marek.behun@nic.cz>
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Contact: Marek Behún <kabel@kernel.org>
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Description: (Read) Read input from the shift registers, in hexadecimal.
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Returns N+1 bytes, where N is the number of Moxtet connected
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modules. The first byte is from the CPU board itself.
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@ -19,7 +19,7 @@ Description: (Read) Read input from the shift registers, in hexadecimal.
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What: /sys/kernel/debug/moxtet/output
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Date: March 2019
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KernelVersion: 5.3
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Contact: Marek Behún <marek.behun@nic.cz>
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Contact: Marek Behún <kabel@kernel.org>
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Description: (RW) Read last written value to the shift registers, in
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hexadecimal, or write values to the shift registers, also
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in hexadecimal.
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@ -1,7 +1,7 @@
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What: /sys/kernel/debug/turris-mox-rwtm/do_sign
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Date: Jun 2020
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KernelVersion: 5.8
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Contact: Marek Behún <marek.behun@nic.cz>
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Contact: Marek Behún <kabel@kernel.org>
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Description:
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======= ===========================================================
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|
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@ -1,17 +1,17 @@
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What: /sys/bus/moxtet/devices/moxtet-<name>.<addr>/module_description
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Date: March 2019
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KernelVersion: 5.3
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Contact: Marek Behún <marek.behun@nic.cz>
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Contact: Marek Behún <kabel@kernel.org>
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Description: (Read) Moxtet module description. Format: string
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What: /sys/bus/moxtet/devices/moxtet-<name>.<addr>/module_id
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Date: March 2019
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KernelVersion: 5.3
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Contact: Marek Behún <marek.behun@nic.cz>
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Contact: Marek Behún <kabel@kernel.org>
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Description: (Read) Moxtet module ID. Format: %x
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What: /sys/bus/moxtet/devices/moxtet-<name>.<addr>/module_name
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Date: March 2019
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KernelVersion: 5.3
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Contact: Marek Behún <marek.behun@nic.cz>
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Contact: Marek Behún <kabel@kernel.org>
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Description: (Read) Moxtet module name. Format: string
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@ -1,7 +1,7 @@
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What: /sys/class/leds/<led>/device/brightness
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Date: July 2020
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KernelVersion: 5.9
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Contact: Marek Behún <marek.behun@nic.cz>
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Contact: Marek Behún <kabel@kernel.org>
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Description: (RW) On the front panel of the Turris Omnia router there is also
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a button which can be used to control the intensity of all the
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LEDs at once, so that if they are too bright, user can dim them.
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@ -1,21 +1,21 @@
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What: /sys/firmware/turris-mox-rwtm/board_version
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Date: August 2019
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KernelVersion: 5.4
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Contact: Marek Behún <marek.behun@nic.cz>
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Contact: Marek Behún <kabel@kernel.org>
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Description: (Read) Board version burned into eFuses of this Turris Mox board.
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Format: %i
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What: /sys/firmware/turris-mox-rwtm/mac_address*
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Date: August 2019
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KernelVersion: 5.4
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Contact: Marek Behún <marek.behun@nic.cz>
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Contact: Marek Behún <kabel@kernel.org>
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Description: (Read) MAC addresses burned into eFuses of this Turris Mox board.
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Format: %pM
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What: /sys/firmware/turris-mox-rwtm/pubkey
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Date: August 2019
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KernelVersion: 5.4
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Contact: Marek Behún <marek.behun@nic.cz>
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Contact: Marek Behún <kabel@kernel.org>
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Description: (Read) ECDSA public key (in pubkey hex compressed form) computed
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as pair to the ECDSA private key burned into eFuses of this
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Turris Mox Board.
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@ -24,7 +24,7 @@ Description: (Read) ECDSA public key (in pubkey hex compressed form) computed
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What: /sys/firmware/turris-mox-rwtm/ram_size
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Date: August 2019
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KernelVersion: 5.4
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Contact: Marek Behún <marek.behun@nic.cz>
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||||
Contact: Marek Behún <kabel@kernel.org>
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||||
Description: (Read) RAM size in MiB of this Turris Mox board as was detected
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during manufacturing and burned into eFuses. Can be 512 or 1024.
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Format: %i
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||||
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@ -32,6 +32,6 @@ Description: (Read) RAM size in MiB of this Turris Mox board as was detected
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What: /sys/firmware/turris-mox-rwtm/serial_number
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Date: August 2019
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KernelVersion: 5.4
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||||
Contact: Marek Behún <marek.behun@nic.cz>
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Contact: Marek Behún <kabel@kernel.org>
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Description: (Read) Serial number burned into eFuses of this Turris Mox device.
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Format: %016X
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@ -17,12 +17,12 @@ For ACPI on arm64, tables also fall into the following categories:
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|||
|
||||
- Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT
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- Optional: BGRT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT, IORT,
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MCHI, MPST, MSCT, NFIT, PMTT, RASF, SBST, SLIT, SPMI, SRAT, STAO,
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TCPA, TPM2, UEFI, XENV
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- Optional: BGRT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT, IBFT,
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IORT, MCHI, MPST, MSCT, NFIT, PMTT, RASF, SBST, SLIT, SPMI, SRAT,
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STAO, TCPA, TPM2, UEFI, XENV
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- Not supported: BOOT, DBGP, DMAR, ETDT, HPET, IBFT, IVRS, LPIT,
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MSDM, OEMx, PSDT, RSDT, SLIC, WAET, WDAT, WDRT, WPBT
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- Not supported: BOOT, DBGP, DMAR, ETDT, HPET, IVRS, LPIT, MSDM, OEMx,
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PSDT, RSDT, SLIC, WAET, WDAT, WDRT, WPBT
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====== ========================================================================
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Table Usage for ARMv8 Linux
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@ -130,6 +130,9 @@ stable kernels.
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| Marvell | ARM-MMU-500 | #582743 | N/A |
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+----------------+-----------------+-----------------+-----------------------------+
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+----------------+-----------------+-----------------+-----------------------------+
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| NVIDIA | Carmel Core | N/A | NVIDIA_CARMEL_CNP_ERRATUM |
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+----------------+-----------------+-----------------+-----------------------------+
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+----------------+-----------------+-----------------+-----------------------------+
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||||
| Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
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+----------------+-----------------+-----------------+-----------------------------+
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+----------------+-----------------+-----------------+-----------------------------+
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@ -32,7 +32,7 @@ Optional node properties:
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- "#thermal-sensor-cells" Used to expose itself to thermal fw.
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Read more about iio bindings at
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Documentation/devicetree/bindings/iio/iio-bindings.txt
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https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/
|
||||
|
||||
Example:
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||||
ncp15wb473@0 {
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Bindings for GPIO bitbanged I2C
|
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||||
maintainers:
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||||
- Wolfram Sang <wolfram@the-dreams.de>
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||||
- Wolfram Sang <wsa@kernel.org>
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||||
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml#
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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|||
title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
|
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maintainers:
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||||
- Wolfram Sang <wolfram@the-dreams.de>
|
||||
- Oleksij Rempel <o.rempel@pengutronix.de>
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||||
|
||||
allOf:
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||||
- $ref: /schemas/i2c/i2c-controller.yaml#
|
||||
|
|
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@ -14,8 +14,9 @@ description: >
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|||
Industrial I/O subsystem bindings for ADC controller found in
|
||||
Ingenic JZ47xx SoCs.
|
||||
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||||
ADC clients must use the format described in iio-bindings.txt, giving
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a phandle and IIO specifier pair ("io-channels") to the ADC controller.
|
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ADC clients must use the format described in
|
||||
https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml,
|
||||
giving a phandle and IIO specifier pair ("io-channels") to the ADC controller.
|
||||
|
||||
properties:
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||||
compatible:
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||||
|
|
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@ -24,7 +24,9 @@ properties:
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|||
description: >
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||||
List of phandle and IIO specifier pairs.
|
||||
Each pair defines one ADC channel to which a joystick axis is connected.
|
||||
See Documentation/devicetree/bindings/iio/iio-bindings.txt for details.
|
||||
See
|
||||
https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml
|
||||
for details.
|
||||
|
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'#address-cells':
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const: 1
|
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|
|
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@ -5,7 +5,10 @@ Required properties:
|
|||
- compatible: must be "resistive-adc-touch"
|
||||
The device must be connected to an ADC device that provides channels for
|
||||
position measurement and optional pressure.
|
||||
Refer to ../iio/iio-bindings.txt for details
|
||||
Refer to
|
||||
https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml
|
||||
for details
|
||||
|
||||
- iio-channels: must have at least two channels connected to an ADC device.
|
||||
These should correspond to the channels exposed by the ADC device and should
|
||||
have the right index as the ADC device registers them. These channels
|
||||
|
|
|
|||
|
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: CZ.NIC's Turris Omnia LEDs driver
|
||||
|
||||
maintainers:
|
||||
- Marek Behún <marek.behun@nic.cz>
|
||||
- Marek Behún <kabel@kernel.org>
|
||||
|
||||
description:
|
||||
This module adds support for the RGB LEDs found on the front panel of the
|
||||
|
|
|
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|
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@ -72,7 +72,9 @@ Required child device properties:
|
|||
pwm|regulator|rtc|sysctrl|usb]";
|
||||
|
||||
A few child devices require ADC channels from the GPADC node. Those follow the
|
||||
standard bindings from iio/iio-bindings.txt and iio/adc/adc.txt
|
||||
standard bindings from
|
||||
https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml
|
||||
and Documentation/devicetree/bindings/iio/adc/adc.yaml
|
||||
|
||||
abx500-temp : io-channels "aux1" and "aux2" for measuring external
|
||||
temperatures.
|
||||
|
|
|
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|
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@ -16,14 +16,14 @@ Optional subnodes:
|
|||
The sub-functions of CPCAP get their own node with their own compatible values,
|
||||
which are described in the following files:
|
||||
|
||||
- ../power/supply/cpcap-battery.txt
|
||||
- ../power/supply/cpcap-charger.txt
|
||||
- ../regulator/cpcap-regulator.txt
|
||||
- ../phy/phy-cpcap-usb.txt
|
||||
- ../input/cpcap-pwrbutton.txt
|
||||
- ../rtc/cpcap-rtc.txt
|
||||
- ../leds/leds-cpcap.txt
|
||||
- ../iio/adc/cpcap-adc.txt
|
||||
- Documentation/devicetree/bindings/power/supply/cpcap-battery.txt
|
||||
- Documentation/devicetree/bindings/power/supply/cpcap-charger.txt
|
||||
- Documentation/devicetree/bindings/regulator/cpcap-regulator.txt
|
||||
- Documentation/devicetree/bindings/phy/phy-cpcap-usb.txt
|
||||
- Documentation/devicetree/bindings/input/cpcap-pwrbutton.txt
|
||||
- Documentation/devicetree/bindings/rtc/cpcap-rtc.txt
|
||||
- Documentation/devicetree/bindings/leds/leds-cpcap.txt
|
||||
- Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml
|
||||
|
||||
The only exception is the audio codec. Instead of a compatible value its
|
||||
node must be named "audio-codec".
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@ required:
|
|||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@ properties:
|
|||
description:
|
||||
Reference to an nvmem node for the MAC address
|
||||
|
||||
nvmem-cells-names:
|
||||
nvmem-cell-names:
|
||||
const: mac-address
|
||||
|
||||
phy-connection-type:
|
||||
|
|
|
|||
|
|
@ -65,6 +65,71 @@ KSZ9031:
|
|||
step is 60ps. The default value is the neutral setting, so setting
|
||||
rxc-skew-ps=<0> actually results in -900 picoseconds adjustment.
|
||||
|
||||
The KSZ9031 hardware supports a range of skew values from negative to
|
||||
positive, where the specific range is property dependent. All values
|
||||
specified in the devicetree are offset by the minimum value so they
|
||||
can be represented as positive integers in the devicetree since it's
|
||||
difficult to represent a negative number in the devictree.
|
||||
|
||||
The following 5-bit values table apply to rxc-skew-ps and txc-skew-ps.
|
||||
|
||||
Pad Skew Value Delay (ps) Devicetree Value
|
||||
------------------------------------------------------
|
||||
0_0000 -900ps 0
|
||||
0_0001 -840ps 60
|
||||
0_0010 -780ps 120
|
||||
0_0011 -720ps 180
|
||||
0_0100 -660ps 240
|
||||
0_0101 -600ps 300
|
||||
0_0110 -540ps 360
|
||||
0_0111 -480ps 420
|
||||
0_1000 -420ps 480
|
||||
0_1001 -360ps 540
|
||||
0_1010 -300ps 600
|
||||
0_1011 -240ps 660
|
||||
0_1100 -180ps 720
|
||||
0_1101 -120ps 780
|
||||
0_1110 -60ps 840
|
||||
0_1111 0ps 900
|
||||
1_0000 60ps 960
|
||||
1_0001 120ps 1020
|
||||
1_0010 180ps 1080
|
||||
1_0011 240ps 1140
|
||||
1_0100 300ps 1200
|
||||
1_0101 360ps 1260
|
||||
1_0110 420ps 1320
|
||||
1_0111 480ps 1380
|
||||
1_1000 540ps 1440
|
||||
1_1001 600ps 1500
|
||||
1_1010 660ps 1560
|
||||
1_1011 720ps 1620
|
||||
1_1100 780ps 1680
|
||||
1_1101 840ps 1740
|
||||
1_1110 900ps 1800
|
||||
1_1111 960ps 1860
|
||||
|
||||
The following 4-bit values table apply to the txdX-skew-ps, rxdX-skew-ps
|
||||
data pads, and the rxdv-skew-ps, txen-skew-ps control pads.
|
||||
|
||||
Pad Skew Value Delay (ps) Devicetree Value
|
||||
------------------------------------------------------
|
||||
0000 -420ps 0
|
||||
0001 -360ps 60
|
||||
0010 -300ps 120
|
||||
0011 -240ps 180
|
||||
0100 -180ps 240
|
||||
0101 -120ps 300
|
||||
0110 -60ps 360
|
||||
0111 0ps 420
|
||||
1000 60ps 480
|
||||
1001 120ps 540
|
||||
1010 180ps 600
|
||||
1011 240ps 660
|
||||
1100 300ps 720
|
||||
1101 360ps 780
|
||||
1110 420ps 840
|
||||
1111 480ps 900
|
||||
|
||||
Optional properties:
|
||||
|
||||
Maximum value of 1860, default value 900:
|
||||
|
|
@ -120,11 +185,21 @@ KSZ9131:
|
|||
|
||||
Examples:
|
||||
|
||||
/* Attach to an Ethernet device with autodetected PHY */
|
||||
&enet {
|
||||
rxc-skew-ps = <1800>;
|
||||
rxdv-skew-ps = <0>;
|
||||
txc-skew-ps = <1800>;
|
||||
txen-skew-ps = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Attach to an explicitly-specified PHY */
|
||||
mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
rxc-skew-ps = <3000>;
|
||||
rxc-skew-ps = <1800>;
|
||||
rxdv-skew-ps = <0>;
|
||||
txc-skew-ps = <3000>;
|
||||
txc-skew-ps = <1800>;
|
||||
txen-skew-ps = <0>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
|
@ -133,3 +208,20 @@ Examples:
|
|||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
|
||||
References
|
||||
|
||||
Micrel ksz9021rl/rn Data Sheet, Revision 1.2. Dated 2/13/2014.
|
||||
http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf
|
||||
|
||||
Micrel ksz9031rnx Data Sheet, Revision 2.1. Dated 11/20/2014.
|
||||
http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf
|
||||
|
||||
Notes:
|
||||
|
||||
Note that a previous version of the Micrel ksz9021rl/rn Data Sheet
|
||||
was missing extended register 106 (transmit data pad skews), and
|
||||
incorrectly specified the ps per step as 200ps/step instead of
|
||||
120ps/step. The latest update to this document reflects the latest
|
||||
revision of the Micrel specification even though usage in the kernel
|
||||
still reflects that incorrect document.
|
||||
|
|
|
|||
|
|
@ -267,7 +267,7 @@ DATA PATH
|
|||
Tx
|
||||
--
|
||||
|
||||
end_start_xmit() is called by the stack. This function does the following:
|
||||
ena_start_xmit() is called by the stack. This function does the following:
|
||||
|
||||
- Maps data buffers (skb->data and frags).
|
||||
- Populates ena_buf for the push buffer (if the driver and device are
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@ purposes as a standard complementary tool. The system's view from
|
|||
``devlink-dpipe`` should change according to the changes done by the
|
||||
standard configuration tools.
|
||||
|
||||
For example, it’s quiet common to implement Access Control Lists (ACL)
|
||||
For example, it’s quite common to implement Access Control Lists (ACL)
|
||||
using Ternary Content Addressable Memory (TCAM). The TCAM memory can be
|
||||
divided into TCAM regions. Complex TC filters can have multiple rules with
|
||||
different priorities and different lookup keys. On the other hand hardware
|
||||
|
|
|
|||
|
|
@ -151,7 +151,7 @@ representor netdevice.
|
|||
-------------
|
||||
A subfunction devlink port is created but it is not active yet. That means the
|
||||
entities are created on devlink side, the e-switch port representor is created,
|
||||
but the subfunction device itself it not created. A user might use e-switch port
|
||||
but the subfunction device itself is not created. A user might use e-switch port
|
||||
representor to do settings, putting it into bridge, adding TC rules, etc. A user
|
||||
might as well configure the hardware address (such as MAC address) of the
|
||||
subfunction while subfunction is inactive.
|
||||
|
|
@ -173,7 +173,7 @@ Terms and Definitions
|
|||
* - Term
|
||||
- Definitions
|
||||
* - ``PCI device``
|
||||
- A physical PCI device having one or more PCI bus consists of one or
|
||||
- A physical PCI device having one or more PCI buses consists of one or
|
||||
more PCI controllers.
|
||||
* - ``PCI controller``
|
||||
- A controller consists of potentially multiple physical functions,
|
||||
|
|
|
|||
|
|
@ -976,9 +976,9 @@ constraints on coalescing parameters and their values.
|
|||
|
||||
|
||||
PAUSE_GET
|
||||
============
|
||||
=========
|
||||
|
||||
Gets channel counts like ``ETHTOOL_GPAUSE`` ioctl request.
|
||||
Gets pause frame settings like ``ETHTOOL_GPAUSEPARAM`` ioctl request.
|
||||
|
||||
Request contents:
|
||||
|
||||
|
|
@ -1007,7 +1007,7 @@ the statistics in the following structure:
|
|||
Each member has a corresponding attribute defined.
|
||||
|
||||
PAUSE_SET
|
||||
============
|
||||
=========
|
||||
|
||||
Sets pause parameters like ``ETHTOOL_GPAUSEPARAM`` ioctl request.
|
||||
|
||||
|
|
@ -1024,7 +1024,7 @@ Request contents:
|
|||
EEE_GET
|
||||
=======
|
||||
|
||||
Gets channel counts like ``ETHTOOL_GEEE`` ioctl request.
|
||||
Gets Energy Efficient Ethernet settings like ``ETHTOOL_GEEE`` ioctl request.
|
||||
|
||||
Request contents:
|
||||
|
||||
|
|
@ -1054,7 +1054,7 @@ first 32 are provided by the ``ethtool_ops`` callback.
|
|||
EEE_SET
|
||||
=======
|
||||
|
||||
Sets pause parameters like ``ETHTOOL_GEEEPARAM`` ioctl request.
|
||||
Sets Energy Efficient Ethernet parameters like ``ETHTOOL_SEEE`` ioctl request.
|
||||
|
||||
Request contents:
|
||||
|
||||
|
|
|
|||
|
|
@ -1849,21 +1849,6 @@ ip6frag_low_thresh - INTEGER
|
|||
ip6frag_time - INTEGER
|
||||
Time in seconds to keep an IPv6 fragment in memory.
|
||||
|
||||
IPv6 Segment Routing:
|
||||
|
||||
seg6_flowlabel - INTEGER
|
||||
Controls the behaviour of computing the flowlabel of outer
|
||||
IPv6 header in case of SR T.encaps
|
||||
|
||||
== =======================================================
|
||||
-1 set flowlabel to zero.
|
||||
0 copy flowlabel from Inner packet in case of Inner IPv6
|
||||
(Set flowlabel to 0 in case IPv4/L2)
|
||||
1 Compute the flowlabel using seg6_make_flowlabel()
|
||||
== =======================================================
|
||||
|
||||
Default is 0.
|
||||
|
||||
``conf/default/*``:
|
||||
Change the interface-specific default settings.
|
||||
|
||||
|
|
|
|||
|
|
@ -24,3 +24,16 @@ seg6_require_hmac - INTEGER
|
|||
* 1 - Drop SR packets without HMAC, validate SR packets with HMAC
|
||||
|
||||
Default is 0.
|
||||
|
||||
seg6_flowlabel - INTEGER
|
||||
Controls the behaviour of computing the flowlabel of outer
|
||||
IPv6 header in case of SR T.encaps
|
||||
|
||||
== =======================================================
|
||||
-1 set flowlabel to zero.
|
||||
0 copy flowlabel from Inner packet in case of Inner IPv6
|
||||
(Set flowlabel to 0 in case IPv4/L2)
|
||||
1 Compute the flowlabel using seg6_make_flowlabel()
|
||||
== =======================================================
|
||||
|
||||
Default is 0.
|
||||
|
|
|
|||
|
|
@ -50,7 +50,7 @@ Callbacks to implement
|
|||
|
||||
The NIC driver offering ipsec offload will need to implement these
|
||||
callbacks to make the offload available to the network stack's
|
||||
XFRM subsytem. Additionally, the feature bits NETIF_F_HW_ESP and
|
||||
XFRM subsystem. Additionally, the feature bits NETIF_F_HW_ESP and
|
||||
NETIF_F_HW_ESP_TX_CSUM will signal the availability of the offload.
|
||||
|
||||
|
||||
|
|
|
|||
88
MAINTAINERS
88
MAINTAINERS
|
|
@ -1576,11 +1576,13 @@ R: Jernej Skrabec <jernej.skrabec@siol.net>
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git
|
||||
L: linux-sunxi@lists.linux.dev
|
||||
F: arch/arm/mach-sunxi/
|
||||
F: arch/arm64/boot/dts/allwinner/
|
||||
F: drivers/clk/sunxi-ng/
|
||||
F: drivers/pinctrl/sunxi/
|
||||
F: drivers/soc/sunxi/
|
||||
N: allwinner
|
||||
N: sun[x456789]i
|
||||
N: sun50i
|
||||
|
||||
|
|
@ -1790,19 +1792,26 @@ F: drivers/net/ethernet/cortina/
|
|||
F: drivers/pinctrl/pinctrl-gemini.c
|
||||
F: drivers/rtc/rtc-ftrtc010.c
|
||||
|
||||
ARM/CZ.NIC TURRIS MOX SUPPORT
|
||||
M: Marek Behun <marek.behun@nic.cz>
|
||||
ARM/CZ.NIC TURRIS SUPPORT
|
||||
M: Marek Behun <kabel@kernel.org>
|
||||
S: Maintained
|
||||
W: http://mox.turris.cz
|
||||
W: https://www.turris.cz/
|
||||
F: Documentation/ABI/testing/debugfs-moxtet
|
||||
F: Documentation/ABI/testing/sysfs-bus-moxtet-devices
|
||||
F: Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm
|
||||
F: Documentation/devicetree/bindings/bus/moxtet.txt
|
||||
F: Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt
|
||||
F: Documentation/devicetree/bindings/gpio/gpio-moxtet.txt
|
||||
F: Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml
|
||||
F: Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt
|
||||
F: drivers/bus/moxtet.c
|
||||
F: drivers/firmware/turris-mox-rwtm.c
|
||||
F: drivers/leds/leds-turris-omnia.c
|
||||
F: drivers/mailbox/armada-37xx-rwtm-mailbox.c
|
||||
F: drivers/gpio/gpio-moxtet.c
|
||||
F: drivers/watchdog/armada_37xx_wdt.c
|
||||
F: include/dt-bindings/bus/moxtet.h
|
||||
F: include/linux/armada-37xx-rwtm-mailbox.h
|
||||
F: include/linux/moxtet.h
|
||||
|
||||
ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6)
|
||||
|
|
@ -2489,7 +2498,7 @@ N: sc27xx
|
|||
N: sc2731
|
||||
|
||||
ARM/STI ARCHITECTURE
|
||||
M: Patrice Chotard <patrice.chotard@st.com>
|
||||
M: Patrice Chotard <patrice.chotard@foss.st.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
W: http://www.stlinux.com
|
||||
|
|
@ -2522,7 +2531,7 @@ F: include/linux/remoteproc/st_slim_rproc.h
|
|||
|
||||
ARM/STM32 ARCHITECTURE
|
||||
M: Maxime Coquelin <mcoquelin.stm32@gmail.com>
|
||||
M: Alexandre Torgue <alexandre.torgue@st.com>
|
||||
M: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
||||
L: linux-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers)
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
|
@ -3115,7 +3124,7 @@ C: irc://irc.oftc.net/bcache
|
|||
F: drivers/md/bcache/
|
||||
|
||||
BDISP ST MEDIA DRIVER
|
||||
M: Fabien Dessenne <fabien.dessenne@st.com>
|
||||
M: Fabien Dessenne <fabien.dessenne@foss.st.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Supported
|
||||
W: https://linuxtv.org
|
||||
|
|
@ -3675,7 +3684,7 @@ M: bcm-kernel-feedback-list@broadcom.com
|
|||
L: linux-pm@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://github.com/broadcom/stblinux.git
|
||||
F: drivers/soc/bcm/bcm-pmb.c
|
||||
F: drivers/soc/bcm/bcm63xx/bcm-pmb.c
|
||||
F: include/dt-bindings/soc/bcm-pmb.h
|
||||
|
||||
BROADCOM SPECIFIC AMBA DRIVER (BCMA)
|
||||
|
|
@ -5080,7 +5089,7 @@ S: Maintained
|
|||
F: drivers/platform/x86/dell/dell-wmi.c
|
||||
|
||||
DELTA ST MEDIA DRIVER
|
||||
M: Hugues Fruchet <hugues.fruchet@st.com>
|
||||
M: Hugues Fruchet <hugues.fruchet@foss.st.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Supported
|
||||
W: https://linuxtv.org
|
||||
|
|
@ -6006,7 +6015,6 @@ F: drivers/gpu/drm/rockchip/
|
|||
|
||||
DRM DRIVERS FOR STI
|
||||
M: Benjamin Gaignard <benjamin.gaignard@linaro.org>
|
||||
M: Vincent Abriou <vincent.abriou@st.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Maintained
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
|
|
@ -6014,10 +6022,9 @@ F: Documentation/devicetree/bindings/display/st,stih4xx.txt
|
|||
F: drivers/gpu/drm/sti
|
||||
|
||||
DRM DRIVERS FOR STM
|
||||
M: Yannick Fertre <yannick.fertre@st.com>
|
||||
M: Philippe Cornu <philippe.cornu@st.com>
|
||||
M: Yannick Fertre <yannick.fertre@foss.st.com>
|
||||
M: Philippe Cornu <philippe.cornu@foss.st.com>
|
||||
M: Benjamin Gaignard <benjamin.gaignard@linaro.org>
|
||||
M: Vincent Abriou <vincent.abriou@st.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Maintained
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
|
|
@ -7091,7 +7098,7 @@ S: Maintained
|
|||
F: drivers/i2c/busses/i2c-cpm.c
|
||||
|
||||
FREESCALE IMX / MXC FEC DRIVER
|
||||
M: Fugang Duan <fugang.duan@nxp.com>
|
||||
M: Joakim Zhang <qiangqing.zhang@nxp.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/fsl-fec.txt
|
||||
|
|
@ -7476,8 +7483,9 @@ F: include/uapi/asm-generic/
|
|||
GENERIC PHY FRAMEWORK
|
||||
M: Kishon Vijay Abraham I <kishon@ti.com>
|
||||
M: Vinod Koul <vkoul@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
L: linux-phy@lists.infradead.org
|
||||
S: Supported
|
||||
Q: https://patchwork.kernel.org/project/linux-phy/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git
|
||||
F: Documentation/devicetree/bindings/phy/
|
||||
F: drivers/phy/
|
||||
|
|
@ -8230,7 +8238,7 @@ F: include/linux/hugetlb.h
|
|||
F: mm/hugetlb.c
|
||||
|
||||
HVA ST MEDIA DRIVER
|
||||
M: Jean-Christophe Trotin <jean-christophe.trotin@st.com>
|
||||
M: Jean-Christophe Trotin <jean-christophe.trotin@foss.st.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Supported
|
||||
W: https://linuxtv.org
|
||||
|
|
@ -8525,8 +8533,9 @@ F: drivers/pci/hotplug/rpaphp*
|
|||
|
||||
IBM Power SRIOV Virtual NIC Device Driver
|
||||
M: Dany Madden <drt@linux.ibm.com>
|
||||
M: Lijun Pan <ljp@linux.ibm.com>
|
||||
M: Sukadev Bhattiprolu <sukadev@linux.ibm.com>
|
||||
R: Thomas Falcon <tlfalcon@linux.ibm.com>
|
||||
R: Lijun Pan <lijunp213@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/net/ethernet/ibm/ibmvnic.*
|
||||
|
|
@ -10036,7 +10045,6 @@ F: scripts/leaking_addresses.pl
|
|||
|
||||
LED SUBSYSTEM
|
||||
M: Pavel Machek <pavel@ucw.cz>
|
||||
R: Dan Murphy <dmurphy@ti.com>
|
||||
L: linux-leds@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pavel/linux-leds.git
|
||||
|
|
@ -10912,7 +10920,6 @@ T: git git://linuxtv.org/media_tree.git
|
|||
F: drivers/media/radio/radio-maxiradio*
|
||||
|
||||
MCAN MMIO DEVICE DRIVER
|
||||
M: Dan Murphy <dmurphy@ti.com>
|
||||
M: Pankaj Sharma <pankj.sharma@samsung.com>
|
||||
L: linux-can@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -11173,7 +11180,7 @@ T: git git://linuxtv.org/media_tree.git
|
|||
F: drivers/media/dvb-frontends/stv6111*
|
||||
|
||||
MEDIA DRIVERS FOR STM32 - DCMI
|
||||
M: Hugues Fruchet <hugues.fruchet@st.com>
|
||||
M: Hugues Fruchet <hugues.fruchet@foss.st.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
S: Supported
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
|
@ -12544,7 +12551,7 @@ NETWORKING [MPTCP]
|
|||
M: Mat Martineau <mathew.j.martineau@linux.intel.com>
|
||||
M: Matthieu Baerts <matthieu.baerts@tessares.net>
|
||||
L: netdev@vger.kernel.org
|
||||
L: mptcp@lists.01.org
|
||||
L: mptcp@lists.linux.dev
|
||||
S: Maintained
|
||||
W: https://github.com/multipath-tcp/mptcp_net-next/wiki
|
||||
B: https://github.com/multipath-tcp/mptcp_net-next/issues
|
||||
|
|
@ -14715,15 +14722,11 @@ F: drivers/net/ethernet/qlogic/qlcnic/
|
|||
QLOGIC QLGE 10Gb ETHERNET DRIVER
|
||||
M: Manish Chopra <manishc@marvell.com>
|
||||
M: GR-Linux-NIC-Dev@marvell.com
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/staging/qlge/
|
||||
|
||||
QLOGIC QLGE 10Gb ETHERNET DRIVER
|
||||
M: Coiby Xu <coiby.xu@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Supported
|
||||
F: Documentation/networking/device_drivers/qlogic/qlge.rst
|
||||
F: drivers/staging/qlge/
|
||||
|
||||
QM1D1B0004 MEDIA DRIVER
|
||||
M: Akihiro Tsukada <tskd08@gmail.com>
|
||||
|
|
@ -14863,6 +14866,14 @@ L: linux-arm-msm@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/iommu/arm/arm-smmu/qcom_iommu.c
|
||||
|
||||
QUALCOMM IPC ROUTER (QRTR) DRIVER
|
||||
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
L: linux-arm-msm@vger.kernel.org
|
||||
S: Maintained
|
||||
F: include/trace/events/qrtr.h
|
||||
F: include/uapi/linux/qrtr.h
|
||||
F: net/qrtr/
|
||||
|
||||
QUALCOMM IPCC MAILBOX DRIVER
|
||||
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
L: linux-arm-msm@vger.kernel.org
|
||||
|
|
@ -15212,6 +15223,7 @@ F: fs/reiserfs/
|
|||
REMOTE PROCESSOR (REMOTEPROC) SUBSYSTEM
|
||||
M: Ohad Ben-Cohen <ohad@wizery.com>
|
||||
M: Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
M: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
L: linux-remoteproc@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc.git rproc-next
|
||||
|
|
@ -15225,6 +15237,7 @@ F: include/linux/remoteproc/
|
|||
REMOTE PROCESSOR MESSAGING (RPMSG) SUBSYSTEM
|
||||
M: Ohad Ben-Cohen <ohad@wizery.com>
|
||||
M: Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
M: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
L: linux-remoteproc@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc.git rpmsg-next
|
||||
|
|
@ -15641,8 +15654,8 @@ F: Documentation/s390/pci.rst
|
|||
|
||||
S390 VFIO AP DRIVER
|
||||
M: Tony Krowiak <akrowiak@linux.ibm.com>
|
||||
M: Pierre Morel <pmorel@linux.ibm.com>
|
||||
M: Halil Pasic <pasic@linux.ibm.com>
|
||||
M: Jason Herne <jjherne@linux.ibm.com>
|
||||
L: linux-s390@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.ibm.com/developerworks/linux/linux390/
|
||||
|
|
@ -15654,6 +15667,7 @@ F: drivers/s390/crypto/vfio_ap_private.h
|
|||
S390 VFIO-CCW DRIVER
|
||||
M: Cornelia Huck <cohuck@redhat.com>
|
||||
M: Eric Farman <farman@linux.ibm.com>
|
||||
M: Matthew Rosato <mjrosato@linux.ibm.com>
|
||||
R: Halil Pasic <pasic@linux.ibm.com>
|
||||
L: linux-s390@vger.kernel.org
|
||||
L: kvm@vger.kernel.org
|
||||
|
|
@ -15664,6 +15678,7 @@ F: include/uapi/linux/vfio_ccw.h
|
|||
|
||||
S390 VFIO-PCI DRIVER
|
||||
M: Matthew Rosato <mjrosato@linux.ibm.com>
|
||||
M: Eric Farman <farman@linux.ibm.com>
|
||||
L: linux-s390@vger.kernel.org
|
||||
L: kvm@vger.kernel.org
|
||||
S: Supported
|
||||
|
|
@ -16893,8 +16908,10 @@ F: tools/spi/
|
|||
|
||||
SPIDERNET NETWORK DRIVER for CELL
|
||||
M: Ishizaki Kou <kou.ishizaki@toshiba.co.jp>
|
||||
M: Geoff Levand <geoff@infradead.org>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Maintained
|
||||
F: Documentation/networking/device_drivers/ethernet/toshiba/spider_net.rst
|
||||
F: drivers/net/ethernet/toshiba/spider_net*
|
||||
|
||||
|
|
@ -16948,7 +16965,8 @@ F: Documentation/devicetree/bindings/media/i2c/st,st-mipid02.txt
|
|||
F: drivers/media/i2c/st-mipid02.c
|
||||
|
||||
ST STM32 I2C/SMBUS DRIVER
|
||||
M: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
|
||||
M: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
|
||||
M: Alain Volmat <alain.volmat@foss.st.com>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/i2c/busses/i2c-stm32*
|
||||
|
|
@ -17073,7 +17091,7 @@ F: kernel/jump_label.c
|
|||
F: kernel/static_call.c
|
||||
|
||||
STI AUDIO (ASoC) DRIVERS
|
||||
M: Arnaud Pouliquen <arnaud.pouliquen@st.com>
|
||||
M: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/sound/st,sti-asoc-card.txt
|
||||
|
|
@ -17093,15 +17111,15 @@ T: git git://linuxtv.org/media_tree.git
|
|||
F: drivers/media/usb/stk1160/
|
||||
|
||||
STM32 AUDIO (ASoC) DRIVERS
|
||||
M: Olivier Moysan <olivier.moysan@st.com>
|
||||
M: Arnaud Pouliquen <arnaud.pouliquen@st.com>
|
||||
M: Olivier Moysan <olivier.moysan@foss.st.com>
|
||||
M: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iio/adc/st,stm32-*.yaml
|
||||
F: sound/soc/stm/
|
||||
|
||||
STM32 TIMER/LPTIMER DRIVERS
|
||||
M: Fabrice Gasnier <fabrice.gasnier@st.com>
|
||||
M: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
|
||||
S: Maintained
|
||||
F: Documentation/ABI/testing/*timer-stm32
|
||||
F: Documentation/devicetree/bindings/*/*stm32-*timer*
|
||||
|
|
@ -17111,7 +17129,7 @@ F: include/linux/*/stm32-*tim*
|
|||
|
||||
STMMAC ETHERNET DRIVER
|
||||
M: Giuseppe Cavallaro <peppe.cavallaro@st.com>
|
||||
M: Alexandre Torgue <alexandre.torgue@st.com>
|
||||
M: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
||||
M: Jose Abreu <joabreu@synopsys.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
|
|
@ -17853,7 +17871,6 @@ S: Maintained
|
|||
F: drivers/thermal/ti-soc-thermal/
|
||||
|
||||
TI BQ27XXX POWER SUPPLY DRIVER
|
||||
R: Dan Murphy <dmurphy@ti.com>
|
||||
F: drivers/power/supply/bq27xxx_battery.c
|
||||
F: drivers/power/supply/bq27xxx_battery_i2c.c
|
||||
F: include/linux/power/bq27xxx_battery.h
|
||||
|
|
@ -17988,7 +18005,6 @@ S: Odd Fixes
|
|||
F: sound/soc/codecs/tas571x*
|
||||
|
||||
TI TCAN4X5X DEVICE DRIVER
|
||||
M: Dan Murphy <dmurphy@ti.com>
|
||||
L: linux-can@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/can/tcan4x5x.txt
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -2,7 +2,7 @@
|
|||
VERSION = 5
|
||||
PATCHLEVEL = 12
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION =
|
||||
NAME = Frozen Wasteland
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
memory {
|
||||
device_type = "memory";
|
||||
/* CONFIG_LINUX_RAM_BASE needs to match low mem start */
|
||||
reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MB low mem */
|
||||
reg = <0x0 0x80000000 0x0 0x40000000 /* 1 GB low mem */
|
||||
0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -96,7 +96,7 @@ stash_usr_regs(struct rt_sigframe __user *sf, struct pt_regs *regs,
|
|||
sizeof(sf->uc.uc_mcontext.regs.scratch));
|
||||
err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(sigset_t));
|
||||
|
||||
return err;
|
||||
return err ? -EFAULT : 0;
|
||||
}
|
||||
|
||||
static int restore_usr_regs(struct pt_regs *regs, struct rt_sigframe __user *sf)
|
||||
|
|
@ -110,7 +110,7 @@ static int restore_usr_regs(struct pt_regs *regs, struct rt_sigframe __user *sf)
|
|||
&(sf->uc.uc_mcontext.regs.scratch),
|
||||
sizeof(sf->uc.uc_mcontext.regs.scratch));
|
||||
if (err)
|
||||
return err;
|
||||
return -EFAULT;
|
||||
|
||||
set_current_blocked(&set);
|
||||
regs->bta = uregs.scratch.bta;
|
||||
|
|
|
|||
|
|
@ -187,25 +187,26 @@ static void init_unwind_table(struct unwind_table *table, const char *name,
|
|||
const void *table_start, unsigned long table_size,
|
||||
const u8 *header_start, unsigned long header_size)
|
||||
{
|
||||
const u8 *ptr = header_start + 4;
|
||||
const u8 *end = header_start + header_size;
|
||||
|
||||
table->core.pc = (unsigned long)core_start;
|
||||
table->core.range = core_size;
|
||||
table->init.pc = (unsigned long)init_start;
|
||||
table->init.range = init_size;
|
||||
table->address = table_start;
|
||||
table->size = table_size;
|
||||
|
||||
/* See if the linker provided table looks valid. */
|
||||
if (header_size <= 4
|
||||
|| header_start[0] != 1
|
||||
|| (void *)read_pointer(&ptr, end, header_start[1]) != table_start
|
||||
|| header_start[2] == DW_EH_PE_omit
|
||||
|| read_pointer(&ptr, end, header_start[2]) <= 0
|
||||
|| header_start[3] == DW_EH_PE_omit)
|
||||
header_start = NULL;
|
||||
|
||||
/* To avoid the pointer addition with NULL pointer.*/
|
||||
if (header_start != NULL) {
|
||||
const u8 *ptr = header_start + 4;
|
||||
const u8 *end = header_start + header_size;
|
||||
/* See if the linker provided table looks valid. */
|
||||
if (header_size <= 4
|
||||
|| header_start[0] != 1
|
||||
|| (void *)read_pointer(&ptr, end, header_start[1])
|
||||
!= table_start
|
||||
|| header_start[2] == DW_EH_PE_omit
|
||||
|| read_pointer(&ptr, end, header_start[2]) <= 0
|
||||
|| header_start[3] == DW_EH_PE_omit)
|
||||
header_start = NULL;
|
||||
}
|
||||
table->hdrsz = header_size;
|
||||
smp_wmb();
|
||||
table->header = header_start;
|
||||
|
|
|
|||
|
|
@ -1293,9 +1293,15 @@ config KASAN_SHADOW_OFFSET
|
|||
|
||||
config NR_CPUS
|
||||
int "Maximum number of CPUs (2-32)"
|
||||
range 2 32
|
||||
range 2 16 if DEBUG_KMAP_LOCAL
|
||||
range 2 32 if !DEBUG_KMAP_LOCAL
|
||||
depends on SMP
|
||||
default "4"
|
||||
help
|
||||
The maximum number of CPUs that the kernel can support.
|
||||
Up to 32 CPUs can be supported, or up to 16 if kmap_local()
|
||||
debugging is enabled, which uses half of the per-CPU fixmap
|
||||
slots as guard regions.
|
||||
|
||||
config HOTPLUG_CPU
|
||||
bool "Support for hot-pluggable CPUs"
|
||||
|
|
|
|||
|
|
@ -40,6 +40,9 @@
|
|||
ethernet1 = &cpsw_emac1;
|
||||
spi0 = &spi0;
|
||||
spi1 = &spi1;
|
||||
mmc0 = &mmc1;
|
||||
mmc1 = &mmc2;
|
||||
mmc2 = &mmc3;
|
||||
};
|
||||
|
||||
cpus {
|
||||
|
|
|
|||
|
|
@ -32,7 +32,8 @@
|
|||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
|
||||
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
|
||||
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
|
||||
|
|
@ -389,6 +390,7 @@
|
|||
phy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
marvell,reg-init = <3 18 0 0x4985>;
|
||||
|
||||
/* irq is connected to &pcawan pin 7 */
|
||||
};
|
||||
|
|
|
|||
|
|
@ -334,14 +334,6 @@
|
|||
};
|
||||
|
||||
&pinctrl {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xFFFFFE7F 0xC0E0397F 0xEF00019D /* pioA */
|
||||
0x03FFFFFF 0x02FC7E68 0x00780000 /* pioB */
|
||||
0xffffffff 0xF83FFFFF 0xB800F3FC /* pioC */
|
||||
0x003FFFFF 0x003F8000 0x00000000 /* pioD */
|
||||
>;
|
||||
|
||||
adc {
|
||||
pinctrl_adc_default: adc_default {
|
||||
atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
|
|
|
|||
|
|
@ -84,8 +84,8 @@
|
|||
pinctrl-0 = <&pinctrl_macb0_default>;
|
||||
phy-mode = "rmii";
|
||||
|
||||
ethernet-phy@0 {
|
||||
reg = <0x0>;
|
||||
ethernet-phy@7 {
|
||||
reg = <0x7>;
|
||||
interrupt-parent = <&pioA>;
|
||||
interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "default";
|
||||
|
|
|
|||
|
|
@ -308,14 +308,6 @@
|
|||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
bsc_intr: interrupt-controller@7ef00040 {
|
||||
compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
|
||||
reg = <0x7ef00040 0x30>;
|
||||
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
aon_intr: interrupt-controller@7ef00100 {
|
||||
compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
|
||||
reg = <0x7ef00100 0x30>;
|
||||
|
|
@ -362,8 +354,6 @@
|
|||
reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
|
||||
reg-names = "bsc", "auto-i2c";
|
||||
clock-frequency = <97500>;
|
||||
interrupt-parent = <&bsc_intr>;
|
||||
interrupts = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -405,8 +395,6 @@
|
|||
reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>;
|
||||
reg-names = "bsc", "auto-i2c";
|
||||
clock-frequency = <97500>;
|
||||
interrupt-parent = <&bsc_intr>;
|
||||
interrupts = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -433,6 +433,7 @@
|
|||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
vmmc-supply = <&vdd_sd1_reg>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -442,5 +443,6 @@
|
|||
&pinctrl_usdhc3_cdwp>;
|
||||
cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
|
||||
vmmc-supply = <&vdd_sd0_reg>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -210,9 +210,6 @@
|
|||
micrel,led-mode = <1>;
|
||||
clocks = <&clks IMX6UL_CLK_ENET_REF>;
|
||||
clock-names = "rmii-ref";
|
||||
reset-gpios = <&gpio_spi 1 GPIO_ACTIVE_LOW>;
|
||||
reset-assert-us = <10000>;
|
||||
reset-deassert-us = <100>;
|
||||
|
||||
};
|
||||
|
||||
|
|
@ -222,9 +219,6 @@
|
|||
micrel,led-mode = <1>;
|
||||
clocks = <&clks IMX6UL_CLK_ENET2_REF>;
|
||||
clock-names = "rmii-ref";
|
||||
reset-gpios = <&gpio_spi 2 GPIO_ACTIVE_LOW>;
|
||||
reset-assert-us = <10000>;
|
||||
reset-deassert-us = <100>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -243,6 +237,22 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio_spi {
|
||||
eth0-phy-hog {
|
||||
gpio-hog;
|
||||
gpios = <1 GPIO_ACTIVE_HIGH>;
|
||||
output-high;
|
||||
line-name = "eth0-phy";
|
||||
};
|
||||
|
||||
eth1-phy-hog {
|
||||
gpio-hog;
|
||||
gpios = <2 GPIO_ACTIVE_HIGH>;
|
||||
output-high;
|
||||
line-name = "eth1-phy";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
|
|
|
|||
|
|
@ -14,5 +14,6 @@
|
|||
};
|
||||
|
||||
&gpmi {
|
||||
fsl,use-minimum-ecc;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -24,6 +24,9 @@
|
|||
i2c0 = &i2c1;
|
||||
i2c1 = &i2c2;
|
||||
i2c2 = &i2c3;
|
||||
mmc0 = &mmc1;
|
||||
mmc1 = &mmc2;
|
||||
mmc2 = &mmc3;
|
||||
serial0 = &uart1;
|
||||
serial1 = &uart2;
|
||||
serial2 = &uart3;
|
||||
|
|
|
|||
|
|
@ -22,6 +22,11 @@
|
|||
i2c1 = &i2c2;
|
||||
i2c2 = &i2c3;
|
||||
i2c3 = &i2c4;
|
||||
mmc0 = &mmc1;
|
||||
mmc1 = &mmc2;
|
||||
mmc2 = &mmc3;
|
||||
mmc3 = &mmc4;
|
||||
mmc4 = &mmc5;
|
||||
serial0 = &uart1;
|
||||
serial1 = &uart2;
|
||||
serial2 = &uart3;
|
||||
|
|
|
|||
|
|
@ -770,14 +770,6 @@
|
|||
ti,max-div = <2>;
|
||||
};
|
||||
|
||||
sha2md5_fck: sha2md5_fck@15c8 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&l3_div_ck>;
|
||||
ti,bit-shift = <1>;
|
||||
reg = <0x15c8>;
|
||||
};
|
||||
|
||||
usb_phy_cm_clk32k: usb_phy_cm_clk32k@640 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
|
|
|
|||
|
|
@ -25,6 +25,11 @@
|
|||
i2c2 = &i2c3;
|
||||
i2c3 = &i2c4;
|
||||
i2c4 = &i2c5;
|
||||
mmc0 = &mmc1;
|
||||
mmc1 = &mmc2;
|
||||
mmc2 = &mmc3;
|
||||
mmc3 = &mmc4;
|
||||
mmc4 = &mmc5;
|
||||
serial0 = &uart1;
|
||||
serial1 = &uart2;
|
||||
serial2 = &uart3;
|
||||
|
|
|
|||
|
|
@ -606,6 +606,15 @@
|
|||
compatible = "microchip,sam9x60-pinctrl", "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff400 0xfffff400 0x800>;
|
||||
|
||||
/* mux-mask corresponding to sam9x60 SoC in TFBGA228L package */
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe03fff 0xef00019d /* pioA */
|
||||
0x03ffffff 0x02fc7e7f 0x00780000 /* pioB */
|
||||
0xffffffff 0xffffffff 0xf83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "microchip,sam9x60-gpio", "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
|
|
|||
|
|
@ -15,14 +15,14 @@
|
|||
#include <asm/mach-types.h>
|
||||
|
||||
/* cats host-specific stuff */
|
||||
static int irqmap_cats[] __initdata = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 };
|
||||
static int irqmap_cats[] = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 };
|
||||
|
||||
static u8 cats_no_swizzle(struct pci_dev *dev, u8 *pin)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
static int cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
if (dev->irq >= 255)
|
||||
return -1; /* not a valid interrupt. */
|
||||
|
|
|
|||
|
|
@ -14,9 +14,9 @@
|
|||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
static int irqmap_ebsa285[] __initdata = { IRQ_IN3, IRQ_IN1, IRQ_IN0, IRQ_PCI };
|
||||
static int irqmap_ebsa285[] = { IRQ_IN3, IRQ_IN1, IRQ_IN0, IRQ_PCI };
|
||||
|
||||
static int __init ebsa285_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
static int ebsa285_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
if (dev->vendor == PCI_VENDOR_ID_CONTAQ &&
|
||||
dev->device == PCI_DEVICE_ID_CONTAQ_82C693)
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@
|
|||
* We now use the slot ID instead of the device identifiers to select
|
||||
* which interrupt is routed where.
|
||||
*/
|
||||
static int __init netwinder_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
static int netwinder_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
switch (slot) {
|
||||
case 0: /* host bridge */
|
||||
|
|
|
|||
|
|
@ -14,13 +14,12 @@
|
|||
#include <asm/mach/pci.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
static int irqmap_personal_server[] __initdata = {
|
||||
static int irqmap_personal_server[] = {
|
||||
IRQ_IN0, IRQ_IN1, IRQ_IN2, IRQ_IN3, 0, 0, 0,
|
||||
IRQ_DOORBELLHOST, IRQ_DMA1, IRQ_DMA2, IRQ_PCI
|
||||
};
|
||||
|
||||
static int __init personal_server_map_irq(const struct pci_dev *dev, u8 slot,
|
||||
u8 pin)
|
||||
static int personal_server_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
unsigned char line;
|
||||
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/irqchip.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
|
|
@ -162,7 +163,7 @@ static void __exception_irq_entry avic_handle_irq(struct pt_regs *regs)
|
|||
* interrupts. It registers the interrupt enable and disable functions
|
||||
* to the kernel for each interrupt source.
|
||||
*/
|
||||
void __init mxc_init_irq(void __iomem *irqbase)
|
||||
static void __init mxc_init_irq(void __iomem *irqbase)
|
||||
{
|
||||
struct device_node *np;
|
||||
int irq_base;
|
||||
|
|
@ -220,3 +221,16 @@ void __init mxc_init_irq(void __iomem *irqbase)
|
|||
|
||||
printk(KERN_INFO "MXC IRQ initialized\n");
|
||||
}
|
||||
|
||||
static int __init imx_avic_init(struct device_node *node,
|
||||
struct device_node *parent)
|
||||
{
|
||||
void __iomem *avic_base;
|
||||
|
||||
avic_base = of_iomap(node, 0);
|
||||
BUG_ON(!avic_base);
|
||||
mxc_init_irq(avic_base);
|
||||
return 0;
|
||||
}
|
||||
|
||||
IRQCHIP_DECLARE(imx_avic, "fsl,avic", imx_avic_init);
|
||||
|
|
|
|||
|
|
@ -22,7 +22,6 @@ void mx35_map_io(void);
|
|||
void imx21_init_early(void);
|
||||
void imx31_init_early(void);
|
||||
void imx35_init_early(void);
|
||||
void mxc_init_irq(void __iomem *);
|
||||
void mx31_init_irq(void);
|
||||
void mx35_init_irq(void);
|
||||
void mxc_set_cpu_type(unsigned int type);
|
||||
|
|
|
|||
|
|
@ -17,16 +17,6 @@ static void __init imx1_init_early(void)
|
|||
mxc_set_cpu_type(MXC_CPU_MX1);
|
||||
}
|
||||
|
||||
static void __init imx1_init_irq(void)
|
||||
{
|
||||
void __iomem *avic_addr;
|
||||
|
||||
avic_addr = ioremap(MX1_AVIC_ADDR, SZ_4K);
|
||||
WARN_ON(!avic_addr);
|
||||
|
||||
mxc_init_irq(avic_addr);
|
||||
}
|
||||
|
||||
static const char * const imx1_dt_board_compat[] __initconst = {
|
||||
"fsl,imx1",
|
||||
NULL
|
||||
|
|
@ -34,7 +24,6 @@ static const char * const imx1_dt_board_compat[] __initconst = {
|
|||
|
||||
DT_MACHINE_START(IMX1_DT, "Freescale i.MX1 (Device Tree Support)")
|
||||
.init_early = imx1_init_early,
|
||||
.init_irq = imx1_init_irq,
|
||||
.dt_compat = imx1_dt_board_compat,
|
||||
.restart = mxc_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -22,17 +22,6 @@ static void __init imx25_dt_init(void)
|
|||
imx_aips_allow_unprivileged_access("fsl,imx25-aips");
|
||||
}
|
||||
|
||||
static void __init mx25_init_irq(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
void __iomem *avic_base;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,avic");
|
||||
avic_base = of_iomap(np, 0);
|
||||
BUG_ON(!avic_base);
|
||||
mxc_init_irq(avic_base);
|
||||
}
|
||||
|
||||
static const char * const imx25_dt_board_compat[] __initconst = {
|
||||
"fsl,imx25",
|
||||
NULL
|
||||
|
|
@ -42,6 +31,5 @@ DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
|
|||
.init_early = imx25_init_early,
|
||||
.init_machine = imx25_dt_init,
|
||||
.init_late = imx25_pm_init,
|
||||
.init_irq = mx25_init_irq,
|
||||
.dt_compat = imx25_dt_board_compat,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -56,17 +56,6 @@ static void __init imx27_init_early(void)
|
|||
mxc_set_cpu_type(MXC_CPU_MX27);
|
||||
}
|
||||
|
||||
static void __init mx27_init_irq(void)
|
||||
{
|
||||
void __iomem *avic_base;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,avic");
|
||||
avic_base = of_iomap(np, 0);
|
||||
BUG_ON(!avic_base);
|
||||
mxc_init_irq(avic_base);
|
||||
}
|
||||
|
||||
static const char * const imx27_dt_board_compat[] __initconst = {
|
||||
"fsl,imx27",
|
||||
NULL
|
||||
|
|
@ -75,7 +64,6 @@ static const char * const imx27_dt_board_compat[] __initconst = {
|
|||
DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
|
||||
.map_io = mx27_map_io,
|
||||
.init_early = imx27_init_early,
|
||||
.init_irq = mx27_init_irq,
|
||||
.init_late = imx27_pm_init,
|
||||
.dt_compat = imx27_dt_board_compat,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -14,6 +14,5 @@ static const char * const imx31_dt_board_compat[] __initconst = {
|
|||
DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)")
|
||||
.map_io = mx31_map_io,
|
||||
.init_early = imx31_init_early,
|
||||
.init_irq = mx31_init_irq,
|
||||
.dt_compat = imx31_dt_board_compat,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -27,6 +27,5 @@ DT_MACHINE_START(IMX35_DT, "Freescale i.MX35 (Device Tree Support)")
|
|||
.l2c_aux_mask = ~0,
|
||||
.map_io = mx35_map_io,
|
||||
.init_early = imx35_init_early,
|
||||
.init_irq = mx35_init_irq,
|
||||
.dt_compat = imx35_dt_board_compat,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -109,18 +109,6 @@ void __init imx31_init_early(void)
|
|||
mx3_ccm_base = of_iomap(np, 0);
|
||||
BUG_ON(!mx3_ccm_base);
|
||||
}
|
||||
|
||||
void __init mx31_init_irq(void)
|
||||
{
|
||||
void __iomem *avic_base;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx31-avic");
|
||||
avic_base = of_iomap(np, 0);
|
||||
BUG_ON(!avic_base);
|
||||
|
||||
mxc_init_irq(avic_base);
|
||||
}
|
||||
#endif /* ifdef CONFIG_SOC_IMX31 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX35
|
||||
|
|
@ -158,16 +146,4 @@ void __init imx35_init_early(void)
|
|||
mx3_ccm_base = of_iomap(np, 0);
|
||||
BUG_ON(!mx3_ccm_base);
|
||||
}
|
||||
|
||||
void __init mx35_init_irq(void)
|
||||
{
|
||||
void __iomem *avic_base;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx35-avic");
|
||||
avic_base = of_iomap(np, 0);
|
||||
BUG_ON(!avic_base);
|
||||
|
||||
mxc_init_irq(avic_base);
|
||||
}
|
||||
#endif /* ifdef CONFIG_SOC_IMX35 */
|
||||
|
|
|
|||
|
|
@ -65,7 +65,7 @@ static void __init keystone_init(void)
|
|||
static long long __init keystone_pv_fixup(void)
|
||||
{
|
||||
long long offset;
|
||||
phys_addr_t mem_start, mem_end;
|
||||
u64 mem_start, mem_end;
|
||||
|
||||
mem_start = memblock_start_of_DRAM();
|
||||
mem_end = memblock_end_of_DRAM();
|
||||
|
|
@ -78,7 +78,7 @@ static long long __init keystone_pv_fixup(void)
|
|||
if (mem_start < KEYSTONE_HIGH_PHYS_START ||
|
||||
mem_end > KEYSTONE_HIGH_PHYS_END) {
|
||||
pr_crit("Invalid address space for memory (%08llx-%08llx)\n",
|
||||
(u64)mem_start, (u64)mem_end);
|
||||
mem_start, mem_end);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/platform_data/gpio-omap.h>
|
||||
|
||||
#include <asm/assembler.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include "ams-delta-fiq.h"
|
||||
#include "board-ams-delta.h"
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ static void __init __maybe_unused omap_generic_init(void)
|
|||
}
|
||||
|
||||
/* Clocks are needed early, see drivers/clocksource for the rest */
|
||||
void __init __maybe_unused omap_init_time_of(void)
|
||||
static void __init __maybe_unused omap_init_time_of(void)
|
||||
{
|
||||
omap_clk_init();
|
||||
timer_probe();
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/arm-smccc.h>
|
||||
#include <linux/cpu_pm.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
|
|
@ -20,6 +21,7 @@
|
|||
|
||||
#include "common.h"
|
||||
#include "omap-secure.h"
|
||||
#include "soc.h"
|
||||
|
||||
static phys_addr_t omap_secure_memblock_base;
|
||||
|
||||
|
|
@ -213,3 +215,40 @@ void __init omap_secure_init(void)
|
|||
{
|
||||
omap_optee_init_check();
|
||||
}
|
||||
|
||||
/*
|
||||
* Dummy dispatcher call after core OSWR and MPU off. Updates the ROM return
|
||||
* address after MMU has been re-enabled after CPU1 has been woken up again.
|
||||
* Otherwise the ROM code will attempt to use the earlier physical return
|
||||
* address that got set with MMU off when waking up CPU1. Only used on secure
|
||||
* devices.
|
||||
*/
|
||||
static int cpu_notifier(struct notifier_block *nb, unsigned long cmd, void *v)
|
||||
{
|
||||
switch (cmd) {
|
||||
case CPU_CLUSTER_PM_EXIT:
|
||||
omap_secure_dispatcher(OMAP4_PPA_SERVICE_0,
|
||||
FLAG_START_CRITICAL,
|
||||
0, 0, 0, 0, 0);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
||||
static struct notifier_block secure_notifier_block = {
|
||||
.notifier_call = cpu_notifier,
|
||||
};
|
||||
|
||||
static int __init secure_pm_init(void)
|
||||
{
|
||||
if (omap_type() == OMAP2_DEVICE_TYPE_GP || !soc_is_omap44xx())
|
||||
return 0;
|
||||
|
||||
cpu_pm_register_notifier(&secure_notifier_block);
|
||||
|
||||
return 0;
|
||||
}
|
||||
omap_arch_initcall(secure_pm_init);
|
||||
|
|
|
|||
|
|
@ -50,6 +50,7 @@
|
|||
#define OMAP5_DRA7_MON_SET_ACR_INDEX 0x107
|
||||
|
||||
/* Secure PPA(Primary Protected Application) APIs */
|
||||
#define OMAP4_PPA_SERVICE_0 0x21
|
||||
#define OMAP4_PPA_L2_POR_INDEX 0x23
|
||||
#define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25
|
||||
|
||||
|
|
|
|||
|
|
@ -246,10 +246,10 @@ int __init omap4_cpcap_init(void)
|
|||
omap_voltage_register_pmic(voltdm, &omap443x_max8952_mpu);
|
||||
|
||||
if (of_machine_is_compatible("motorola,droid-bionic")) {
|
||||
voltdm = voltdm_lookup("mpu");
|
||||
voltdm = voltdm_lookup("core");
|
||||
omap_voltage_register_pmic(voltdm, &omap_cpcap_core);
|
||||
|
||||
voltdm = voltdm_lookup("mpu");
|
||||
voltdm = voltdm_lookup("iva");
|
||||
omap_voltage_register_pmic(voltdm, &omap_cpcap_iva);
|
||||
} else {
|
||||
voltdm = voltdm_lookup("core");
|
||||
|
|
|
|||
|
|
@ -88,34 +88,26 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
|
|||
|
||||
extern struct omap_sr_data omap_sr_pdata[];
|
||||
|
||||
static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
|
||||
static int __init sr_init_by_name(const char *name, const char *voltdm)
|
||||
{
|
||||
struct omap_sr_data *sr_data = NULL;
|
||||
struct omap_volt_data *volt_data;
|
||||
struct omap_smartreflex_dev_attr *sr_dev_attr;
|
||||
static int i;
|
||||
|
||||
if (!strncmp(oh->name, "smartreflex_mpu_iva", 20) ||
|
||||
!strncmp(oh->name, "smartreflex_mpu", 16))
|
||||
if (!strncmp(name, "smartreflex_mpu_iva", 20) ||
|
||||
!strncmp(name, "smartreflex_mpu", 16))
|
||||
sr_data = &omap_sr_pdata[OMAP_SR_MPU];
|
||||
else if (!strncmp(oh->name, "smartreflex_core", 17))
|
||||
else if (!strncmp(name, "smartreflex_core", 17))
|
||||
sr_data = &omap_sr_pdata[OMAP_SR_CORE];
|
||||
else if (!strncmp(oh->name, "smartreflex_iva", 16))
|
||||
else if (!strncmp(name, "smartreflex_iva", 16))
|
||||
sr_data = &omap_sr_pdata[OMAP_SR_IVA];
|
||||
|
||||
if (!sr_data) {
|
||||
pr_err("%s: Unknown instance %s\n", __func__, oh->name);
|
||||
pr_err("%s: Unknown instance %s\n", __func__, name);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
|
||||
if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
|
||||
pr_err("%s: No voltage domain specified for %s. Cannot initialize\n",
|
||||
__func__, oh->name);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
sr_data->name = oh->name;
|
||||
sr_data->name = name;
|
||||
if (cpu_is_omap343x())
|
||||
sr_data->ip_type = 1;
|
||||
else
|
||||
|
|
@ -136,10 +128,10 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
|
|||
}
|
||||
}
|
||||
|
||||
sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
|
||||
sr_data->voltdm = voltdm_lookup(voltdm);
|
||||
if (!sr_data->voltdm) {
|
||||
pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
|
||||
__func__, sr_dev_attr->sensor_voltdm_name);
|
||||
__func__, voltdm);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
|
|
@ -160,6 +152,20 @@ exit:
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
|
||||
{
|
||||
struct omap_smartreflex_dev_attr *sr_dev_attr;
|
||||
|
||||
sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
|
||||
if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
|
||||
pr_err("%s: No voltage domain specified for %s. Cannot initialize\n",
|
||||
__func__, oh->name);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return sr_init_by_name(oh->name, sr_dev_attr->sensor_voltdm_name);
|
||||
}
|
||||
|
||||
/*
|
||||
* API to be called from board files to enable smartreflex
|
||||
* autocompensation at init.
|
||||
|
|
@ -169,7 +175,42 @@ void __init omap_enable_smartreflex_on_init(void)
|
|||
sr_enable_on_init = true;
|
||||
}
|
||||
|
||||
static const char * const omap4_sr_instances[] = {
|
||||
"mpu",
|
||||
"iva",
|
||||
"core",
|
||||
};
|
||||
|
||||
static const char * const dra7_sr_instances[] = {
|
||||
"mpu",
|
||||
"core",
|
||||
};
|
||||
|
||||
int __init omap_devinit_smartreflex(void)
|
||||
{
|
||||
const char * const *sr_inst = NULL;
|
||||
int i, nr_sr = 0;
|
||||
|
||||
if (soc_is_omap44xx()) {
|
||||
sr_inst = omap4_sr_instances;
|
||||
nr_sr = ARRAY_SIZE(omap4_sr_instances);
|
||||
|
||||
} else if (soc_is_dra7xx()) {
|
||||
sr_inst = dra7_sr_instances;
|
||||
nr_sr = ARRAY_SIZE(dra7_sr_instances);
|
||||
}
|
||||
|
||||
if (nr_sr) {
|
||||
const char *name, *voltdm;
|
||||
|
||||
for (i = 0; i < nr_sr; i++) {
|
||||
name = kasprintf(GFP_KERNEL, "smartreflex_%s", sr_inst[i]);
|
||||
voltdm = sr_inst[i];
|
||||
sr_init_by_name(name, voltdm);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -502,16 +502,20 @@ static inline void mainstone_init_keypad(void) {}
|
|||
#endif
|
||||
|
||||
static int mst_pcmcia0_irqs[11] = {
|
||||
[0 ... 10] = -1,
|
||||
[0 ... 4] = -1,
|
||||
[5] = MAINSTONE_S0_CD_IRQ,
|
||||
[6 ... 7] = -1,
|
||||
[8] = MAINSTONE_S0_STSCHG_IRQ,
|
||||
[9] = -1,
|
||||
[10] = MAINSTONE_S0_IRQ,
|
||||
};
|
||||
|
||||
static int mst_pcmcia1_irqs[11] = {
|
||||
[0 ... 10] = -1,
|
||||
[0 ... 4] = -1,
|
||||
[5] = MAINSTONE_S1_CD_IRQ,
|
||||
[6 ... 7] = -1,
|
||||
[8] = MAINSTONE_S1_STSCHG_IRQ,
|
||||
[9] = -1,
|
||||
[10] = MAINSTONE_S1_IRQ,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -387,8 +387,7 @@ void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
|
|||
pte_t *pte = pte_offset_fixmap(pmd_off_k(vaddr), vaddr);
|
||||
|
||||
/* Make sure fixmap region does not exceed available allocation. */
|
||||
BUILD_BUG_ON(FIXADDR_START + (__end_of_fixed_addresses * PAGE_SIZE) >
|
||||
FIXADDR_END);
|
||||
BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) < FIXADDR_START);
|
||||
BUG_ON(idx >= __end_of_fixed_addresses);
|
||||
|
||||
/* we only support device mappings until pgprot_kernel has been set */
|
||||
|
|
|
|||
|
|
@ -235,6 +235,7 @@ void __init pmsav7_adjust_lowmem_bounds(void)
|
|||
phys_addr_t mem_end;
|
||||
phys_addr_t reg_start, reg_end;
|
||||
unsigned int mem_max_regions;
|
||||
bool first = true;
|
||||
int num;
|
||||
u64 i;
|
||||
|
||||
|
|
@ -263,7 +264,7 @@ void __init pmsav7_adjust_lowmem_bounds(void)
|
|||
#endif
|
||||
|
||||
for_each_mem_range(i, ®_start, ®_end) {
|
||||
if (i == 0) {
|
||||
if (first) {
|
||||
phys_addr_t phys_offset = PHYS_OFFSET;
|
||||
|
||||
/*
|
||||
|
|
@ -275,6 +276,7 @@ void __init pmsav7_adjust_lowmem_bounds(void)
|
|||
mem_start = reg_start;
|
||||
mem_end = reg_end;
|
||||
specified_mem_size = mem_end - mem_start;
|
||||
first = false;
|
||||
} else {
|
||||
/*
|
||||
* memblock auto merges contiguous blocks, remove
|
||||
|
|
|
|||
|
|
@ -95,10 +95,11 @@ void __init pmsav8_adjust_lowmem_bounds(void)
|
|||
{
|
||||
phys_addr_t mem_end;
|
||||
phys_addr_t reg_start, reg_end;
|
||||
bool first = true;
|
||||
u64 i;
|
||||
|
||||
for_each_mem_range(i, ®_start, ®_end) {
|
||||
if (i == 0) {
|
||||
if (first) {
|
||||
phys_addr_t phys_offset = PHYS_OFFSET;
|
||||
|
||||
/*
|
||||
|
|
@ -107,6 +108,7 @@ void __init pmsav8_adjust_lowmem_bounds(void)
|
|||
if (reg_start != phys_offset)
|
||||
panic("First memory bank must be contiguous from PHYS_OFFSET");
|
||||
mem_end = reg_end;
|
||||
first = false;
|
||||
} else {
|
||||
/*
|
||||
* memblock auto merges contiguous blocks, remove
|
||||
|
|
|
|||
|
|
@ -204,7 +204,7 @@ unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
|
|||
static struct undef_hook uprobes_arm_break_hook = {
|
||||
.instr_mask = 0x0fffffff,
|
||||
.instr_val = (UPROBE_SWBP_ARM_INSN & 0x0fffffff),
|
||||
.cpsr_mask = MODE_MASK,
|
||||
.cpsr_mask = (PSR_T_BIT | MODE_MASK),
|
||||
.cpsr_val = USR_MODE,
|
||||
.fn = uprobe_trap_handler,
|
||||
};
|
||||
|
|
@ -212,7 +212,7 @@ static struct undef_hook uprobes_arm_break_hook = {
|
|||
static struct undef_hook uprobes_arm_ss_hook = {
|
||||
.instr_mask = 0x0fffffff,
|
||||
.instr_val = (UPROBE_SS_ARM_INSN & 0x0fffffff),
|
||||
.cpsr_mask = MODE_MASK,
|
||||
.cpsr_mask = (PSR_T_BIT | MODE_MASK),
|
||||
.cpsr_val = USR_MODE,
|
||||
.fn = uprobe_trap_handler,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -810,6 +810,16 @@ config QCOM_FALKOR_ERRATUM_E1041
|
|||
|
||||
If unsure, say Y.
|
||||
|
||||
config NVIDIA_CARMEL_CNP_ERRATUM
|
||||
bool "NVIDIA Carmel CNP: CNP on Carmel semantically different than ARM cores"
|
||||
default y
|
||||
help
|
||||
If CNP is enabled on Carmel cores, non-sharable TLBIs on a core will not
|
||||
invalidate shared TLB entries installed by a different core, as it would
|
||||
on standard ARM cores.
|
||||
|
||||
If unsure, say Y.
|
||||
|
||||
config SOCIONEXT_SYNQUACER_PREITS
|
||||
bool "Socionext Synquacer: Workaround for GICv3 pre-ITS"
|
||||
default y
|
||||
|
|
@ -1396,10 +1406,13 @@ config ARM64_PAN
|
|||
config AS_HAS_LDAPR
|
||||
def_bool $(as-instr,.arch_extension rcpc)
|
||||
|
||||
config AS_HAS_LSE_ATOMICS
|
||||
def_bool $(as-instr,.arch_extension lse)
|
||||
|
||||
config ARM64_LSE_ATOMICS
|
||||
bool
|
||||
default ARM64_USE_LSE_ATOMICS
|
||||
depends on $(as-instr,.arch_extension lse)
|
||||
depends on AS_HAS_LSE_ATOMICS
|
||||
|
||||
config ARM64_USE_LSE_ATOMICS
|
||||
bool "Atomic instructions"
|
||||
|
|
@ -1656,6 +1669,7 @@ config ARM64_MTE
|
|||
default y
|
||||
depends on ARM64_AS_HAS_MTE && ARM64_TAGGED_ADDR_ABI
|
||||
depends on AS_HAS_ARMV8_5
|
||||
depends on AS_HAS_LSE_ATOMICS
|
||||
# Required for tag checking in the uaccess routines
|
||||
depends on ARM64_PAN
|
||||
select ARCH_USES_HIGH_VMA_FLAGS
|
||||
|
|
|
|||
|
|
@ -19,3 +19,7 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
broken-cd; /* card detect is broken on *some* boards */
|
||||
};
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@
|
|||
vmmc-supply = <®_dcdc1>;
|
||||
disable-wp;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
|
||||
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 push-pull switch */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -289,10 +289,6 @@
|
|||
vcc-pm-supply = <®_aldo1>;
|
||||
};
|
||||
|
||||
&rtc {
|
||||
clocks = <&ext_osc32k>;
|
||||
};
|
||||
|
||||
&spdif {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -995,9 +995,9 @@
|
|||
compatible = "allwinner,sun8i-a23-rsb";
|
||||
reg = <0x07083000 0x400>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&r_ccu 13>;
|
||||
clocks = <&r_ccu CLK_R_APB2_RSB>;
|
||||
clock-frequency = <3000000>;
|
||||
resets = <&r_ccu 7>;
|
||||
resets = <&r_ccu RST_R_APB2_RSB>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&r_rsb_pins>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -198,6 +198,7 @@
|
|||
ranges = <0x0 0x00 0x1700000 0x100000>;
|
||||
reg = <0x00 0x1700000 0x0 0x100000>;
|
||||
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dma-coherent;
|
||||
|
||||
sec_jr0: jr@10000 {
|
||||
compatible = "fsl,sec-v5.4-job-ring",
|
||||
|
|
|
|||
|
|
@ -348,6 +348,7 @@
|
|||
ranges = <0x0 0x00 0x1700000 0x100000>;
|
||||
reg = <0x00 0x1700000 0x0 0x100000>;
|
||||
interrupts = <0 75 0x4>;
|
||||
dma-coherent;
|
||||
|
||||
sec_jr0: jr@10000 {
|
||||
compatible = "fsl,sec-v5.4-job-ring",
|
||||
|
|
|
|||
|
|
@ -354,6 +354,7 @@
|
|||
ranges = <0x0 0x00 0x1700000 0x100000>;
|
||||
reg = <0x00 0x1700000 0x0 0x100000>;
|
||||
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dma-coherent;
|
||||
|
||||
sec_jr0: jr@10000 {
|
||||
compatible = "fsl,sec-v5.4-job-ring",
|
||||
|
|
|
|||
|
|
@ -124,7 +124,7 @@
|
|||
#define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x0A4 0x30C 0x000 0x0 0x0
|
||||
#define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x0A4 0x30C 0x000 0x5 0x0
|
||||
#define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0A8 0x310 0x000 0x0 0x0
|
||||
#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x31 0x000 0x5 0x0
|
||||
#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x310 0x000 0x5 0x0
|
||||
#define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0AC 0x314 0x000 0x0 0x0
|
||||
#define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x0AC 0x314 0x000 0x5 0x0
|
||||
#define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0B0 0x318 0x000 0x0 0x0
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@
|
|||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
pinctrl-1 = <&pinctrl_i2c2_gpio>;
|
||||
sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
|
|
|
|||
|
|
@ -67,7 +67,7 @@
|
|||
|
||||
&i2c1 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
pinctrl-1 = <&pinctrl_i2c1_gpio>;
|
||||
sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
|
|
|
|||
|
|
@ -130,7 +130,7 @@
|
|||
#define MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0x0A4 0x30C 0x000 0x0 0x0
|
||||
#define MX8MQ_IOMUXC_SD1_CMD_GPIO2_IO1 0x0A4 0x30C 0x000 0x5 0x0
|
||||
#define MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0A8 0x310 0x000 0x0 0x0
|
||||
#define MX8MQ_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x31 0x000 0x5 0x0
|
||||
#define MX8MQ_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x310 0x000 0x5 0x0
|
||||
#define MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0AC 0x314 0x000 0x0 0x0
|
||||
#define MX8MQ_IOMUXC_SD1_DATA1_GPIO2_IO3 0x0AC 0x314 0x000 0x5 0x0
|
||||
#define MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0B0 0x318 0x000 0x0 0x0
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device Tree file for CZ.NIC Turris Mox Board
|
||||
* 2019 by Marek Behun <marek.behun@nic.cz>
|
||||
* 2019 by Marek Behún <kabel@kernel.org>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -310,9 +310,11 @@
|
|||
};
|
||||
|
||||
CP11X_LABEL(sata0): sata@540000 {
|
||||
compatible = "marvell,armada-8k-ahci";
|
||||
compatible = "marvell,armada-8k-ahci",
|
||||
"generic-ahci";
|
||||
reg = <0x540000 0x30000>;
|
||||
dma-coherent;
|
||||
interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&CP11X_LABEL(clk) 1 15>,
|
||||
<&CP11X_LABEL(clk) 1 16>;
|
||||
#address-cells = <1>;
|
||||
|
|
@ -320,12 +322,10 @@
|
|||
status = "disabled";
|
||||
|
||||
sata-port@0 {
|
||||
interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
sata-port@1 {
|
||||
interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
model = "NVIDIA Jetson TX2 Developer Kit";
|
||||
compatible = "nvidia,p2771-0000", "nvidia,tegra186";
|
||||
|
||||
aconnect {
|
||||
aconnect@2900000 {
|
||||
status = "okay";
|
||||
|
||||
dma-controller@2930000 {
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@
|
|||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon console=ttyS0,115200n8";
|
||||
bootargs = "earlycon console=ttyS0,115200n8 fw_devlink=on";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -73,7 +73,7 @@
|
|||
snps,rxpbl = <8>;
|
||||
};
|
||||
|
||||
aconnect {
|
||||
aconnect@2900000 {
|
||||
compatible = "nvidia,tegra186-aconnect",
|
||||
"nvidia,tegra210-aconnect";
|
||||
clocks = <&bpmp TEGRA186_CLK_APE>,
|
||||
|
|
|
|||
|
|
@ -651,6 +651,8 @@
|
|||
reg = <0x1a>;
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <TEGRA194_MAIN_GPIO(S, 5) GPIO_ACTIVE_HIGH>;
|
||||
clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
|
||||
clock-names = "mclk";
|
||||
realtek,jd-src = <2>;
|
||||
sound-name-prefix = "CVB-RT";
|
||||
|
||||
|
|
@ -658,7 +660,6 @@
|
|||
rt5658_ep: endpoint {
|
||||
remote-endpoint = <&i2s1_dap_ep>;
|
||||
mclk-fs = <256>;
|
||||
clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -5,6 +5,10 @@
|
|||
model = "NVIDIA Jetson Xavier NX (SD-card)";
|
||||
compatible = "nvidia,p3668-0000", "nvidia,tegra194";
|
||||
|
||||
aliases {
|
||||
mmc0 = "/bus@0/mmc@3400000";
|
||||
};
|
||||
|
||||
bus@0 {
|
||||
/* SDMMC1 (SD/MMC) */
|
||||
mmc@3400000 {
|
||||
|
|
|
|||
|
|
@ -5,6 +5,10 @@
|
|||
model = "NVIDIA Jetson Xavier NX (eMMC)";
|
||||
compatible = "nvidia,p3668-0001", "nvidia,tegra194";
|
||||
|
||||
aliases {
|
||||
mmc0 = "/bus@0/mmc@3460000";
|
||||
};
|
||||
|
||||
bus@0 {
|
||||
/* SDMMC4 (eMMC) */
|
||||
mmc@3460000 {
|
||||
|
|
|
|||
|
|
@ -14,7 +14,6 @@
|
|||
i2c5 = "/bus@0/i2c@31c0000";
|
||||
i2c6 = "/bus@0/i2c@c250000";
|
||||
i2c7 = "/bus@0/i2c@31e0000";
|
||||
mmc0 = "/bus@0/mmc@3460000";
|
||||
rtc0 = "/bpmp/i2c/pmic@3c";
|
||||
rtc1 = "/bus@0/rtc@c2a0000";
|
||||
serial0 = &tcu;
|
||||
|
|
|
|||
|
|
@ -97,9 +97,9 @@
|
|||
.popsection
|
||||
.subsection 1
|
||||
663: \insn2
|
||||
664: .previous
|
||||
.org . - (664b-663b) + (662b-661b)
|
||||
664: .org . - (664b-663b) + (662b-661b)
|
||||
.org . - (662b-661b) + (664b-663b)
|
||||
.previous
|
||||
.endif
|
||||
.endm
|
||||
|
||||
|
|
@ -169,11 +169,11 @@
|
|||
*/
|
||||
.macro alternative_endif
|
||||
664:
|
||||
.org . - (664b-663b) + (662b-661b)
|
||||
.org . - (662b-661b) + (664b-663b)
|
||||
.if .Lasm_alt_mode==0
|
||||
.previous
|
||||
.endif
|
||||
.org . - (664b-663b) + (662b-661b)
|
||||
.org . - (662b-661b) + (664b-663b)
|
||||
.endm
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@ static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
|
|||
} while (--n > 0);
|
||||
|
||||
sum += ((sum >> 32) | (sum << 32));
|
||||
return csum_fold((__force u32)(sum >> 32));
|
||||
return csum_fold((__force __wsum)(sum >> 32));
|
||||
}
|
||||
#define ip_fast_csum ip_fast_csum
|
||||
|
||||
|
|
|
|||
|
|
@ -66,7 +66,8 @@
|
|||
#define ARM64_WORKAROUND_1508412 58
|
||||
#define ARM64_HAS_LDAPR 59
|
||||
#define ARM64_KVM_PROTECTED_MODE 60
|
||||
#define ARM64_WORKAROUND_NVIDIA_CARMEL_CNP 61
|
||||
|
||||
#define ARM64_NCAPS 61
|
||||
#define ARM64_NCAPS 62
|
||||
|
||||
#endif /* __ASM_CPUCAPS_H */
|
||||
|
|
|
|||
|
|
@ -278,6 +278,7 @@
|
|||
#define CPTR_EL2_DEFAULT CPTR_EL2_RES1
|
||||
|
||||
/* Hyp Debug Configuration Register bits */
|
||||
#define MDCR_EL2_TTRF (1 << 19)
|
||||
#define MDCR_EL2_TPMS (1 << 14)
|
||||
#define MDCR_EL2_E2PB_MASK (UL(0x3))
|
||||
#define MDCR_EL2_E2PB_SHIFT (UL(12))
|
||||
|
|
|
|||
|
|
@ -251,6 +251,8 @@ unsigned long get_wchan(struct task_struct *p);
|
|||
extern struct task_struct *cpu_switch_to(struct task_struct *prev,
|
||||
struct task_struct *next);
|
||||
|
||||
asmlinkage void arm64_preempt_schedule_irq(void);
|
||||
|
||||
#define task_pt_regs(p) \
|
||||
((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
|
||||
|
||||
|
|
|
|||
|
|
@ -55,6 +55,8 @@ void arch_setup_new_exec(void);
|
|||
#define arch_setup_new_exec arch_setup_new_exec
|
||||
|
||||
void arch_release_task_struct(struct task_struct *tsk);
|
||||
int arch_dup_task_struct(struct task_struct *dst,
|
||||
struct task_struct *src);
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -53,7 +53,7 @@ static inline unsigned long find_zero(unsigned long mask)
|
|||
*/
|
||||
static inline unsigned long load_unaligned_zeropad(const void *addr)
|
||||
{
|
||||
unsigned long ret, offset;
|
||||
unsigned long ret, tmp;
|
||||
|
||||
/* Load word from unaligned pointer addr */
|
||||
asm(
|
||||
|
|
@ -61,9 +61,9 @@ static inline unsigned long load_unaligned_zeropad(const void *addr)
|
|||
"2:\n"
|
||||
" .pushsection .fixup,\"ax\"\n"
|
||||
" .align 2\n"
|
||||
"3: and %1, %2, #0x7\n"
|
||||
" bic %2, %2, #0x7\n"
|
||||
" ldr %0, [%2]\n"
|
||||
"3: bic %1, %2, #0x7\n"
|
||||
" ldr %0, [%1]\n"
|
||||
" and %1, %2, #0x7\n"
|
||||
" lsl %1, %1, #0x3\n"
|
||||
#ifndef __AARCH64EB__
|
||||
" lsr %0, %0, %1\n"
|
||||
|
|
@ -73,7 +73,7 @@ static inline unsigned long load_unaligned_zeropad(const void *addr)
|
|||
" b 2b\n"
|
||||
" .popsection\n"
|
||||
_ASM_EXTABLE(1b, 3b)
|
||||
: "=&r" (ret), "=&r" (offset)
|
||||
: "=&r" (ret), "=&r" (tmp)
|
||||
: "r" (addr), "Q" (*(unsigned long *)addr));
|
||||
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -525,6 +525,14 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
|
|||
0, 0,
|
||||
1, 0),
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_NVIDIA_CARMEL_CNP_ERRATUM
|
||||
{
|
||||
/* NVIDIA Carmel */
|
||||
.desc = "NVIDIA Carmel CNP erratum",
|
||||
.capability = ARM64_WORKAROUND_NVIDIA_CARMEL_CNP,
|
||||
ERRATA_MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL),
|
||||
},
|
||||
#endif
|
||||
{
|
||||
}
|
||||
|
|
|
|||
|
|
@ -383,7 +383,6 @@ static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = {
|
|||
* of support.
|
||||
*/
|
||||
S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_EXACT, ID_AA64DFR0_PMUVER_SHIFT, 4, 0),
|
||||
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64DFR0_TRACEVER_SHIFT, 4, 0),
|
||||
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64DFR0_DEBUGVER_SHIFT, 4, 0x6),
|
||||
ARM64_FTR_END,
|
||||
};
|
||||
|
|
@ -1321,7 +1320,10 @@ has_useable_cnp(const struct arm64_cpu_capabilities *entry, int scope)
|
|||
* may share TLB entries with a CPU stuck in the crashed
|
||||
* kernel.
|
||||
*/
|
||||
if (is_kdump_kernel())
|
||||
if (is_kdump_kernel())
|
||||
return false;
|
||||
|
||||
if (cpus_have_const_cap(ARM64_WORKAROUND_NVIDIA_CARMEL_CNP))
|
||||
return false;
|
||||
|
||||
return has_cpuid_feature(entry, scope);
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue