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x86/amd-iommu: Make iommu_map_page and alloc_pte aware of page sizes
This patch changes the old map_size parameter of alloc_pte to a page_size parameter which can be used more easily to alloc a pte for intermediate page sizes. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
This commit is contained in:
parent
fcd95807fb
commit
cbb9d729f3
2 changed files with 61 additions and 20 deletions
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@ -172,6 +172,34 @@
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(~((1ULL << (12 + ((lvl) * 9))) - 1)))
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#define PM_ALIGNED(lvl, addr) ((PM_MAP_MASK(lvl) & (addr)) == (addr))
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/*
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* Returns the page table level to use for a given page size
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* Pagesize is expected to be a power-of-two
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*/
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#define PAGE_SIZE_LEVEL(pagesize) \
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((__ffs(pagesize) - 12) / 9)
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/*
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* Returns the number of ptes to use for a given page size
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* Pagesize is expected to be a power-of-two
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*/
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#define PAGE_SIZE_PTE_COUNT(pagesize) \
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(1ULL << ((__ffs(pagesize) - 12) % 9))
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/*
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* Aligns a given io-virtual address to a given page size
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* Pagesize is expected to be a power-of-two
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*/
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#define PAGE_SIZE_ALIGN(address, pagesize) \
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((address) & ~((pagesize) - 1))
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/*
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* Creates an IOMMU PTE for an address an a given pagesize
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* The PTE has no permission bits set
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* Pagesize is expected to be a power-of-two larger than 4096
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*/
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#define PAGE_SIZE_PTE(address, pagesize) \
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(((address) | ((pagesize) - 1)) & \
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(~(pagesize >> 1)) & PM_ADDR_MASK)
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#define IOMMU_PTE_P (1ULL << 0)
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#define IOMMU_PTE_TV (1ULL << 1)
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#define IOMMU_PTE_U (1ULL << 59)
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@ -730,18 +730,22 @@ static bool increase_address_space(struct protection_domain *domain,
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static u64 *alloc_pte(struct protection_domain *domain,
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unsigned long address,
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int end_lvl,
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unsigned long page_size,
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u64 **pte_page,
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gfp_t gfp)
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{
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int level, end_lvl;
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u64 *pte, *page;
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int level;
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BUG_ON(!is_power_of_2(page_size));
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while (address > PM_LEVEL_SIZE(domain->mode))
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increase_address_space(domain, gfp);
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level = domain->mode - 1;
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pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
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level = domain->mode - 1;
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pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
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address = PAGE_SIZE_ALIGN(address, page_size);
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end_lvl = PAGE_SIZE_LEVEL(page_size);
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while (level > end_lvl) {
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if (!IOMMU_PTE_PRESENT(*pte)) {
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@ -751,6 +755,10 @@ static u64 *alloc_pte(struct protection_domain *domain,
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*pte = PM_LEVEL_PDE(level, virt_to_phys(page));
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}
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/* No level skipping support yet */
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if (PM_PTE_LEVEL(*pte) != level)
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return NULL;
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level -= 1;
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pte = IOMMU_PTE_PAGE(*pte);
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@ -806,31 +814,36 @@ static int iommu_map_page(struct protection_domain *dom,
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unsigned long bus_addr,
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unsigned long phys_addr,
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int prot,
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int map_size)
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unsigned long page_size)
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{
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u64 __pte, *pte;
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bus_addr = PAGE_ALIGN(bus_addr);
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phys_addr = PAGE_ALIGN(phys_addr);
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BUG_ON(!PM_ALIGNED(map_size, bus_addr));
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BUG_ON(!PM_ALIGNED(map_size, phys_addr));
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int i, count;
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if (!(prot & IOMMU_PROT_MASK))
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return -EINVAL;
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pte = alloc_pte(dom, bus_addr, map_size, NULL, GFP_KERNEL);
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bus_addr = PAGE_ALIGN(bus_addr);
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phys_addr = PAGE_ALIGN(phys_addr);
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count = PAGE_SIZE_PTE_COUNT(page_size);
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pte = alloc_pte(dom, bus_addr, page_size, NULL, GFP_KERNEL);
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if (IOMMU_PTE_PRESENT(*pte))
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return -EBUSY;
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for (i = 0; i < count; ++i)
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if (IOMMU_PTE_PRESENT(pte[i]))
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return -EBUSY;
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if (page_size > PAGE_SIZE) {
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__pte = PAGE_SIZE_PTE(phys_addr, page_size);
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__pte |= PM_LEVEL_ENC(7) | IOMMU_PTE_P | IOMMU_PTE_FC;
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} else
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__pte = phys_addr | IOMMU_PTE_P | IOMMU_PTE_FC;
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__pte = phys_addr | IOMMU_PTE_P;
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if (prot & IOMMU_PROT_IR)
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__pte |= IOMMU_PTE_IR;
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if (prot & IOMMU_PROT_IW)
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__pte |= IOMMU_PTE_IW;
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*pte = __pte;
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for (i = 0; i < count; ++i)
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pte[i] = __pte;
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update_domain(dom);
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@ -877,7 +890,7 @@ static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
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for (addr = e->address_start; addr < e->address_end;
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addr += PAGE_SIZE) {
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ret = iommu_map_page(&dma_dom->domain, addr, addr, e->prot,
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PM_MAP_4k);
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PAGE_SIZE);
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if (ret)
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return ret;
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/*
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@ -1005,7 +1018,7 @@ static int alloc_new_range(struct dma_ops_domain *dma_dom,
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u64 *pte, *pte_page;
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for (i = 0; i < num_ptes; ++i) {
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pte = alloc_pte(&dma_dom->domain, address, PM_MAP_4k,
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pte = alloc_pte(&dma_dom->domain, address, PAGE_SIZE,
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&pte_page, gfp);
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if (!pte)
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goto out_free;
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@ -1711,7 +1724,7 @@ static u64* dma_ops_get_pte(struct dma_ops_domain *dom,
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pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)];
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if (!pte) {
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pte = alloc_pte(&dom->domain, address, PM_MAP_4k, &pte_page,
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pte = alloc_pte(&dom->domain, address, PAGE_SIZE, &pte_page,
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GFP_ATOMIC);
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aperture->pte_pages[APERTURE_PAGE_INDEX(address)] = pte_page;
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} else
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@ -2457,7 +2470,7 @@ static int amd_iommu_map_range(struct iommu_domain *dom,
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paddr &= PAGE_MASK;
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for (i = 0; i < npages; ++i) {
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ret = iommu_map_page(domain, iova, paddr, prot, PM_MAP_4k);
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ret = iommu_map_page(domain, iova, paddr, prot, PAGE_SIZE);
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if (ret)
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return ret;
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