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ARM: dts: suniv: Add Lctech Pi F1C200s devicetree 

The Lctech Pi F1C200s (also previously known under the Cherry Pi brand)
is a small development board with the Allwinner F1C200s SoC. This is the
same as the F1C100s, but with 64MB instead of 32MB co-packaged DRAM.

Alongside the obligatory micro-SD card slot, the board features a
SPI-NAND flash chip, LCD and touch connectors, and unpopulated
expansion header pins.
There are two USB Type-C ports on the board: One supplies the power, also
connects to the USB MUSB OTG controller port. The other one is connected
to an CH340 USB serial chip, which in turn is connected to UART1.

Add a devicetree file, so that the board can be used easily.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20230319212936.26649-7-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
This commit is contained in:
Andre Przywara 2023-03-19 21:29:36 +00:00 committed by Jernej Skrabec
parent 7452d4799c
commit cc1858614f
3 changed files with 83 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View File

@ -1407,6 +1407,7 @@ dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-cubieboard4.dtb
dtb-$(CONFIG_MACH_SUNIV) += \
suniv-f1c100s-licheepi-nano.dtb \
suniv-f1c200s-lctech-pi.dtb \
suniv-f1c200s-popstick-v1.1.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
tegra20-acer-a500-picasso.dtb \

6
arch/arm/boot/dts/suniv-f1c100s.dtsi
View File

@ -207,6 +207,12 @@
pins = "PE0", "PE1";
function = "uart0";
};
/omit-if-no-ref/
uart1_pa_pins: uart1-pa-pins {
pins = "PA2", "PA3";
function = "uart1";
};
};
i2c0: i2c@1c27000 {

76
arch/arm/boot/dts/suniv-f1c200s-lctech-pi.dts Normal file
View File

@ -0,0 +1,76 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2022 Arm Ltd,
* based on work:
* Copyright 2022 Icenowy Zheng <uwu@icenowy.me>
*/
/dts-v1/;
#include "suniv-f1c100s.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Lctech Pi F1C200s";
compatible = "lctech,pi-f1c200s", "allwinner,suniv-f1c200s",
"allwinner,suniv-f1c100s";
aliases {
serial0 = &uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
reg_vcc3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&mmc0 {
broken-cd;
bus-width = <4>;
disable-wp;
vmmc-supply = <&reg_vcc3v3>;
status = "okay";
};
&otg_sram {
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pc_pins>;
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <40000000>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pa_pins>;
status = "okay";
};
/*
* This is a Type-C socket, but CC1/2 are not connected, and VBUS is connected
* to Vin, which supplies the board. Host mode works (if the board is powered
* otherwise), but peripheral is probably the intention.
*/
&usb_otg {
dr_mode = "peripheral";
status = "okay";
};
&usbphy {
status = "okay";
};