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LoongArch fixes for v5.19-rc3
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commit
cc2fb31d49
5 changed files with 39 additions and 27 deletions
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@ -45,10 +45,12 @@ Name Alias Usage Preserved
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``$r23``-``$r31`` ``$s0``-``$s8`` Static registers Yes
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================= =============== =================== ============
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Note: The register ``$r21`` is reserved in the ELF psABI, but used by the Linux
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kernel for storing the percpu base address. It normally has no ABI name, but is
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called ``$u0`` in the kernel. You may also see ``$v0`` or ``$v1`` in some old code,
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however they are deprecated aliases of ``$a0`` and ``$a1`` respectively.
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.. Note::
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The register ``$r21`` is reserved in the ELF psABI, but used by the Linux
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kernel for storing the percpu base address. It normally has no ABI name,
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but is called ``$u0`` in the kernel. You may also see ``$v0`` or ``$v1``
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in some old code,however they are deprecated aliases of ``$a0`` and ``$a1``
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respectively.
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FPRs
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----
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@ -69,8 +71,9 @@ Name Alias Usage Preserved
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``$f24``-``$f31`` ``$fs0``-``$fs7`` Static registers Yes
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================= ================== =================== ============
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Note: You may see ``$fv0`` or ``$fv1`` in some old code, however they are deprecated
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aliases of ``$fa0`` and ``$fa1`` respectively.
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.. Note::
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You may see ``$fv0`` or ``$fv1`` in some old code, however they are
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deprecated aliases of ``$fa0`` and ``$fa1`` respectively.
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VRs
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----
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@ -145,12 +145,16 @@ Documentation of Loongson's LS7A chipset:
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https://github.com/loongson/LoongArch-Documentation/releases/latest/download/Loongson-7A1000-usermanual-2.00-EN.pdf (in English)
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Note: CPUINTC is CSR.ECFG/CSR.ESTAT and its interrupt controller described
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in Section 7.4 of "LoongArch Reference Manual, Vol 1"; LIOINTC is "Legacy I/O
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Interrupts" described in Section 11.1 of "Loongson 3A5000 Processor Reference
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Manual"; EIOINTC is "Extended I/O Interrupts" described in Section 11.2 of
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"Loongson 3A5000 Processor Reference Manual"; HTVECINTC is "HyperTransport
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Interrupts" described in Section 14.3 of "Loongson 3A5000 Processor Reference
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Manual"; PCH-PIC/PCH-MSI is "Interrupt Controller" described in Section 5 of
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"Loongson 7A1000 Bridge User Manual"; PCH-LPC is "LPC Interrupts" described in
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Section 24.3 of "Loongson 7A1000 Bridge User Manual".
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.. Note::
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- CPUINTC is CSR.ECFG/CSR.ESTAT and its interrupt controller described
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in Section 7.4 of "LoongArch Reference Manual, Vol 1";
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- LIOINTC is "Legacy I/OInterrupts" described in Section 11.1 of
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"Loongson 3A5000 Processor Reference Manual";
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- EIOINTC is "Extended I/O Interrupts" described in Section 11.2 of
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"Loongson 3A5000 Processor Reference Manual";
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- HTVECINTC is "HyperTransport Interrupts" described in Section 14.3 of
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"Loongson 3A5000 Processor Reference Manual";
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- PCH-PIC/PCH-MSI is "Interrupt Controller" described in Section 5 of
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"Loongson 7A1000 Bridge User Manual";
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- PCH-LPC is "LPC Interrupts" described in Section 24.3 of
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"Loongson 7A1000 Bridge User Manual".
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@ -46,10 +46,11 @@ LA64中每个寄存器为64位宽。 ``$r0`` 的内容总是固定为0,而其
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``$r23``-``$r31`` ``$s0``-``$s8`` 静态寄存器 是
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================= =============== =================== ==========
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注意:``$r21``寄存器在ELF psABI中保留未使用,但是在Linux内核用于保存每CPU
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变量基地址。该寄存器没有ABI命名,不过在内核中称为``$u0``。在一些遗留代码
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中有时可能见到``$v0``和``$v1``,它们是``$a0``和``$a1``的别名,属于已经废弃
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的用法。
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.. note::
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注意: ``$r21`` 寄存器在ELF psABI中保留未使用,但是在Linux内核用于保
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存每CPU变量基地址。该寄存器没有ABI命名,不过在内核中称为 ``$u0`` 。在
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一些遗留代码中有时可能见到 ``$v0`` 和 ``$v1`` ,它们是 ``$a0`` 和
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``$a1`` 的别名,属于已经废弃的用法。
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浮点寄存器
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----------
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``$f24``-``$f31`` ``$fs0``-``$fs7`` 静态寄存器 是
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================= ================== =================== ==========
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注意:在一些遗留代码中有时可能见到 ``$v0`` 和 ``$v1`` ,它们是 ``$a0``
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和 ``$a1`` 的别名,属于已经废弃的用法。
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.. note::
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注意:在一些遗留代码中有时可能见到 ``$v0`` 和 ``$v1`` ,它们是
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``$a0`` 和 ``$a1`` 的别名,属于已经废弃的用法。
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向量寄存器
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@ -147,9 +147,11 @@ PCH-LPC::
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https://github.com/loongson/LoongArch-Documentation/releases/latest/download/Loongson-7A1000-usermanual-2.00-EN.pdf (英文版)
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注:CPUINTC即《龙芯架构参考手册卷一》第7.4节所描述的CSR.ECFG/CSR.ESTAT寄存器及其中断
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控制逻辑;LIOINTC即《龙芯3A5000处理器使用手册》第11.1节所描述的“传统I/O中断”;EIOINTC
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即《龙芯3A5000处理器使用手册》第11.2节所描述的“扩展I/O中断”;HTVECINTC即《龙芯3A5000
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处理器使用手册》第14.3节所描述的“HyperTransport中断”;PCH-PIC/PCH-MSI即《龙芯7A1000桥
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片用户手册》第5章所描述的“中断控制器”;PCH-LPC即《龙芯7A1000桥片用户手册》第24.3节所
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描述的“LPC中断”。
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.. note::
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- CPUINTC:即《龙芯架构参考手册卷一》第7.4节所描述的CSR.ECFG/CSR.ESTAT寄存器及其
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中断控制逻辑;
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- LIOINTC:即《龙芯3A5000处理器使用手册》第11.1节所描述的“传统I/O中断”;
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- EIOINTC:即《龙芯3A5000处理器使用手册》第11.2节所描述的“扩展I/O中断”;
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- HTVECINTC:即《龙芯3A5000处理器使用手册》第14.3节所描述的“HyperTransport中断”;
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- PCH-PIC/PCH-MSI:即《龙芯7A1000桥片用户手册》第5章所描述的“中断控制器”;
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- PCH-LPC:即《龙芯7A1000桥片用户手册》第24.3节所描述的“LPC中断”。
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@ -101,6 +101,7 @@ SECTIONS
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STABS_DEBUG
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DWARF_DEBUG
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ELF_DETAILS
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.gptab.sdata : {
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*(.gptab.data)
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