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wil6210: fix RGF_CAF_ICR address for Talyn-MB
[ Upstream commit 7c69709f8e
]
RGF_CAF_ICR register location has changed in Talyn-MB.
Add RGF_CAF_ICR_TALYN_MB to support the new address.
Signed-off-by: Maya Erez <merez@codeaurora.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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parent
0e1304ae42
commit
ccb2390e89
2 changed files with 10 additions and 2 deletions
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@ -1397,8 +1397,15 @@ static void wil_pre_fw_config(struct wil6210_priv *wil)
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wil6210_clear_irq(wil);
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/* CAF_ICR - clear and mask */
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/* it is W1C, clear by writing back same value */
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if (wil->hw_version < HW_VER_TALYN_MB) {
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wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0);
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wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0);
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} else {
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wil_s(wil,
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RGF_CAF_ICR_TALYN_MB + offsetof(struct RGF_ICR, ICR), 0);
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wil_w(wil, RGF_CAF_ICR_TALYN_MB +
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offsetof(struct RGF_ICR, IMV), ~0);
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}
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/* clear PAL_UNIT_ICR (potential D0->D3 leftover)
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* In Talyn-MB host cannot access this register due to
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* access control, hence PAL_UNIT_ICR is cleared by the FW
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@ -319,6 +319,7 @@ struct RGF_ICR {
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/* MAC timer, usec, for packet lifetime */
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#define RGF_MAC_MTRL_COUNTER_0 (0x886aa8)
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#define RGF_CAF_ICR_TALYN_MB (0x8893d4) /* struct RGF_ICR */
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#define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */
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#define RGF_CAF_OSC_CONTROL (0x88afa4)
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#define BIT_CAF_OSC_XTAL_EN BIT(0)
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