mirrors
/
linux-stable
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
1
0
Fork 0
Code Issues Releases Wiki Activity

Allwinner DT Additions for 3.18 

Mostly:
   - A23 bringup ongoing
   - New boards: HSG H702, Merrii A20 Hummingbird
   - sun(4|5|7)i DMA support
   - DT relicensing to a dual GPL/X11 license
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUHeJlAAoJEBx+YmzsjxAg+ucQAIRU5OYdzKt8shq4sVfn+X2E
 ST65yLSzDIOtsZzvojL8otyCiIaaMza5Q8K68bYPTPfGKM7fhDlP4ldWeOB2+sB7
 dnLYnUluLrK/aDn92DuaXqPmC7HI3R+QYElwfxNtc/39+DHJfjD1mHSiDcV856Lx
 zjh6b1dFced7JV4Gz9yxkzT0eWXOEvo2gI87vd/V4AlEAw4fzYkWBkHrYYlBLknj
 T2BGFOyZeXB6/DyaJjImLyjG4p7YqJMaICOC3JsRa/vAYmF1i39uRw0A3VTQCXxh
 CvoV8v9NjWmszDvHcrG7tA5gB3Y+jUGOkOdAhFuT0mm8GyzIaU6muRD/thhvhHg4
 JsUNIFnRRs/uRQTv+YSyXGupq9NZo1QtnTSRqKmPqZSDMf2KGaacntvzjoBX7NOQ
 aTauTfTnEshyI/XnCjQ4hxjAjbh3mSBLCTjlfFUllOQwHMFgFkTYCO1z6g6oRxQ4
 CZ6UZZ8LO/XfbfnaKh5WR2he/+cqgmdSvZWCB6B01QWY3ZqPn3OE83sCqNBv69P1
 aLzO173d4crL0lhEMCjHi4B9zVar05FTJ2VjEKRXRZ97NGpaCteY5sa9Ck3+jaDr
 vvlaqHK1rpYtLwXv6Um034AWVJ8SNSR1bHN4dzmwgjqtNmdz5Npv5YarTWz4CPuB
 MQaca/w/SKLq9jl9gtnv
 =PNFc
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-dt-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt

Pull "Allwinner DT Additions for 3.18" from Maxime Ripard:

Mostly:
  - A23 bringup ongoing
  - New boards: HSG H702, Merrii A20 Hummingbird
  - sun(4|5|7)i DMA support
  - DT relicensing to a dual GPL/X11 license

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

* tag 'sunxi-dt-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (30 commits)
  ARM: dts: sun8i: Add DMA controller node
  ARM: dts: sun5i: Add DT for HSG H702 tablet board
  ARM: dts: sunxi: Add fixed 5V regulator
  ARM: sun8i: Relicense the A23 DTSI under GPLv2/X11
  ARM: sun7i: Relicense the A20 DTSI under GPLv2/X11
  ARM: sun6i: Relicense the A31 DTSI under GPLv2/X11
  ARM: sun7i: Add support for Olimex A20-OLinuXino-LIME
  ARM: dts: sun7i: Add Merrii A20 Hummingbird board
  ARM: dts: sun7i: Add uart3/4/5, i2c3 and spi2 pinmux
  ARM: dt: sunxi: Remove i2c controller clock-frequency that matches default
  ARM: dts: sun8i: Enable i2c controllers on ippo-q8h-v5
  ARM: dts: sun8i: Add i2c controller nodes
  ARM: dts: sun8i: Add pin-muxing info for the i2c controllers
  ARM: dts: sun8i: Enable mmc controller on ippo-q8h-v5
  ARM: dts: sun8i: Add mmc controller nodes
  ARM: dts: sun8i: Add pin-muxing info for the mmc controllers
  ARM: dts: sun8i: Add mmc clocks to the dtsi
  ARM: dts: sun8i: ippo-q8h: Add pinctrl properties for R_UART
  ARM: dts: sun8i: Add pin muxing option for R_UART
  ARM: dts: sun8i: Add pinmux set for uart0
  ...
This commit is contained in:
Arnd Bergmann 2014-09-25 18:13:49 +02:00
parent 45c636b46e d07fe96718
commit cd7555aeae
12 changed files with 969 additions and 33 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/boot/dts/Makefile
View File

@ -420,6 +420,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \
dtb-$(CONFIG_MACH_SUN5I) += \
sun5i-a10s-olinuxino-micro.dtb \
sun5i-a10s-r7-tv-dongle.dtb \
sun5i-a13-hsg-h702.dtb \
sun5i-a13-olinuxino.dtb \
sun5i-a13-olinuxino-micro.dtb
dtb-$(CONFIG_MACH_SUN6I) += \
@ -430,7 +431,9 @@ dtb-$(CONFIG_MACH_SUN6I) += \
dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-cubieboard2.dtb \
sun7i-a20-cubietruck.dtb \
sun7i-a20-hummingbird.dtb \
sun7i-a20-i12-tvbox.dtb \
sun7i-a20-olinuxino-lime.dtb \
sun7i-a20-olinuxino-micro.dtb \
sun7i-a20-pcduino3.dtb
dtb-$(CONFIG_MACH_SUN8I) += \

19
arch/arm/boot/dts/sun4i-a10.dtsi
View File

@ -339,12 +339,22 @@
#size-cells = <1>;
ranges;
dma: dma-controller@01c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
interrupts = <27>;
clocks = <&ahb_gates 6>;
#dma-cells = <2>;
};
spi0: spi@01c05000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c05000 0x1000>;
interrupts = <10>;
clocks = <&ahb_gates 20>, <&spi0_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 27>, <&dma 1 26>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -356,6 +366,8 @@
interrupts = <11>;
clocks = <&ahb_gates 21>, <&spi1_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 9>, <&dma 1 8>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -451,6 +463,8 @@
interrupts = <12>;
clocks = <&ahb_gates 22>, <&spi2_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 29>, <&dma 1 28>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -490,6 +504,8 @@
interrupts = <50>;
clocks = <&ahb_gates 23>, <&spi3_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 31>, <&dma 1 30>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -749,7 +765,6 @@
reg = <0x01c2ac00 0x400>;
interrupts = <7>;
clocks = <&apb1_gates 0>;
clock-frequency = <100000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -760,7 +775,6 @@
reg = <0x01c2b000 0x400>;
interrupts = <8>;
clocks = <&apb1_gates 1>;
clock-frequency = <100000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -771,7 +785,6 @@
reg = <0x01c2b400 0x400>;
interrupts = <9>;
clocks = <&apb1_gates 2>;
clock-frequency = <100000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;

17
arch/arm/boot/dts/sun5i-a10s.dtsi
View File

@ -300,12 +300,22 @@
#size-cells = <1>;
ranges;
dma: dma-controller@01c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
interrupts = <27>;
clocks = <&ahb_gates 6>;
#dma-cells = <2>;
};
spi0: spi@01c05000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c05000 0x1000>;
interrupts = <10>;
clocks = <&ahb_gates 20>, <&spi0_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 27>, <&dma 1 26>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -317,6 +327,8 @@
interrupts = <11>;
clocks = <&ahb_gates 21>, <&spi1_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 9>, <&dma 1 8>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -403,6 +415,8 @@
interrupts = <12>;
clocks = <&ahb_gates 22>, <&spi2_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 29>, <&dma 1 28>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -564,7 +578,6 @@
reg = <0x01c2ac00 0x400>;
interrupts = <7>;
clocks = <&apb1_gates 0>;
clock-frequency = <100000>;
status = "disabled";
};
@ -575,7 +588,6 @@
reg = <0x01c2b000 0x400>;
interrupts = <8>;
clocks = <&apb1_gates 1>;
clock-frequency = <100000>;
status = "disabled";
};
@ -586,7 +598,6 @@
reg = <0x01c2b400 0x400>;
interrupts = <9>;
clocks = <&apb1_gates 2>;
clock-frequency = <100000>;
status = "disabled";
};

130
arch/arm/boot/dts/sun5i-a13-hsg-h702.dts Normal file
View File

@ -0,0 +1,130 @@
/*
* Copyright 2014 Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this library; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
/include/ "sun5i-a13.dtsi"
/include/ "sunxi-common-regulators.dtsi"
/ {
model = "HSG H702";
compatible = "hsg,h702", "allwinner,sun5i-a13";
soc@01c00000 {
mmc0: mmc@01c0f000 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_h702>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 6 0 0>; /* PG0 */
cd-inverted;
status = "okay";
};
usbphy: phy@01c13400 {
/*
* There doesn't seem to be a GPIO for controlling
* usb1 vbus, despite the fex file saying otherwise.
*/
usb1_vbus-supply = <&reg_vcc5v0>;
status = "okay";
};
ehci0: usb@01c14000 {
status = "okay";
};
ohci0: usb@01c14400 {
status = "okay";
};
pinctrl@01c20800 {
mmc0_cd_pin_h702: mmc0_cd_pin@0 {
allwinner,pins = "PG0";
allwinner,function = "gpio_in";
allwinner,drive = <0>;
allwinner,pull = <1>;
};
};
uart1: serial@01c28400 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_b>;
status = "okay";
};
i2c0: i2c@01c2ac00 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic@34 {
compatible = "x-powers,axp209";
reg = <0x34>;
interrupts = <0>;
interrupt-controller;
#interrupt-cells = <1>;
};
};
i2c1: i2c@01c2b000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
i2c2: i2c@01c2b400 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
status = "okay";
};
};
};

17
arch/arm/boot/dts/sun5i-a13.dtsi
View File

@ -298,12 +298,22 @@
#size-cells = <1>;
ranges;
dma: dma-controller@01c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
interrupts = <27>;
clocks = <&ahb_gates 6>;
#dma-cells = <2>;
};
spi0: spi@01c05000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c05000 0x1000>;
interrupts = <10>;
clocks = <&ahb_gates 20>, <&spi0_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 27>, <&dma 1 26>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -315,6 +325,8 @@
interrupts = <11>;
clocks = <&ahb_gates 21>, <&spi1_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 9>, <&dma 1 8>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -376,6 +388,8 @@
interrupts = <12>;
clocks = <&ahb_gates 22>, <&spi2_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 29>, <&dma 1 28>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -490,7 +504,6 @@
reg = <0x01c2ac00 0x400>;
interrupts = <7>;
clocks = <&apb1_gates 0>;
clock-frequency = <100000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -501,7 +514,6 @@
reg = <0x01c2b000 0x400>;
interrupts = <8>;
clocks = <&apb1_gates 1>;
clock-frequency = <100000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -512,7 +524,6 @@
reg = <0x01c2b400 0x400>;
interrupts = <9>;
clocks = <&apb1_gates 2>;
clock-frequency = <100000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;

56
arch/arm/boot/dts/sun6i-a31.dtsi
View File

@ -3,12 +3,48 @@
*
* Maxime Ripard <maxime.ripard@free-electrons.com>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this library; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/include/ "skeleton.dtsi"
@ -657,7 +693,6 @@
reg = <0x01c2ac00 0x400>;
interrupts = <0 6 4>;
clocks = <&apb2_gates 0>;
clock-frequency = <100000>;
resets = <&apb2_rst 0>;
status = "disabled";
#address-cells = <1>;
@ -669,7 +704,6 @@
reg = <0x01c2b000 0x400>;
interrupts = <0 7 4>;
clocks = <&apb2_gates 1>;
clock-frequency = <100000>;
resets = <&apb2_rst 1>;
status = "disabled";
#address-cells = <1>;
@ -681,7 +715,6 @@
reg = <0x01c2b400 0x400>;
interrupts = <0 8 4>;
clocks = <&apb2_gates 2>;
clock-frequency = <100000>;
resets = <&apb2_rst 2>;
status = "disabled";
#address-cells = <1>;
@ -693,7 +726,6 @@
reg = <0x01c2b800 0x400>;
interrupts = <0 9 4>;
clocks = <&apb2_gates 3>;
clock-frequency = <100000>;
resets = <&apb2_rst 3>;
status = "disabled";
#address-cells = <1>;
@ -787,6 +819,12 @@
interrupts = <1 9 0xf04>;
};
rtc: rtc@01f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
interrupts = <0 40 4>, <0 41 4>;
};
nmi_intc: interrupt-controller@01f00c0c {
compatible = "allwinner,sun6i-a31-sc-nmi";
interrupt-controller;

236
arch/arm/boot/dts/sun7i-a20-hummingbird.dts Normal file
View File

@ -0,0 +1,236 @@
/*
* Copyright 2013 Wills Wang
*
* Wills Wang <wills.wang.open@gmail.com>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "sun7i-a20.dtsi"
/include/ "sunxi-common-regulators.dtsi"
/ {
model = "Merrii A20 Hummingbird";
compatible = "merrii,a20-hummingbird", "allwinner,sun7i-a20";
soc@01c00000 {
mmc0: mmc@01c0f000 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <&reg_vcc3v0>;
bus-width = <4>;
cd-gpios = <&pio 7 1 0>; /* PH1 */
cd-inverted;
status = "okay";
};
mmc3: mmc@01c12000 {
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins_a>;
vmmc-supply = <&reg_mmc3_vdd>;
bus-width = <4>;
non-removable;
status = "okay";
};
usbphy: phy@01c13400 {
usb1_vbus-supply = <&reg_usb1_vbus>;
usb2_vbus-supply = <&reg_usb2_vbus>;
status = "okay";
};
ehci0: usb@01c14000 {
status = "okay";
};
ohci0: usb@01c14400 {
status = "okay";
};
ahci: sata@01c18000 {
target-supply = <&reg_ahci_5v>;
status = "okay";
};
ehci1: usb@01c1c000 {
status = "okay";
};
ohci1: usb@01c1c400 {
status = "okay";
};
pio: pinctrl@01c20800 {
ahci_pwr_pin_a20_hummingbird: ahci_pwr_pin@0 {
allwinner,pins = "PH15";
allwinner,function = "gpio_out";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
usb1_vbus_pin_a20_hummingbird: usb1_vbus_pin@0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
mmc3_vdd_pin_a20_hummingbird: mmc3_vdd_pin@0 {
allwinner,pins = "PH9";
allwinner,function = "gpio_out";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
gmac_vdd_pin_a20_hummingbird: gmac_vdd_pin@0 {
allwinner,pins = "PH16";
allwinner,function = "gpio_out";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
};
pwm: pwm@01c20e00 {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pins_a>;
status = "okay";
};
ir0: ir@01c21800 {
pinctrl-names = "default";
pinctrl-0 = <&ir0_pins_a>;
status = "okay";
};
uart0: serial@01c28000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
uart2: serial@01c28800 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins_a>;
status = "okay";
};
uart3: serial@01c28c00 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins_a>;
status = "okay";
};
uart4: serial@01c29000 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_a>;
status = "okay";
};
uart5: serial@01c29400 {
pinctrl-names = "default";
pinctrl-0 = <&uart5_pins_a>;
status = "okay";
};
i2c0: i2c@01c2ac00 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic@34 {
compatible = "x-powers,axp209";
reg = <0x34>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 8>;
interrupt-controller;
#interrupt-cells = <1>;
};
};
i2c1: i2c@01c2b000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
};
i2c2: i2c@01c2b400 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
status = "okay";
};
i2c3: i2c@01c2b800 {
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins_a>;
status = "okay";
};
spi2: spi@01c17000 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins_b>;
status = "okay";
};
gmac: ethernet@01c50000 {
pinctrl-names = "default";
pinctrl-0 = <&gmac_pins_rgmii_a>;
phy = <&phy1>;
phy-mode = "rgmii";
phy-supply = <&reg_gmac_vdd>;
/* phy reset config */
snps,reset-gpio = <&pio 0 17 0>; /* PA17 */
snps,reset-active-low;
/* wait 1s after reset, otherwise fail to read phy id */
snps,reset-delays-us = <0 10000 1000000>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
};
reg_ahci_5v: ahci-5v {
pinctrl-0 = <&ahci_pwr_pin_a20_hummingbird>;
gpio = <&pio 7 15 0>; /* PH15 */
status = "okay";
};
reg_usb1_vbus: usb1-vbus {
pinctrl-0 = <&usb1_vbus_pin_a20_hummingbird>;
gpio = <&pio 7 2 0>; /* PH2 */
status = "okay";
};
reg_usb2_vbus: usb2-vbus {
status = "okay";
};
reg_mmc3_vdd: mmc3_vdd {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&mmc3_vdd_pin_a20_hummingbird>;
regulator-name = "mmc3_vdd";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
enable-active-high;
gpio = <&pio 7 9 0>; /* PH9 */
};
reg_gmac_vdd: gmac_vdd {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&gmac_vdd_pin_a20_hummingbird>;
regulator-name = "gmac_vdd";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
enable-active-high;
gpio = <&pio 7 16 0>; /* PH16 */
};
};

137
arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts Normal file
View File

@ -0,0 +1,137 @@
/*
* This is based on sun4i-a10-olinuxino-lime.dts
*
* Copyright 2014 - Hans de Goede <hdegoede@redhat.com>
* Copyright (c) 2014 FUKAUMI Naoki <naobsd@gmail.com>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
/include/ "sun7i-a20.dtsi"
/include/ "sunxi-common-regulators.dtsi"
/ {
model = "Olimex A20-OLinuXino-LIME";
compatible = "olimex,a20-olinuxino-lime", "allwinner,sun7i-a20";
soc@01c00000 {
mmc0: mmc@01c0f000 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 7 1 0>; /* PH1 */
cd-inverted;
status = "okay";
};
usbphy: phy@01c13400 {
usb1_vbus-supply = <&reg_usb1_vbus>;
usb2_vbus-supply = <&reg_usb2_vbus>;
status = "okay";
};
ehci0: usb@01c14000 {
status = "okay";
};
ohci0: usb@01c14400 {
status = "okay";
};
ahci: sata@01c18000 {
target-supply = <&reg_ahci_5v>;
status = "okay";
};
ehci1: usb@01c1c000 {
status = "okay";
};
ohci1: usb@01c1c400 {
status = "okay";
};
pinctrl@01c20800 {
ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 {
allwinner,pins = "PC3";
allwinner,function = "gpio_out";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
led_pins_olinuxinolime: led_pins@0 {
allwinner,pins = "PH2";
allwinner,function = "gpio_out";
allwinner,drive = <1>;
allwinner,pull = <0>;
};
};
uart0: serial@01c28000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
i2c0: i2c@01c2ac00 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic@34 {
compatible = "x-powers,axp209";
reg = <0x34>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 8>;
interrupt-controller;
#interrupt-cells = <1>;
};
};
gmac: ethernet@01c50000 {
pinctrl-names = "default";
pinctrl-0 = <&gmac_pins_mii_a>;
phy = <&phy1>;
phy-mode = "mii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins_olinuxinolime>;
green {
label = "a20-olinuxino-lime:green:usr";
gpios = <&pio 7 2 0>;
default-state = "on";
};
};
reg_ahci_5v: ahci-5v {
pinctrl-0 = <&ahci_pwr_pin_olinuxinolime>;
gpio = <&pio 2 3 0>;
status = "okay";
};
reg_usb1_vbus: usb1-vbus {
status = "okay";
};
reg_usb2_vbus: usb2-vbus {
status = "okay";
};
};

102
arch/arm/boot/dts/sun7i-a20.dtsi
View File

@ -3,12 +3,48 @@
*
* Maxime Ripard <maxime.ripard@free-electrons.com>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this library; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/include/ "skeleton.dtsi"
@ -423,12 +459,22 @@
interrupts = <0 0 4>;
};
dma: dma-controller@01c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
interrupts = <0 27 4>;
clocks = <&ahb_gates 6>;
#dma-cells = <2>;
};
spi0: spi@01c05000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c05000 0x1000>;
interrupts = <0 10 4>;
clocks = <&ahb_gates 20>, <&spi0_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 27>, <&dma 1 26>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -440,6 +486,8 @@
interrupts = <0 11 4>;
clocks = <&ahb_gates 21>, <&spi1_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 9>, <&dma 1 8>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -535,6 +583,8 @@
interrupts = <0 12 4>;
clocks = <&ahb_gates 22>, <&spi2_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 29>, <&dma 1 28>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -574,6 +624,8 @@
interrupts = <0 50 4>;
clocks = <&ahb_gates 23>, <&spi3_clk>;
clock-names = "ahb", "mod";
dmas = <&dma 1 31>, <&dma 1 30>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -618,6 +670,27 @@
allwinner,pull = <0>;
};
uart3_pins_a: uart3@0 {
allwinner,pins = "PG6", "PG7", "PG8", "PG9";
allwinner,function = "uart3";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
uart4_pins_a: uart4@0 {
allwinner,pins = "PG10", "PG11";
allwinner,function = "uart4";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
uart5_pins_a: uart5@0 {
allwinner,pins = "PI10", "PI11";
allwinner,function = "uart5";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
uart6_pins_a: uart6@0 {
allwinner,pins = "PI12", "PI13";
allwinner,function = "uart6";
@ -653,6 +726,13 @@
allwinner,pull = <0>;
};
i2c3_pins_a: i2c3@0 {
allwinner,pins = "PI0", "PI1";
allwinner,function = "i2c3";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
emac_pins_a: emac0@0 {
allwinner,pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",
@ -718,6 +798,13 @@
allwinner,pull = <0>;
};
spi2_pins_b: spi2@1 {
allwinner,pins = "PB14", "PB15", "PB16", "PB17";
allwinner,function = "spi2";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
allwinner,function = "mmc0";
@ -899,7 +986,6 @@
reg = <0x01c2ac00 0x400>;
interrupts = <0 7 4>;
clocks = <&apb1_gates 0>;
clock-frequency = <100000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -910,7 +996,6 @@
reg = <0x01c2b000 0x400>;
interrupts = <0 8 4>;
clocks = <&apb1_gates 1>;
clock-frequency = <100000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -921,7 +1006,6 @@
reg = <0x01c2b400 0x400>;
interrupts = <0 9 4>;
clocks = <&apb1_gates 2>;
clock-frequency = <100000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -932,7 +1016,6 @@
reg = <0x01c2b800 0x400>;
interrupts = <0 88 4>;
clocks = <&apb1_gates 3>;
clock-frequency = <100000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -943,7 +1026,6 @@
reg = <0x01c2c000 0x400>;
interrupts = <0 89 4>;
clocks = <&apb1_gates 15>;
clock-frequency = <100000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;

41
arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
View File

@ -13,6 +13,7 @@
/dts-v1/;
/include/ "sun8i-a23.dtsi"
/include/ "sunxi-common-regulators.dtsi"
/ {
model = "Ippo Q8H Dual Core Tablet (v5)";
@ -23,7 +24,47 @@
};
soc@01c00000 {
mmc0: mmc@01c0f000 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8h>;
vmmc-supply = <&reg_vcc3v0>;
bus-width = <4>;
cd-gpios = <&pio 1 4 0>; /* PB4 */
cd-inverted;
status = "okay";
};
pinctrl@01c20800 {
mmc0_cd_pin_q8h: mmc0_cd_pin@0 {
allwinner,pins = "PB4";
allwinner,function = "gpio_in";
allwinner,drive = <0>;
allwinner,pull = <1>;
};
};
i2c0: i2c@01c2ac00 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
};
i2c1: i2c@01c2b000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
};
i2c2: i2c@01c2b400 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
/* pull-ups and devices require PMIC regulator */
status = "failed";
};
r_uart: serial@01f02800 {
pinctrl-names = "default";
pinctrl-0 = <&r_uart_pins_a>;
status = "okay";
};
};

237
arch/arm/boot/dts/sun8i-a23.dtsi
View File

@ -3,12 +3,48 @@
*
* Chen-Yu Tsai <wens@csie.org>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this library; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/include/ "skeleton.dtsi"
@ -179,6 +215,30 @@
"apb2_uart1", "apb2_uart2",
"apb2_uart3", "apb2_uart4";
};
mmc0_clk: clk@01c20088 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-mod0-clk";
reg = <0x01c20088 0x4>;
clocks = <&osc24M>, <&pll6>;
clock-output-names = "mmc0";
};
mmc1_clk: clk@01c2008c {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-mod0-clk";
reg = <0x01c2008c 0x4>;
clocks = <&osc24M>, <&pll6>;
clock-output-names = "mmc1";
};
mmc2_clk: clk@01c20090 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-mod0-clk";
reg = <0x01c20090 0x4>;
clocks = <&osc24M>, <&pll6>;
clock-output-names = "mmc2";
};
};
soc@01c00000 {
@ -187,6 +247,104 @@
#size-cells = <1>;
ranges;
dma: dma-controller@01c02000 {
compatible = "allwinner,sun8i-a23-dma";
reg = <0x01c02000 0x1000>;
interrupts = <0 50 4>;
clocks = <&ahb1_gates 6>;
resets = <&ahb1_rst 6>;
#dma-cells = <1>;
};
mmc0: mmc@01c0f000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ahb1_gates 8>, <&mmc0_clk>;
clock-names = "ahb", "mmc";
resets = <&ahb1_rst 8>;
reset-names = "ahb";
interrupts = <0 60 4>;
status = "disabled";
};
mmc1: mmc@01c10000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c10000 0x1000>;
clocks = <&ahb1_gates 9>, <&mmc1_clk>;
clock-names = "ahb", "mmc";
resets = <&ahb1_rst 9>;
reset-names = "ahb";
interrupts = <0 61 4>;
status = "disabled";
};
mmc2: mmc@01c11000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c11000 0x1000>;
clocks = <&ahb1_gates 10>, <&mmc2_clk>;
clock-names = "ahb", "mmc";
resets = <&ahb1_rst 10>;
reset-names = "ahb";
interrupts = <0 62 4>;
status = "disabled";
};
pio: pinctrl@01c20800 {
compatible = "allwinner,sun8i-a23-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <0 11 4>,
<0 15 4>,
<0 17 4>;
clocks = <&apb1_gates 5>;
gpio-controller;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
#gpio-cells = <3>;
uart0_pins_a: uart0@0 {
allwinner,pins = "PF2", "PF4";
allwinner,function = "uart0";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
allwinner,function = "mmc0";
allwinner,drive = <2>;
allwinner,pull = <0>;
};
mmc1_pins_a: mmc1@0 {
allwinner,pins = "PG0","PG1","PG2","PG3","PG4","PG5";
allwinner,function = "mmc1";
allwinner,drive = <2>;
allwinner,pull = <0>;
};
i2c0_pins_a: i2c0@0 {
allwinner,pins = "PH2", "PH3";
allwinner,function = "i2c0";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
i2c1_pins_a: i2c1@0 {
allwinner,pins = "PH4", "PH5";
allwinner,function = "i2c1";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
i2c2_pins_a: i2c2@0 {
allwinner,pins = "PE12", "PE13";
allwinner,function = "i2c2";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
};
ahb1_rst: reset@01c202c0 {
#reset-cells = <1>;
compatible = "allwinner,sun6i-a31-clock-reset";
@ -227,6 +385,8 @@
reg-io-width = <4>;
clocks = <&apb2_gates 16>;
resets = <&apb2_rst 16>;
dmas = <&dma 6>, <&dma 6>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -238,6 +398,8 @@
reg-io-width = <4>;
clocks = <&apb2_gates 17>;
resets = <&apb2_rst 17>;
dmas = <&dma 7>, <&dma 7>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -249,6 +411,8 @@
reg-io-width = <4>;
clocks = <&apb2_gates 18>;
resets = <&apb2_rst 18>;
dmas = <&dma 8>, <&dma 8>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -260,6 +424,8 @@
reg-io-width = <4>;
clocks = <&apb2_gates 19>;
resets = <&apb2_rst 19>;
dmas = <&dma 9>, <&dma 9>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -271,9 +437,44 @@
reg-io-width = <4>;
clocks = <&apb2_gates 20>;
resets = <&apb2_rst 20>;
dmas = <&dma 10>, <&dma 10>;
dma-names = "rx", "tx";
status = "disabled";
};
i2c0: i2c@01c2ac00 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <0 6 4>;
clocks = <&apb2_gates 0>;
resets = <&apb2_rst 0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c1: i2c@01c2b000 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <0 7 4>;
clocks = <&apb2_gates 1>;
resets = <&apb2_rst 1>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c2: i2c@01c2b400 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b400 0x400>;
interrupts = <0 8 4>;
clocks = <&apb2_gates 2>;
resets = <&apb2_rst 2>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
@ -285,6 +486,12 @@
interrupts = <1 9 0xf04>;
};
rtc: rtc@01f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
interrupts = <0 40 4>, <0 41 4>;
};
prcm@01f01400 {
compatible = "allwinner,sun8i-a23-prcm";
reg = <0x01f01400 0x200>;
@ -339,5 +546,25 @@
resets = <&apb0_rst 4>;
status = "disabled";
};
r_pio: pinctrl@01f02c00 {
compatible = "allwinner,sun8i-a23-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <0 45 4>;
clocks = <&apb0_gates 0>;
resets = <&apb0_rst 0>;
gpio-controller;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
#gpio-cells = <3>;
r_uart_pins_a: r_uart@0 {
allwinner,pins = "PL2", "PL3";
allwinner,function = "s_uart";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
};
};
};

7
arch/arm/boot/dts/sunxi-common-regulators.dtsi
View File

@ -86,4 +86,11 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_vcc5v0: vcc5v0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};