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ARM: dts: ls1021a: Add memory controller
The LS1021A has a memory controller that supports EDAC. This commit adds an entry for it. Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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1 changed files with 7 additions and 0 deletions
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@ -125,6 +125,13 @@ soc {
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interrupt-parent = <&gic>;
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ranges;
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ddr: memory-controller@1080000 {
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compatible = "fsl,qoriq-memory-controller";
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reg = <0x0 0x1080000 0x0 0x1000>;
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interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
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big-endian;
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};
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gic: interrupt-controller@1400000 {
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compatible = "arm,gic-400", "arm,cortex-a7-gic";
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#interrupt-cells = <3>;
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