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libata: relocate forcing PIO0 on reset
Forcing PIO0 on reset was done inside ata_bus_softreset(), which is a bit out of place as it should be applied to all resets - hard, soft and implementation which don't use ata_bus_softreset(). Relocate it such that... * For new EH, it's done in ata_eh_reset() before calling prereset. * For old EH, it's done before calling ap->ops->phy_reset() in ata_bus_probe(). This makes PIO0 forced after all resets. Another difference is that reset itself is done after PIO0 is forced. Signed-off-by: Tejun Heo <htejun@gmail.com> Acked-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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a9efacbad1
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cdeab11407
2 changed files with 38 additions and 27 deletions
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@ -2219,6 +2219,25 @@ int ata_bus_probe(struct ata_port *ap)
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tries[dev->devno] = ATA_PROBE_MAX_TRIES;
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tries[dev->devno] = ATA_PROBE_MAX_TRIES;
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retry:
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retry:
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ata_link_for_each_dev(dev, &ap->link) {
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/* If we issue an SRST then an ATA drive (not ATAPI)
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* may change configuration and be in PIO0 timing. If
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* we do a hard reset (or are coming from power on)
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* this is true for ATA or ATAPI. Until we've set a
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* suitable controller mode we should not touch the
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* bus as we may be talking too fast.
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*/
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dev->pio_mode = XFER_PIO_0;
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/* If the controller has a pio mode setup function
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* then use it to set the chipset to rights. Don't
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* touch the DMA setup as that will be dealt with when
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* configuring devices.
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*/
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if (ap->ops->set_piomode)
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ap->ops->set_piomode(ap, dev);
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}
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/* reset and determine device classes */
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/* reset and determine device classes */
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ap->ops->phy_reset(ap);
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ap->ops->phy_reset(ap);
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@ -2234,12 +2253,6 @@ int ata_bus_probe(struct ata_port *ap)
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ata_port_probe(ap);
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ata_port_probe(ap);
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/* after the reset the device state is PIO 0 and the controller
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state is undefined. Record the mode */
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ata_link_for_each_dev(dev, &ap->link)
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dev->pio_mode = XFER_PIO_0;
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/* read IDENTIFY page and configure devices. We have to do the identify
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/* read IDENTIFY page and configure devices. We have to do the identify
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specific sequence bass-ackwards so that PDIAG- is released by
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specific sequence bass-ackwards so that PDIAG- is released by
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the slave device */
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the slave device */
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@ -3272,8 +3285,6 @@ static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
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unsigned long deadline)
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unsigned long deadline)
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{
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{
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struct ata_ioports *ioaddr = &ap->ioaddr;
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struct ata_ioports *ioaddr = &ap->ioaddr;
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struct ata_device *dev;
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int i = 0;
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DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
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DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
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@ -3284,25 +3295,6 @@ static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
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udelay(20); /* FIXME: flush */
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udelay(20); /* FIXME: flush */
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iowrite8(ap->ctl, ioaddr->ctl_addr);
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iowrite8(ap->ctl, ioaddr->ctl_addr);
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/* If we issued an SRST then an ATA drive (not ATAPI)
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* may have changed configuration and be in PIO0 timing. If
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* we did a hard reset (or are coming from power on) this is
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* true for ATA or ATAPI. Until we've set a suitable controller
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* mode we should not touch the bus as we may be talking too fast.
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*/
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ata_link_for_each_dev(dev, &ap->link)
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dev->pio_mode = XFER_PIO_0;
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/* If the controller has a pio mode setup function then use
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it to set the chipset to rights. Don't touch the DMA setup
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as that will be dealt with when revalidating */
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if (ap->ops->set_piomode) {
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ata_link_for_each_dev(dev, &ap->link)
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if (devmask & (1 << i++))
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ap->ops->set_piomode(ap, dev);
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}
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/* wait a while before checking status */
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/* wait a while before checking status */
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ata_wait_after_reset(ap, deadline);
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ata_wait_after_reset(ap, deadline);
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@ -2083,6 +2083,25 @@ int ata_eh_reset(struct ata_link *link, int classify,
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ata_eh_about_to_do(link, NULL, ehc->i.action & ATA_EH_RESET_MASK);
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ata_eh_about_to_do(link, NULL, ehc->i.action & ATA_EH_RESET_MASK);
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ata_link_for_each_dev(dev, link) {
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/* If we issue an SRST then an ATA drive (not ATAPI)
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* may change configuration and be in PIO0 timing. If
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* we do a hard reset (or are coming from power on)
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* this is true for ATA or ATAPI. Until we've set a
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* suitable controller mode we should not touch the
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* bus as we may be talking too fast.
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*/
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dev->pio_mode = XFER_PIO_0;
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/* If the controller has a pio mode setup function
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* then use it to set the chipset to rights. Don't
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* touch the DMA setup as that will be dealt with when
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* configuring devices.
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*/
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if (ap->ops->set_piomode)
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ap->ops->set_piomode(ap, dev);
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}
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/* Determine which reset to use and record in ehc->i.action.
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/* Determine which reset to use and record in ehc->i.action.
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* prereset() may examine and modify it.
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* prereset() may examine and modify it.
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*/
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*/
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