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net/mlx5: Fix PPLM register mapping

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Add reserved mapping to cover all the register in order to avoid
setting arbitrary values to newer FW which implements the reserved
fields.

Fixes: a58837f52d ("net/mlx5e: Expose FEC feilds and related capability bit")
Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Aya Levin 2021-04-04 10:50:50 +03:00 committed by Saeed Mahameed
parent a14587dfc5
commit ce28f0fd67
1 changed files with 2 additions and 0 deletions
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include/linux/mlx5/mlx5_ifc.h
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@ -8835,6 +8835,8 @@ struct mlx5_ifc_pplm_reg_bits {
u8 fec_override_admin_100g_2x[0x10];
u8 fec_override_admin_50g_1x[0x10];
u8 reserved_at_140[0x140];
};
struct mlx5_ifc_ppcnt_reg_bits {