drm/i915: Only include i915_reg.h from .c files

Several of our i915 header files, have been including i915_reg.h.  This
means that any change to i915_reg.h will trigger a full rebuild of
pretty much every file of the driver, even those that don't have any
kind of register access.  Let's delete the i915_reg.h include from all
headers and add an explicit include from the .c files that truly
need the register definitions; those that need a definition of
i915_reg_t for a function definition can get it from i915_reg_defs.h
instead.

We also remove two non-register #define's (VLV_DISPLAY_BASE and
GEN12_SFC_DONE_MAX) into i915_reg_defs.h to allow us to drop the
i915_reg.h include from a couple of headers.

There's probably a lot more header dependency optimization possible, but
the changes here roughly cut the number of files compiled after 'touch
i915_reg.h' in half --- a good first step.

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220127234334.4016964-7-matthew.d.roper@intel.com
This commit is contained in:
Matt Roper 2022-01-27 15:43:34 -08:00
parent 0d6419e9c8
commit ce2fce2513
56 changed files with 49 additions and 29 deletions

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@ -8,7 +8,7 @@
#include <linux/types.h>
#include "i915_reg.h"
#include "i915_reg_defs.h"
enum port;
struct drm_i915_private;

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@ -35,6 +35,7 @@
#include <drm/drm_plane_helper.h>
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_atomic.h"
#include "intel_cdclk.h"
#include "intel_display_types.h"

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@ -32,6 +32,7 @@
#include "display/intel_gmbus.h"
#include "i915_drv.h"
#include "i915_reg.h"
#define _INTEL_BIOS_PRIVATE
#include "intel_vbt_defs.h"

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@ -5,6 +5,7 @@
#include <drm/drm_atomic_state_helper.h>
#include "i915_reg.h"
#include "intel_atomic.h"
#include "intel_bw.h"
#include "intel_cdclk.h"

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@ -6,7 +6,7 @@
#ifndef __INTEL_CRT_H__
#define __INTEL_CRT_H__
#include "i915_reg.h"
#include "i915_reg_defs.h"
enum pipe;
struct drm_encoder;

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@ -6,7 +6,7 @@
#ifndef __INTEL_DDI_H__
#define __INTEL_DDI_H__
#include "i915_reg.h"
#include "i915_reg_defs.h"
struct drm_connector_state;
struct drm_i915_private;

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@ -7,7 +7,6 @@
#define __INTEL_DE_H__
#include "i915_drv.h"
#include "i915_reg.h"
#include "i915_trace.h"
#include "intel_uncore.h"

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@ -7,7 +7,6 @@
#define __INTEL_DISPLAY_POWER_H__
#include "intel_runtime_pm.h"
#include "i915_reg.h"
enum dpio_channel;
enum dpio_phy;

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@ -6,7 +6,7 @@
#ifndef __INTEL_DMC_H__
#define __INTEL_DMC_H__
#include "i915_reg.h"
#include "i915_reg_defs.h"
#include "intel_wakeref.h"
#include <linux/workqueue.h>

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@ -8,8 +8,6 @@
#include <linux/types.h>
#include "i915_reg.h"
enum intel_output_format;
enum pipe;
enum port;

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@ -8,7 +8,7 @@
#include <linux/types.h>
#include "i915_reg.h"
#include "i915_reg_defs.h"
struct intel_crtc_state;
struct i915_vma;

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@ -39,6 +39,7 @@
#include <video/mipi_display.h>
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_display_types.h"
#include "intel_dsi.h"
#include "intel_dsi_vbt.h"

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@ -27,7 +27,7 @@
#include <drm/drm_crtc.h>
#include "i915_reg.h"
#include "i915_reg_defs.h"
struct intel_dvo_device {
const char *name;

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@ -9,8 +9,6 @@
#include <linux/hdmi.h>
#include <linux/types.h>
#include "i915_reg.h"
struct drm_connector;
struct drm_encoder;
struct drm_i915_private;

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@ -8,7 +8,7 @@
#include <linux/types.h>
#include "i915_reg.h"
#include "i915_reg_defs.h"
enum pipe;
struct drm_i915_private;

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@ -8,7 +8,7 @@
#include <linux/types.h>
#include "i915_reg.h"
#include "i915_reg_defs.h"
struct drm_i915_private;
enum pipe;

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@ -4,6 +4,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_display.h"
#include "intel_display_types.h"
#include "intel_dp_mst.h"

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@ -14,6 +14,7 @@
#include "gem/i915_gem_region.h"
#include "i915_drv.h"
#include "i915_gem_stolen.h"
#include "i915_reg.h"
#include "i915_vgpu.h"
/*

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@ -13,6 +13,7 @@
#include "i915_gem_mman.h"
#include "i915_gem_object.h"
#include "i915_gem_tiling.h"
#include "i915_reg.h"
/**
* DOC: buffer object tiling

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@ -5,6 +5,7 @@
#include "gen2_engine_cs.h"
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_engine.h"
#include "intel_engine_regs.h"
#include "intel_gpu_commands.h"

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@ -11,7 +11,6 @@
#include <linux/seqlock.h>
#include "i915_pmu.h"
#include "i915_reg.h"
#include "i915_request.h"
#include "i915_selftest.h"
#include "intel_engine_types.h"

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@ -4,6 +4,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "i915_scatterlist.h"
#include "i915_pvinfo.h"
#include "i915_vgpu.h"

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@ -4,6 +4,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_gt.h"
#include "intel_gt_clock_utils.h"
#include "intel_gt_regs.h"

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@ -7,6 +7,7 @@
#include <linux/seq_file.h>
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_gt.h"
#include "intel_gt_clock_utils.h"
#include "intel_gt_debugfs.h"

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@ -7,6 +7,7 @@
#include <linux/cpufreq.h>
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_gt.h"
#include "intel_llc.h"
#include "intel_pcode.h"

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@ -6,6 +6,7 @@
#include <linux/pm_runtime.h>
#include "i915_drv.h"
#include "i915_reg.h"
#include "i915_vgpu.h"
#include "intel_engine_regs.h"
#include "intel_gt.h"

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@ -6,7 +6,7 @@
#ifndef INTEL_RC6_H
#define INTEL_RC6_H
#include "i915_reg.h"
#include "i915_reg_defs.h"
struct intel_engine_cs;
struct intel_rc6;

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@ -4,6 +4,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_memory_region.h"
#include "intel_region_lmem.h"
#include "intel_region_ttm.h"

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@ -8,7 +8,7 @@
#include <linux/types.h>
#include "i915_reg.h"
#include "i915_reg_defs.h"
struct i915_wa {
i915_reg_t reg;

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@ -7,7 +7,6 @@
#define _GUC_ACTIONS_SLPC_ABI_H_
#include <linux/types.h>
#include "i915_reg.h"
/**
* DOC: SLPC SHARED DATA STRUCTURE

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@ -9,7 +9,7 @@
#include <linux/compiler.h>
#include <linux/types.h>
#include "i915_reg.h"
#include "i915_reg_defs.h"
/* Definitions of GuC H/W registers, bits, etc */

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@ -4,6 +4,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_guc_slpc.h"
#include "gt/intel_gt.h"
#include "gt/intel_gt_regs.h"

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@ -6,7 +6,7 @@
#ifndef _INTEL_HUC_H_
#define _INTEL_HUC_H_
#include "i915_reg.h"
#include "i915_reg_defs.h"
#include "intel_uc_fw.h"
#include "intel_huc_fw.h"

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@ -11,6 +11,7 @@
#include "intel_uc_fw.h"
#include "intel_uc_fw_abi.h"
#include "i915_drv.h"
#include "i915_reg.h"
static inline struct intel_gt *
____uc_fw_to_gt(struct intel_uc_fw *uc_fw, enum intel_uc_fw_type type)

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@ -35,6 +35,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "gt/intel_ggtt_fencing.h"
#include "gvt.h"

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@ -33,6 +33,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "gvt.h"
static int get_edp_pipe(struct intel_vgpu *vgpu)

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@ -32,6 +32,7 @@
#include <linux/vfio.h>
#include "i915_drv.h"
#include "i915_reg.h"
#include "gvt.h"
#define GEN8_DECODE_PTE(pte) (pte & GENMASK_ULL(63, 12))

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@ -33,6 +33,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "gvt.h"
#define GMBUS1_TOTAL_BYTES_SHIFT 16

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@ -37,6 +37,7 @@
#include "i915_drv.h"
#include "gvt.h"
#include "i915_pvinfo.h"
#include "i915_reg.h"
#define PRIMARY_FORMAT_NUM 16
struct pixel_format {

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@ -37,6 +37,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "gvt.h"
#include "i915_pvinfo.h"
#include "display/intel_display_types.h"

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@ -30,6 +30,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "gvt.h"
#include "trace.h"

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@ -35,7 +35,7 @@
#include <linux/hrtimer.h>
#include <linux/kernel.h>
#include "i915_reg.h"
#include "i915_reg_defs.h"
enum intel_gvt_event_type {
RCS_MI_USER_INTERRUPT = 0,

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@ -34,6 +34,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "gvt.h"
#include "gt/intel_gt_regs.h"

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@ -41,7 +41,6 @@
#include "gt/intel_engine_regs.h"
#include "gt/intel_engine_types.h"
#include "gt/intel_lrc_reg.h"
#include "i915_reg.h"
struct i915_request;
struct intel_context;

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@ -33,6 +33,7 @@
#include "i915_cmd_parser.h"
#include "i915_drv.h"
#include "i915_memcpy.h"
#include "i915_reg.h"
/**
* DOC: batch buffer command parser

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@ -61,7 +61,6 @@
#include <drm/ttm/ttm_device.h>
#include "i915_params.h"
#include "i915_reg.h"
#include "i915_utils.h"
#include "display/intel_bios.h"

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@ -28,6 +28,7 @@
#include "i915_driver.h"
#include "i915_drv.h"
#include "i915_pci.h"
#include "i915_reg.h"
#define PLATFORM(x) .platform = (x)
#define GEN(x) \

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@ -18,7 +18,7 @@
#include <uapi/drm/i915_drm.h>
#include "gt/intel_sseu.h"
#include "i915_reg.h"
#include "i915_reg_defs.h"
#include "intel_wakeref.h"
struct drm_i915_private;

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@ -115,7 +115,6 @@
* #define GEN8_BAR _MMIO(0xb888)
*/
#define VLV_DISPLAY_BASE 0x180000
#define VLV_MIPI_BASE VLV_DISPLAY_BASE
#define BXT_MIPI_BASE 0x60000
@ -189,8 +188,6 @@
#define _MASKED_BIT_ENABLE(a) ({ typeof(a) _a = (a); _MASKED_FIELD(_a, _a); })
#define _MASKED_BIT_DISABLE(a) (_MASKED_FIELD((a), 0))
#define GEN12_SFC_DONE_MAX 4
#define GU_CNTL _MMIO(0x101010)
#define LMEM_INIT REG_BIT(7)

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@ -94,4 +94,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
return !i915_mmio_reg_equal(reg, INVALID_MMIO_REG);
}
#define VLV_DISPLAY_BASE 0x180000
#define GEN12_SFC_DONE_MAX 4
#endif /* __I915_REG_DEFS__ */

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@ -4,6 +4,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_dram.h"
#include "intel_pcode.h"

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@ -4,6 +4,7 @@
*/
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_pcode.h"
static int gen6_check_mailbox_status(u32 mbox)

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@ -12,7 +12,6 @@
#include "display/intel_global_state.h"
#include "i915_drv.h"
#include "i915_reg.h"
struct drm_device;
struct drm_i915_private;

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@ -7,6 +7,7 @@
#include "i915_drv.h"
#include "intel_sbi.h"
#include "i915_reg.h"
/* SBI access */
static int intel_sbi_rw(struct drm_i915_private *i915, u16 reg,

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@ -30,7 +30,7 @@
#include <linux/hrtimer.h>
#include <linux/io-64-nonatomic-lo-hi.h>
#include "i915_reg.h"
#include "i915_reg_defs.h"
struct drm_i915_private;
struct intel_runtime_pm;

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@ -5,6 +5,7 @@
#include "i915_drv.h"
#include "i915_iosf_mbi.h"
#include "i915_reg.h"
#include "vlv_sideband.h"
/*